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SEm-Labos/06-07-08-09-SystemOnChip/AhbLiteComponents/hdl/ahbGpio_studentVersion.vhd
2024-04-17 14:20:36 +02:00

63 lines
1.4 KiB
VHDL

--==============================================================================
--
-- AHB general purpose input/outputs
--
-- Provides "ioNb" input/output signals .
--
--------------------------------------------------------------------------------
--
-- Write registers
--
-- 00, data register receives the values to drive the output lines.
-- 01, output enable register defines the signal direction:
-- when '1', the direction is "out".
--
--------------------------------------------------------------------------------
--
-- Read registers
-- 00, data register provides the values detected on the lines.
--
signal addresses is unsigned(32 downto 0);
signal bRead is std_ulogic;
signal bWrite is std_ulogic;
ARCHITECTURE studentVersion OF ahbGpio IS
BEGIN
process(hReset_n, hClk) begin
if hReset_n = '1' then
-- AHB-Lite
hRData <= (OTHERS => '0');
hReady <= '0';
hResp <= '0';
-- Out
ioOut <= (OTHERS => '0');
ioEn <= (OTHERS => '0');
addresses <= (OTHERS => '0');
bRead <= '0';
bWrite <= '1';
elsif rising_edge(hClk) then
if hSel = '1' then
CASE hAddr is
WHEN 00 =>
WHEN 01 =>
WHEN OTHERS
end CASE;
end if;
end if;
end process;
-- AHB-Lite
-- hRData <= (OTHERS => '0');
-- hReady <= '0';
-- hResp <= '0';
-- Out
-- ioOut <= (OTHERS => '0');
-- ioEn <= (OTHERS => '0');
END ARCHITECTURE studentVersion;