135 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			Makefile
		
	
	
	
	
	
			
		
		
	
	
			135 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			Makefile
		
	
	
	
	
	
| TEMPLATES := ../../rtl/processor_templates
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| MV := mv
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| 
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| .DEFAULT_GOAL := help
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| 
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| TASK := clean $(BITSTREAM)
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| 
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| FOMU_REV ?= pvt
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| OrangeCrab_REV ?= r02-25F
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| UPduino_REV ?= v3
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| 
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| #ifndef BOARD
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| #$(error BOARD needs to be set to 'Fomu', 'iCESugar', 'UPDuino', 'iCEBreaker' or 'OrangeCrab' !)
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| #endif
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| 
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| run:
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| 	$(eval TASK ?= clean $(BITSTREAM))
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| 	$(MAKE) -f common.mk \
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| 	  BOARD_SRC=./board_tops/neorv32_$(BOARD)_BoardTop_$(DESIGN).vhd \
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| 	  TOP=neorv32_$(BOARD)_BoardTop_$(DESIGN) \
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| 	  ID=$(DESIGN) \
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| 	  $(TASK)
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| 	IMPL="$${BITSTREAM%%.*}"; for item in ".bit" ".svf"; do \
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| 	  if [ -f "./$$IMPL$$item" ]; then \
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| 	    $(MV) "./$$IMPL$$item" ./; \
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| 	  fi \
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| 	done
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| 
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| # Boards
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| 
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| Fomu:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(FOMU_REV)_$(DESIGN).bit)
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| ifeq ($(DESIGN),Minimal)
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| 	$(eval IMEM_SRC := ../../rtl/core/mem/neorv32_imem.default.vhd)
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| else
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| 	$(eval IMEM_SRC := devices/ice40/neorv32_imem.ice40up_spram.vhd)
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| endif
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| 	$(eval NEORV32_MEM_SRC ?= ${IMEM_SRC} devices/ice40/neorv32_dmem.ice40up_spram.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 
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| iCESugar:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(DESIGN).bit)
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| 	$(eval NEORV32_MEM_SRC ?= devices/ice40/neorv32_imem.ice40up_spram.vhd devices/ice40/neorv32_dmem.ice40up_spram.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 
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| UPduino:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(UPduino_REV)_$(DESIGN).bit)
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| 	$(eval NEORV32_MEM_SRC ?= devices/ice40/neorv32_imem.ice40up_spram.vhd devices/ice40/neorv32_dmem.ice40up_spram.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 
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| OrangeCrab:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(OrangeCrab_REV)_$(DESIGN).bit)
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| 	$(eval NEORV32_MEM_SRC ?= ../../rtl/core/mem/neorv32_imem.default.vhd ../../rtl/core/mem/neorv32_dmem.default.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 
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| AlhambraII:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(DESIGN).bit)
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| 	$(eval NEORV32_MEM_SRC ?= ../../rtl/core/mem/neorv32_imem.default.vhd ../../rtl/core/mem/neorv32_dmem.default.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 
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| ULX3S:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(DESIGN).bit)
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| 	$(eval NEORV32_MEM_SRC ?= ../../rtl/core/mem/neorv32_imem.default.vhd ../../rtl/core/mem/neorv32_dmem.default.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 	  
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| iCEBreaker:
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| 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(DESIGN).bit)
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| 	$(eval NEORV32_MEM_SRC ?= devices/ice40/neorv32_imem.ice40up_spram.vhd devices/ice40/neorv32_dmem.ice40up_spram.vhd)
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| 	$(MAKE) \
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| 	  BITSTREAM="$(BITSTREAM)" \
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| 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
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| 	  run
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| 
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| # Designs
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| 
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| Minimal:
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| 	$(eval DESIGN ?= $@)
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| 	$(eval DESIGN_SRC ?= $(TEMPLATES)/neorv32_ProcessorTop_Minimal*.vhd)
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| 	$(MAKE) \
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| 	  DESIGN="$(DESIGN)" \
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| 	  DESIGN_SRC="$(DESIGN_SRC)" \
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| 	  $(BOARD)
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| 
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| MinimalBoot:
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| 	$(eval DESIGN ?= $@)
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| 	$(eval DESIGN_SRC ?= $(TEMPLATES)/neorv32_ProcessorTop_MinimalBoot.vhd)
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| 	$(MAKE) \
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| 	  DESIGN="$(DESIGN)" \
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| 	  DESIGN_SRC="$(DESIGN_SRC)" \
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| 	  $(BOARD)
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| 
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| UP5KDemo:
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| 	$(eval DESIGN ?= $@)
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| 	$(eval DESIGN_SRC ?= $(TEMPLATES)/neorv32_ProcessorTop_UP5KDemo.vhd)
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| 	$(MAKE) \
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| 	  DESIGN="$(DESIGN)" \
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| 	  DESIGN_SRC="$(DESIGN_SRC)" \
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| 	  $(BOARD)
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| 
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| MixedLanguage:
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| 	$(eval DESIGN ?= $@)
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| 	$(eval DESIGN_SRC ?= $(TEMPLATES)/neorv32_ProcessorTop_Minimal*.vhd)
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| 	$(eval NEORV32_VERILOG_SRC ?= devices/ice40/sb_ice40_components.v board_tops/neorv32_Fomu_MixedLanguage_ClkGen.v)
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| 	$(MAKE) \
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| 	  DESIGN="$(DESIGN)" \
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| 	  DESIGN_SRC="$(DESIGN_SRC)" \
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| 	  NEORV32_VERILOG_SRC="$(NEORV32_VERILOG_SRC)" \
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| 	  $(BOARD)
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| 
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| # Help
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| 
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| help:
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| 	@echo "Open-Source Synthesis, P&R, Routing and Bitstream Generation"
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| 	@echo "Usage:   make BOARD=<fpga board> <board top>"
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| 	@echo "Example: make BOARD=Fomu Minimal"
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| 
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