440 lines
17 KiB
C
440 lines
17 KiB
C
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/**
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******************************************************************************
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* @file stm32f7xx_ll_usart.c
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* @author MCD Application Team
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* @brief USART LL module driver.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f7xx_ll_usart.h"
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#include "stm32f7xx_ll_rcc.h"
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#include "stm32f7xx_ll_bus.h"
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#ifdef USE_FULL_ASSERT
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#include "stm32_assert.h"
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */
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/** @addtogroup STM32F7xx_LL_Driver
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* @{
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*/
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#if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
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/** @addtogroup USART_LL
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup USART_LL_Private_Macros
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* @{
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*/
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/* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
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* divided by the smallest oversampling used on the USART (i.e. 8) */
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#define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 27000000U)
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/* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
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#define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
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#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
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|| ((__VALUE__) == LL_USART_DIRECTION_RX) \
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|| ((__VALUE__) == LL_USART_DIRECTION_TX) \
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|| ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
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#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
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|| ((__VALUE__) == LL_USART_PARITY_EVEN) \
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|| ((__VALUE__) == LL_USART_PARITY_ODD))
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#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
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|| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
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|| ((__VALUE__) == LL_USART_DATAWIDTH_9B))
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#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
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|| ((__VALUE__) == LL_USART_OVERSAMPLING_8))
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#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
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|| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
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#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
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|| ((__VALUE__) == LL_USART_PHASE_2EDGE))
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#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
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|| ((__VALUE__) == LL_USART_POLARITY_HIGH))
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#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
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|| ((__VALUE__) == LL_USART_CLOCK_ENABLE))
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#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
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|| ((__VALUE__) == LL_USART_STOPBITS_1) \
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|| ((__VALUE__) == LL_USART_STOPBITS_1_5) \
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|| ((__VALUE__) == LL_USART_STOPBITS_2))
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#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
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|| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
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|| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
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|| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
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/**
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* @}
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*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup USART_LL_Exported_Functions
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* @{
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*/
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/** @addtogroup USART_LL_EF_Init
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* @{
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*/
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/**
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* @brief De-initialize USART registers (Registers restored to their default values).
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* @param USARTx USART Instance
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: USART registers are de-initialized
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* - ERROR: USART registers are not de-initialized
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*/
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ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
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{
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ErrorStatus status = SUCCESS;
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/* Check the parameters */
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assert_param(IS_UART_INSTANCE(USARTx));
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if (USARTx == USART1)
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{
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/* Force reset of USART clock */
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LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
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/* Release reset of USART clock */
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LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
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}
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else if (USARTx == USART2)
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{
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/* Force reset of USART clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
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/* Release reset of USART clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
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}
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else if (USARTx == USART3)
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{
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/* Force reset of USART clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
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/* Release reset of USART clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
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}
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else if (USARTx == UART4)
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{
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/* Force reset of UART clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
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/* Release reset of UART clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
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}
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else if (USARTx == UART5)
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{
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/* Force reset of UART clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
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/* Release reset of UART clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
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}
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else if (USARTx == USART6)
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{
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/* Force reset of USART clock */
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LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
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/* Release reset of USART clock */
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LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
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}
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else if (USARTx == UART7)
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{
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/* Force reset of UART clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
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/* Release reset of UART clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
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}
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else if (USARTx == UART8)
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{
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/* Force reset of UART clock */
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LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
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/* Release reset of UART clock */
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LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
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}
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else
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{
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status = ERROR;
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}
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return (status);
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}
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/**
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* @brief Initialize USART registers according to the specified
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* parameters in USART_InitStruct.
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* @note As some bits in USART configuration registers can only be written when
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* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
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* this function. Otherwise, ERROR result will be returned.
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* @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
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* @param USARTx USART Instance
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* @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
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* that contains the configuration information for the specified USART peripheral.
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* @retval An ErrorStatus enumeration value:
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* - SUCCESS: USART registers are initialized according to USART_InitStruct content
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* - ERROR: Problem occurred during USART Registers initialization
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*/
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ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
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{
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ErrorStatus status = ERROR;
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uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
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/* Check the parameters */
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assert_param(IS_UART_INSTANCE(USARTx));
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assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
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assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
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assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
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assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
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assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
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assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
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assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
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/* USART needs to be in disabled state, in order to be able to configure some bits in
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CRx registers */
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if (LL_USART_IsEnabled(USARTx) == 0U)
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{
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/*---------------------------- USART CR1 Configuration ---------------------
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* Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
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* - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
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* - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
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* - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
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* - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
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*/
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MODIFY_REG(USARTx->CR1,
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(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
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USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
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(USART_InitStruct->DataWidth | USART_InitStruct->Parity |
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USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
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/*---------------------------- USART CR2 Configuration ---------------------
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* Configure USARTx CR2 (Stop bits) with parameters:
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* - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
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* - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
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*/
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LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
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/*---------------------------- USART CR3 Configuration ---------------------
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* Configure USARTx CR3 (Hardware Flow Control) with parameters:
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* - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
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* USART_InitStruct->HardwareFlowControl value.
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*/
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LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
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/*---------------------------- USART BRR Configuration ---------------------
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* Retrieve Clock frequency used for USART Peripheral
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*/
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if (USARTx == USART1)
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{
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periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
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}
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else if (USARTx == USART2)
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{
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periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
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}
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else if (USARTx == USART3)
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{
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periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
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}
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else if (USARTx == UART4)
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{
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periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
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}
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else if (USARTx == UART5)
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{
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periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
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}
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else if (USARTx == USART6)
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{
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periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
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}
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else if (USARTx == UART7)
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{
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periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
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}
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else if (USARTx == UART8)
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{
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periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
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}
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else
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{
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/* Nothing to do, as error code is already assigned to ERROR value */
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}
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/* Configure the USART Baud Rate :
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- valid baud rate value (different from 0) is required
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- Peripheral clock as returned by RCC service, should be valid (different from 0).
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*/
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if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
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&& (USART_InitStruct->BaudRate != 0U))
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{
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status = SUCCESS;
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LL_USART_SetBaudRate(USARTx,
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periphclk,
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USART_InitStruct->OverSampling,
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USART_InitStruct->BaudRate);
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/* Check BRR is greater than or equal to 16d */
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assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
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}
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}
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/* Endif (=> USART not in Disabled state => return ERROR) */
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return (status);
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}
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/**
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* @brief Set each @ref LL_USART_InitTypeDef field to default value.
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* @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
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* whose fields will be set to default values.
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* @retval None
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*/
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void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
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{
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/* Set USART_InitStruct fields to default values */
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USART_InitStruct->BaudRate = 9600U;
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USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
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USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
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USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
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USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
|
||
|
|
USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Initialize USART Clock related settings according to the
|
||
|
|
* specified parameters in the USART_ClockInitStruct.
|
||
|
|
* @note As some bits in USART configuration registers can only be written when
|
||
|
|
* the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
|
||
|
|
* this function. Otherwise, ERROR result will be returned.
|
||
|
|
* @param USARTx USART Instance
|
||
|
|
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
|
||
|
|
* that contains the Clock configuration information for the specified USART peripheral.
|
||
|
|
* @retval An ErrorStatus enumeration value:
|
||
|
|
* - SUCCESS: USART registers related to Clock settings are initialized according
|
||
|
|
* to USART_ClockInitStruct content
|
||
|
|
* - ERROR: Problem occurred during USART Registers initialization
|
||
|
|
*/
|
||
|
|
ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
|
||
|
|
{
|
||
|
|
ErrorStatus status = SUCCESS;
|
||
|
|
|
||
|
|
/* Check USART Instance and Clock signal output parameters */
|
||
|
|
assert_param(IS_UART_INSTANCE(USARTx));
|
||
|
|
assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
|
||
|
|
|
||
|
|
/* USART needs to be in disabled state, in order to be able to configure some bits in
|
||
|
|
CRx registers */
|
||
|
|
if (LL_USART_IsEnabled(USARTx) == 0U)
|
||
|
|
{
|
||
|
|
/* If USART Clock signal is disabled */
|
||
|
|
if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
|
||
|
|
{
|
||
|
|
/* Deactivate Clock signal delivery :
|
||
|
|
* - Disable Clock Output: USART_CR2_CLKEN cleared
|
||
|
|
*/
|
||
|
|
LL_USART_DisableSCLKOutput(USARTx);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* Ensure USART instance is USART capable */
|
||
|
|
assert_param(IS_USART_INSTANCE(USARTx));
|
||
|
|
|
||
|
|
/* Check clock related parameters */
|
||
|
|
assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
|
||
|
|
assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
|
||
|
|
assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
|
||
|
|
|
||
|
|
/*---------------------------- USART CR2 Configuration -----------------------
|
||
|
|
* Configure USARTx CR2 (Clock signal related bits) with parameters:
|
||
|
|
* - Enable Clock Output: USART_CR2_CLKEN set
|
||
|
|
* - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
|
||
|
|
* - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
|
||
|
|
* - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
|
||
|
|
*/
|
||
|
|
MODIFY_REG(USARTx->CR2,
|
||
|
|
USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
|
||
|
|
USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
|
||
|
|
USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
/* Else (USART not in Disabled state => return ERROR */
|
||
|
|
else
|
||
|
|
{
|
||
|
|
status = ERROR;
|
||
|
|
}
|
||
|
|
|
||
|
|
return (status);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
|
||
|
|
* @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
|
||
|
|
* whose fields will be set to default values.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
|
||
|
|
{
|
||
|
|
/* Set LL_USART_ClockInitStruct fields with default values */
|
||
|
|
USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
|
||
|
|
USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
|
||
|
|
LL_USART_CLOCK_DISABLE */
|
||
|
|
USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
|
||
|
|
LL_USART_CLOCK_DISABLE */
|
||
|
|
USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
|
||
|
|
LL_USART_CLOCK_DISABLE */
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* USE_FULL_LL_DRIVER */
|
||
|
|
|
||
|
|
|