Klagarge/Sem-dma
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should be finish

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This commit is contained in:
Julien Chevalley
2023-12-11 16:22:42 +01:00
parent a9c0f1b148
commit bfd877c267
98 changed files with 5868 additions and 4804 deletions
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1
Core/Inc/stm32f7xx_it.h
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@ -55,6 +55,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Stream4_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

35
Core/Src/main.c
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@ -18,15 +18,16 @@
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "dma.h"
#include "spi.h"
#include "gpio.h"
#include "../../nokia.h"
#include <stdio.h>
extern void ScreenSaver(void);
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdio.h>
#include "../../nokia.h"
extern void ScreenSaver(void);
extern DMA_HandleTypeDef hdma_spi2_tx;
/* USER CODE END Includes */
@ -65,7 +66,7 @@ void SystemClock_Config(void);
* @brief The application entry point.
* @retval int
*/
int main(void)
int main(void)
{
/* USER CODE BEGIN 1 */
@ -89,6 +90,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_SPI2_Init();
/* USER CODE BEGIN 2 */
@ -99,31 +101,38 @@ int main(void)
uint32_t newTick=oldTick;
uint32_t fps=0;
SCB_EnableICache();
SCB_EnableDCache();
// SCB_EnableICache();
// SCB_EnableDCache();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
HAL_GPIO_WritePin(CS_NOKIA_GPIO_Port, CS_NOKIA_Pin, GPIO_PIN_RESET);
while (1) {
while(HAL_DMA_GetState(&hdma_spi2_tx)!=HAL_DMA_STATE_READY){
}
HAL_GPIO_WritePin(CS_NOKIA_GPIO_Port, CS_NOKIA_Pin, GPIO_PIN_SET);
NokiaGotoXY(0,0);
HAL_GPIO_WritePin(CS_NOKIA_GPIO_Port, CS_NOKIA_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit_DMA(&hspi2, gNokiaBuffer, gNokiaBufferSize);
fps++;
newTick=HAL_GetTick();
if(newTick-oldTick>1000)
{
if(newTick-oldTick>1000){
oldTick=newTick;
printf("FPS: %d\r\n",fps);
fps=0;
}
ScreenSaver();
NokiaUpdate();
fps++;
// NokiaUpdate();
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */

22
Core/Src/spi.c
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@ -25,6 +25,7 @@
/* USER CODE END 0 */
SPI_HandleTypeDef hspi2;
DMA_HandleTypeDef hdma_spi2_tx;
/* SPI2 init function */
void MX_SPI2_Init(void)
@ -93,6 +94,25 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* SPI2 DMA Init */
/* SPI2_TX Init */
hdma_spi2_tx.Instance = DMA1_Stream4;
hdma_spi2_tx.Init.Channel = DMA_CHANNEL_0;
hdma_spi2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_spi2_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_spi2_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_spi2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_spi2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_spi2_tx.Init.Mode = DMA_NORMAL;
hdma_spi2_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_spi2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_spi2_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(spiHandle,hdmatx,hdma_spi2_tx);
/* USER CODE BEGIN SPI2_MspInit 1 */
/* USER CODE END SPI2_MspInit 1 */
@ -118,6 +138,8 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_15);
/* SPI2 DMA DeInit */
HAL_DMA_DeInit(spiHandle->hdmatx);
/* USER CODE BEGIN SPI2_MspDeInit 1 */
/* USER CODE END SPI2_MspDeInit 1 */

16
Core/Src/stm32f7xx_it.c
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@ -55,7 +55,7 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_spi2_tx;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
@ -198,6 +198,20 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32f7xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 stream4 global interrupt.
*/
void DMA1_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
/* USER CODE END DMA1_Stream4_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi2_tx);
/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
/* USER CODE END DMA1_Stream4_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */