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63
RTE/CMSIS/RTX_Config.c
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63
RTE/CMSIS/RTX_Config.c
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@@ -0,0 +1,63 @@
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/*
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* Copyright (c) 2013-2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* -----------------------------------------------------------------------------
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*
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* $Revision: V5.1.0
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*
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* Project: CMSIS-RTOS RTX
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* Title: RTX Configuration
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*
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* -----------------------------------------------------------------------------
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*/
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#include "cmsis_compiler.h"
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#include "rtx_os.h"
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// OS Idle Thread
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__WEAK __NO_RETURN void osRtxIdleThread (void *argument) {
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(void)argument;
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for (;;) {}
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}
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// OS Error Callback function
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__WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
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(void)object_id;
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switch (code) {
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case osRtxErrorStackUnderflow:
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// Stack overflow detected for thread (thread_id=object_id)
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break;
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case osRtxErrorISRQueueOverflow:
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// ISR Queue overflow detected when inserting object (object_id)
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break;
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case osRtxErrorTimerQueueOverflow:
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// User Timer Callback Queue overflow detected for timer (timer_id=object_id)
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break;
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case osRtxErrorClibSpace:
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// Standard C/C++ library libspace not available: increase OS_THREAD_LIBSPACE_NUM
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break;
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case osRtxErrorClibMutex:
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// Standard C/C++ library mutex initialization failed
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break;
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default:
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break;
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}
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for (;;) {}
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//return 0U;
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}
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395
RTE/CMSIS/RTX_Config.h
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395
RTE/CMSIS/RTX_Config.h
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@@ -0,0 +1,395 @@
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/*
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* Copyright (c) 2013-2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* -----------------------------------------------------------------------------
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*
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* $Revision: V5.2.0
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*
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* Project: CMSIS-RTOS RTX
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* Title: RTX Configuration definitions
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*
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* -----------------------------------------------------------------------------
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*/
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#ifndef RTX_CONFIG_H_
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#define RTX_CONFIG_H_
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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// <h>System Configuration
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// =======================
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// <o>Global Dynamic Memory size [bytes] <0-1073741824:8>
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// <i> Defines the combined global dynamic memory size.
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// <i> Default: 4096
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#ifndef OS_DYNAMIC_MEM_SIZE
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#define OS_DYNAMIC_MEM_SIZE 100000
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#endif
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// <o>Kernel Tick Frequency [Hz] <1-1000000>
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// <i> Defines base time unit for delays and timeouts.
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// <i> Default: 1000 (1ms tick)
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#ifndef OS_TICK_FREQ
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#define OS_TICK_FREQ 1000
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#endif
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// <e>Round-Robin Thread switching
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// <i> Enables Round-Robin Thread switching.
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#ifndef OS_ROBIN_ENABLE
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#define OS_ROBIN_ENABLE 1
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#endif
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// <o>Round-Robin Timeout <1-1000>
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// <i> Defines how many ticks a thread will execute before a thread switch.
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// <i> Default: 5
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#ifndef OS_ROBIN_TIMEOUT
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#define OS_ROBIN_TIMEOUT 5
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#endif
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// </e>
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// <h>Event Recording
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// <q>Memory Management
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// <i> Enables Memory Management events recording.
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#ifndef OS_EVR_MEMORY
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#define OS_EVR_MEMORY 1
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#endif
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// <q>Kernel
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// <i> Enables Kernel events recording.
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#ifndef OS_EVR_KERNEL
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#define OS_EVR_KERNEL 1
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#endif
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// <q>Thread
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// <i> Enables Thread events recording.
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#ifndef OS_EVR_THREAD
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#define OS_EVR_THREAD 1
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#endif
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// <q>Timer
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// <i> Enables Timer events recording.
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#ifndef OS_EVR_TIMER
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#define OS_EVR_TIMER 1
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#endif
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// <q>Event Flags
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// <i> Enables Event Flags events recording.
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#ifndef OS_EVR_EVFLAGS
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#define OS_EVR_EVFLAGS 1
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#endif
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// <q>Mutex
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// <i> Enables Mutex events recording.
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#ifndef OS_EVR_MUTEX
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#define OS_EVR_MUTEX 0
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#endif
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// <q>Semaphore
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// <i> Enables Semaphore events recording.
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#ifndef OS_EVR_SEMAPHORE
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#define OS_EVR_SEMAPHORE 0
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#endif
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// <q>Memory Pool
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// <i> Enables Memory Pool events recording.
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#ifndef OS_EVR_MEMPOOL
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#define OS_EVR_MEMPOOL 1
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#endif
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// <q>Message Queue
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// <i> Enables Message Queue events recording.
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#ifndef OS_EVR_MSGQUEUE
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#define OS_EVR_MSGQUEUE 1
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#endif
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// </h>
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// <o>ISR FIFO Queue
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// <4=> 4 entries <8=> 8 entries <12=> 12 entries <16=> 16 entries
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// <24=> 24 entries <32=> 32 entries <48=> 48 entries <64=> 64 entries
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// <96=> 96 entries <128=> 128 entries <196=> 196 entries <256=> 256 entries
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// <i> RTOS Functions called from ISR store requests to this buffer.
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// <i> Default: 16 entries
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#ifndef OS_ISR_FIFO_QUEUE
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#define OS_ISR_FIFO_QUEUE 16
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#endif
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// </h>
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// <h>Thread Configuration
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// =======================
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// <e>Object specific Memory allocation
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// <i> Enables object specific memory allocation.
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#ifndef OS_THREAD_OBJ_MEM
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#define OS_THREAD_OBJ_MEM 0
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#endif
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// <o>Number of user Threads <1-1000>
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// <i> Defines maximum number of user threads that can be active at the same time.
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// <i> Applies to user threads with system provided memory for control blocks.
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#ifndef OS_THREAD_NUM
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#define OS_THREAD_NUM 1
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#endif
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// <o>Number of user Threads with default Stack size <0-1000>
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// <i> Defines maximum number of user threads with default stack size.
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// <i> Applies to user threads with zero stack size specified.
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#ifndef OS_THREAD_DEF_STACK_NUM
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#define OS_THREAD_DEF_STACK_NUM 0
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#endif
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// <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>
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// <i> Defines the combined stack size for user threads with user-provided stack size.
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// <i> Applies to user threads with user-provided stack size and system provided memory for stack.
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// <i> Default: 0
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#ifndef OS_THREAD_USER_STACK_SIZE
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#define OS_THREAD_USER_STACK_SIZE 0
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#endif
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// </e>
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// <o>Default Thread Stack size [bytes] <96-1073741824:8>
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// <i> Defines stack size for threads with zero stack size specified.
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// <i> Default: 200
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#ifndef OS_STACK_SIZE
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#define OS_STACK_SIZE 200
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#endif
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// <o>Idle Thread Stack size [bytes] <72-1073741824:8>
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// <i> Defines stack size for Idle thread.
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// <i> Default: 200
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#ifndef OS_IDLE_THREAD_STACK_SIZE
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#define OS_IDLE_THREAD_STACK_SIZE 200
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#endif
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// <o>Idle Thread TrustZone Module Identifier
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// <i> Defines TrustZone Thread Context Management Identifier.
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// <i> Applies only to cores with TrustZone technology.
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// <i> Default: 0 (not used)
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#ifndef OS_IDLE_THREAD_TZ_MOD_ID
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#define OS_IDLE_THREAD_TZ_MOD_ID 0
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#endif
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// <q>Stack overrun checking
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// <i> Enable stack overrun checks at thread switch.
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// <i> Enabling this option increases slightly the execution time of a thread switch.
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#ifndef OS_STACK_CHECK
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#define OS_STACK_CHECK 1
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#endif
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// <q>Stack usage watermark
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// <i> Initialize thread stack with watermark pattern for analyzing stack usage.
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// <i> Enabling this option increases significantly the execution time of thread creation.
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#ifndef OS_STACK_WATERMARK
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#define OS_STACK_WATERMARK 0
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#endif
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// <o>Processor mode for Thread execution
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// <0=> Unprivileged mode
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// <1=> Privileged mode
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// <i> Default: Privileged mode
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#ifndef OS_PRIVILEGE_MODE
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#define OS_PRIVILEGE_MODE 1
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#endif
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// </h>
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// <h>Timer Configuration
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// ======================
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// <e>Object specific Memory allocation
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// <i> Enables object specific memory allocation.
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#ifndef OS_TIMER_OBJ_MEM
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#define OS_TIMER_OBJ_MEM 0
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#endif
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// <o>Number of Timer objects <1-1000>
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// <i> Defines maximum number of objects that can be active at the same time.
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// <i> Applies to objects with system provided memory for control blocks.
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#ifndef OS_TIMER_NUM
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#define OS_TIMER_NUM 1
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#endif
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// </e>
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// <o>Timer Thread Priority
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// <8=> Low
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// <16=> Below Normal <24=> Normal <32=> Above Normal
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// <40=> High
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// <48=> Realtime
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// <i> Defines priority for timer thread
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// <i> Default: High
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#ifndef OS_TIMER_THREAD_PRIO
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#define OS_TIMER_THREAD_PRIO 40
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#endif
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// <o>Timer Thread Stack size [bytes] <0-1073741824:8>
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// <i> Defines stack size for Timer thread.
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||||
// <i> May be set to 0 when timers are not used.
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// <i> Default: 200
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#ifndef OS_TIMER_THREAD_STACK_SIZE
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#define OS_TIMER_THREAD_STACK_SIZE 200
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#endif
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||||
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// <o>Timer Thread TrustZone Module Identifier
|
||||
// <i> Defines TrustZone Thread Context Management Identifier.
|
||||
// <i> Applies only to cores with TrustZone technology.
|
||||
// <i> Default: 0 (not used)
|
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#ifndef OS_TIMER_THREAD_TZ_MOD_ID
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#define OS_TIMER_THREAD_TZ_MOD_ID 0
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#endif
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// <o>Timer Callback Queue entries <0-256>
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// <i> Number of concurrent active timer callback functions.
|
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// <i> May be set to 0 when timers are not used.
|
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// <i> Default: 4
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#ifndef OS_TIMER_CB_QUEUE
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#define OS_TIMER_CB_QUEUE 4
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#endif
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// </h>
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// <h>Event Flags Configuration
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// ============================
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// <e>Object specific Memory allocation
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// <i> Enables object specific memory allocation.
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||||
#ifndef OS_EVFLAGS_OBJ_MEM
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#define OS_EVFLAGS_OBJ_MEM 0
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#endif
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// <o>Number of Event Flags objects <1-1000>
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// <i> Defines maximum number of objects that can be active at the same time.
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// <i> Applies to objects with system provided memory for control blocks.
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#ifndef OS_EVFLAGS_NUM
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#define OS_EVFLAGS_NUM 1
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#endif
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||||
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||||
// </e>
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||||
|
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// </h>
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// <h>Mutex Configuration
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// ======================
|
||||
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// <e>Object specific Memory allocation
|
||||
// <i> Enables object specific memory allocation.
|
||||
#ifndef OS_MUTEX_OBJ_MEM
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#define OS_MUTEX_OBJ_MEM 0
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||||
#endif
|
||||
|
||||
// <o>Number of Mutex objects <1-1000>
|
||||
// <i> Defines maximum number of objects that can be active at the same time.
|
||||
// <i> Applies to objects with system provided memory for control blocks.
|
||||
#ifndef OS_MUTEX_NUM
|
||||
#define OS_MUTEX_NUM 1
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||||
#endif
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// </e>
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||||
|
||||
// </h>
|
||||
|
||||
// <h>Semaphore Configuration
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||||
// ==========================
|
||||
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||||
// <e>Object specific Memory allocation
|
||||
// <i> Enables object specific memory allocation.
|
||||
#ifndef OS_SEMAPHORE_OBJ_MEM
|
||||
#define OS_SEMAPHORE_OBJ_MEM 0
|
||||
#endif
|
||||
|
||||
// <o>Number of Semaphore objects <1-1000>
|
||||
// <i> Defines maximum number of objects that can be active at the same time.
|
||||
// <i> Applies to objects with system provided memory for control blocks.
|
||||
#ifndef OS_SEMAPHORE_NUM
|
||||
#define OS_SEMAPHORE_NUM 1
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// </h>
|
||||
|
||||
// <h>Memory Pool Configuration
|
||||
// ============================
|
||||
|
||||
// <e>Object specific Memory allocation
|
||||
// <i> Enables object specific memory allocation.
|
||||
#ifndef OS_MEMPOOL_OBJ_MEM
|
||||
#define OS_MEMPOOL_OBJ_MEM 0
|
||||
#endif
|
||||
|
||||
// <o>Number of Memory Pool objects <1-1000>
|
||||
// <i> Defines maximum number of objects that can be active at the same time.
|
||||
// <i> Applies to objects with system provided memory for control blocks.
|
||||
#ifndef OS_MEMPOOL_NUM
|
||||
#define OS_MEMPOOL_NUM 1
|
||||
#endif
|
||||
|
||||
// <o>Data Storage Memory size [bytes] <0-1073741824:8>
|
||||
// <i> Defines the combined data storage memory size.
|
||||
// <i> Applies to objects with system provided memory for data storage.
|
||||
// <i> Default: 0
|
||||
#ifndef OS_MEMPOOL_DATA_SIZE
|
||||
#define OS_MEMPOOL_DATA_SIZE 0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// </h>
|
||||
|
||||
// <h>Message Queue Configuration
|
||||
// ==============================
|
||||
|
||||
// <e>Object specific Memory allocation
|
||||
// <i> Enables object specific memory allocation.
|
||||
#ifndef OS_MSGQUEUE_OBJ_MEM
|
||||
#define OS_MSGQUEUE_OBJ_MEM 0
|
||||
#endif
|
||||
|
||||
// <o>Number of Message Queue objects <1-1000>
|
||||
// <i> Defines maximum number of objects that can be active at the same time.
|
||||
// <i> Applies to objects with system provided memory for control blocks.
|
||||
#ifndef OS_MSGQUEUE_NUM
|
||||
#define OS_MSGQUEUE_NUM 12
|
||||
#endif
|
||||
|
||||
// <o>Data Storage Memory size [bytes] <0-1073741824:8>
|
||||
// <i> Defines the combined data storage memory size.
|
||||
// <i> Applies to objects with system provided memory for data storage.
|
||||
// <i> Default: 0
|
||||
#ifndef OS_MSGQUEUE_DATA_SIZE
|
||||
#define OS_MSGQUEUE_DATA_SIZE 0
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// </h>
|
||||
|
||||
// Number of Threads which use standard C/C++ library libspace
|
||||
// (when thread specific memory allocation is not used).
|
||||
#if (OS_THREAD_OBJ_MEM == 0)
|
||||
#define OS_THREAD_LIBSPACE_NUM 4
|
||||
#else
|
||||
#define OS_THREAD_LIBSPACE_NUM OS_THREAD_NUM
|
||||
#endif
|
||||
|
||||
//------------- <<< end of configuration section >>> ---------------------------
|
||||
|
||||
#endif // RTX_CONFIG_H_
|
44
RTE/Compiler/EventRecorderConf.h
Normal file
44
RTE/Compiler/EventRecorderConf.h
Normal file
@@ -0,0 +1,44 @@
|
||||
/*------------------------------------------------------------------------------
|
||||
* MDK - Component ::Event Recorder
|
||||
* Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
|
||||
*------------------------------------------------------------------------------
|
||||
* Name: EventRecorderConf.h
|
||||
* Purpose: Event Recorder Configuration
|
||||
* Rev.: V1.0.0
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
|
||||
|
||||
// <h>Event Recorder
|
||||
|
||||
// <o>Number of Records
|
||||
// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
|
||||
// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
|
||||
// <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
|
||||
// <1048576=>1048576
|
||||
// <i>Configure size of Event Record Buffer (each record is 16 bytes)
|
||||
// <i>Must be 2^n (min=8, max=1048576)
|
||||
#define EVENT_RECORD_COUNT 1024U
|
||||
|
||||
// <o>Time Stamp Source
|
||||
// <0=> DWT Cycle Counter <1=> SysTick
|
||||
// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
|
||||
// <i>Selects source for 32-bit time stamp
|
||||
#define EVENT_TIMESTAMP_SOURCE 0
|
||||
|
||||
// <h>SysTick Configuration
|
||||
// <i>Configure values when Time Stamp Source is set to SysTick
|
||||
|
||||
// <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
|
||||
// <i>Defines SysTick input clock (typical identical with processor clock)
|
||||
#define SYSTICK_CLOCK 216000000U
|
||||
|
||||
// <o>SysTick Interrupt Period [us] <1-1000000000>
|
||||
// <i>Defines time period of the SysTick timer interrupt
|
||||
#define SYSTICK_PERIOD_US 1000U
|
||||
|
||||
// </h>
|
||||
|
||||
// </h>
|
||||
|
||||
//------------- <<< end of configuration section >>> ---------------------------
|
3277
RTE/Device/STM32F746NGHx/RTE_Device.h
Normal file
3277
RTE/Device/STM32F746NGHx/RTE_Device.h
Normal file
File diff suppressed because it is too large
Load Diff
485
RTE/Device/STM32F746NGHx/startup_stm32f746xx.s
Normal file
485
RTE/Device/STM32F746NGHx/startup_stm32f746xx.s
Normal file
@@ -0,0 +1,485 @@
|
||||
;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f746xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 30-December-2016
|
||||
;* Description : STM32F746xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM7 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
|
||||
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
|
||||
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD CAN2_TX_IRQHandler ; CAN2 TX
|
||||
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
|
||||
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
|
||||
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream6_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
|
||||
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
|
||||
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream4_IRQHandler [WEAK]
|
||||
EXPORT ETH_IRQHandler [WEAK]
|
||||
EXPORT ETH_WKUP_IRQHandler [WEAK]
|
||||
EXPORT CAN2_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN2_SCE_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream7_IRQHandler [WEAK]
|
||||
EXPORT USART6_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_IRQHandler [WEAK]
|
||||
EXPORT DCMI_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT UART7_IRQHandler [WEAK]
|
||||
EXPORT UART8_IRQHandler [WEAK]
|
||||
EXPORT SPI4_IRQHandler [WEAK]
|
||||
EXPORT SPI5_IRQHandler [WEAK]
|
||||
EXPORT SPI6_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT LTDC_IRQHandler [WEAK]
|
||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
||||
EXPORT DMA2D_IRQHandler [WEAK]
|
||||
EXPORT SAI2_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT CEC_IRQHandler [WEAK]
|
||||
EXPORT I2C4_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C4_ER_IRQHandler [WEAK]
|
||||
EXPORT SPDIF_RX_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Stream0_IRQHandler
|
||||
DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream2_IRQHandler
|
||||
DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream6_IRQHandler
|
||||
ADC_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM9_IRQHandler
|
||||
TIM1_UP_TIM10_IRQHandler
|
||||
TIM1_TRG_COM_TIM11_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_CC_IRQHandler
|
||||
DMA1_Stream7_IRQHandler
|
||||
FMC_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream4_IRQHandler
|
||||
ETH_IRQHandler
|
||||
ETH_WKUP_IRQHandler
|
||||
CAN2_TX_IRQHandler
|
||||
CAN2_RX0_IRQHandler
|
||||
CAN2_RX1_IRQHandler
|
||||
CAN2_SCE_IRQHandler
|
||||
OTG_FS_IRQHandler
|
||||
DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream7_IRQHandler
|
||||
USART6_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_IRQHandler
|
||||
DCMI_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
UART7_IRQHandler
|
||||
UART8_IRQHandler
|
||||
SPI4_IRQHandler
|
||||
SPI5_IRQHandler
|
||||
SPI6_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
LTDC_IRQHandler
|
||||
LTDC_ER_IRQHandler
|
||||
DMA2D_IRQHandler
|
||||
SAI2_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
CEC_IRQHandler
|
||||
I2C4_EV_IRQHandler
|
||||
I2C4_ER_IRQHandler
|
||||
SPDIF_RX_IRQHandler
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
560
RTE/Device/STM32F746NGHx/stm32f7xx_hal_conf.h
Normal file
560
RTE/Device/STM32F746NGHx/stm32f7xx_hal_conf.h
Normal file
@@ -0,0 +1,560 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f7xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0 modified by ARM
|
||||
* @date 23-September-2016
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F7xx_HAL_CONF_H
|
||||
#define __STM32F7xx_HAL_CONF_H
|
||||
|
||||
#ifdef _RTE_
|
||||
#include "RTE_Components.h" // Component selection
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#ifdef RTE_DEVICE_HAL_COMMON
|
||||
#define HAL_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_ADC
|
||||
#define HAL_ADC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_CAN
|
||||
#define HAL_CAN_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_CEC
|
||||
#define HAL_CEC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_CRC
|
||||
#define HAL_CRC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_CRYP
|
||||
#define HAL_CRYP_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_DAC
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_DCMI
|
||||
#define HAL_DCMI_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_DMA
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_DMA2D
|
||||
#define HAL_DMA2D_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_ETH
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
#endif
|
||||
#if defined (RTE_DEVICE_HAL_FLASH) || defined (RTE_DEVICE_HAL_COMMON)
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_NAND
|
||||
#define HAL_NAND_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_NOR
|
||||
#define HAL_NOR_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SRAM
|
||||
#define HAL_SRAM_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SDRAM
|
||||
#define HAL_SDRAM_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_HASH
|
||||
#define HAL_HASH_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_GPIO
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_I2C
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_I2S
|
||||
#define HAL_I2S_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_IWDG
|
||||
#define HAL_IWDG_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_LPTIM
|
||||
#define HAL_LPTIM_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_LTDC
|
||||
#define HAL_LTDC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_PWR
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_QSPI
|
||||
#define HAL_QSPI_MODULE_ENABLED
|
||||
#endif
|
||||
#if defined RTE_DEVICE_HAL_RCC
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_RNG
|
||||
#define HAL_RNG_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_RTC
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SAI
|
||||
#define HAL_SAI_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SD
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SPDIFRX
|
||||
#define HAL_SPDIFRX_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SPI
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_TIM
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_UART
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_USART
|
||||
#define HAL_USART_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_IRDA
|
||||
#define HAL_IRDA_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SMARTCARD
|
||||
#define HAL_SMARTCARD_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_WWDG
|
||||
#define HAL_WWDG_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_CORTEX
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_PCD
|
||||
#define HAL_PCD_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_HCD
|
||||
#define HAL_HCD_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_DFSDM
|
||||
#define HAL_DFSDM_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_DSI
|
||||
#define HAL_DSI_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_JPEG
|
||||
#define HAL_JPEG_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_MDIOS
|
||||
#define HAL_MDIOS_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_SMBUS
|
||||
#define HAL_SMBUS_MODULE_ENABLED
|
||||
#endif
|
||||
#ifdef RTE_DEVICE_HAL_MMC
|
||||
#define HAL_MMC_MODULE_ENABLED
|
||||
#endif
|
||||
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848 PHY Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY 0x000000FFU
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY 0x00000FFFU
|
||||
|
||||
#define PHY_READ_TO 0x0000FFFFU
|
||||
#define PHY_WRITE_TO 0x0000FFFFU
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
|
||||
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||
#define PHY_MICR ((uint16_t)0x11U) /*!< MII Interrupt Control Register */
|
||||
#define PHY_MISR ((uint16_t)0x12U) /*!< MII Interrupt Status and Misc. Control Register */
|
||||
|
||||
#define PHY_LINK_STATUS ((uint16_t)0x0001U) /*!< PHY Link mask */
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
|
||||
#define PHY_MICR_INT_EN ((uint16_t)0x0002U) /*!< PHY Enable interrupts */
|
||||
#define PHY_MICR_INT_OE ((uint16_t)0x0001U) /*!< PHY Enable output interrupt events */
|
||||
|
||||
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */
|
||||
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 1U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_JPEG_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_jpeg.h"
|
||||
#endif /* HAL_JPEG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MDIOS_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_mdios.h"
|
||||
#endif /* HAL_MDIOS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f7xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F7xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
280
RTE/Device/STM32F746NGHx/system_stm32f7xx.c
Normal file
280
RTE/Device/STM32F746NGHx/system_stm32f7xx.c
Normal file
@@ -0,0 +1,280 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f7xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 30-December-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f7xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f7xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f7xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 16000000;
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F7xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
* SystemFrequency variable.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00000000;
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x24003010;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIR = 0x00000000;
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value
|
||||
* 25 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08: /* PLL used as system clock source */
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
||||
SYSCLK = PLL_VCO / PLL_P
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||
|
||||
if (pllsource != 0)
|
||||
{
|
||||
/* HSE used as PLL clock source */
|
||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSI used as PLL clock source */
|
||||
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
|
||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||
SystemCoreClock = pllvco/pllp;
|
||||
break;
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK frequency --------------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
38
RTE/Hesso_pack/clock_216.c
Normal file
38
RTE/Hesso_pack/clock_216.c
Normal file
@@ -0,0 +1,38 @@
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "clock_216.h"
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
// Setup system clock to 216MHz
|
||||
//------------------------------------------------------------------------------
|
||||
void SystemClock_Config (void) {
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
/* Activate the OverDrive to reach the 216 MHz Frequency */
|
||||
HAL_PWREx_EnableOverDrive();
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
|
||||
}
|
||||
|
||||
|
17
RTE/Hesso_pack/clock_216.h
Normal file
17
RTE/Hesso_pack/clock_216.h
Normal file
@@ -0,0 +1,17 @@
|
||||
/************************************************************************//**
|
||||
* \file clock_216.h
|
||||
* \brief Function to set the system clock to 216 MHz
|
||||
* \author pascal (dot) sartoretti (at) hevs (dot) ch
|
||||
***************************************************************************/
|
||||
#ifndef __CLOCK_216_H
|
||||
#define __CLOCK_216_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Inits the system clock to 216 MHz
|
||||
***************************************************************************/
|
||||
extern void SystemClock_Config (void);
|
||||
|
||||
|
||||
#endif /* __CLOCK_216_H */
|
58
RTE/Hesso_pack/ext_buttons.c
Normal file
58
RTE/Hesso_pack/ext_buttons.c
Normal file
@@ -0,0 +1,58 @@
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "ext_buttons.h"
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
int32_t Ext_Buttons_Init (void) {
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
|
||||
/* Configure GPIO pin: PI2 (BTN_0) */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||
/* Configure GPIO pin: PI3 (BTN_1) */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||
/* Configure GPIO pin: PG7 (BTN_2) */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
/* Configure GPIO pin: PG6 (BTN_3) */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
uint32_t Ext_Buttons_GetState (void) {
|
||||
uint32_t val = 0;
|
||||
|
||||
if (HAL_GPIO_ReadPin(GPIOI, GPIO_PIN_2) == GPIO_PIN_RESET) {
|
||||
val |= 1;
|
||||
}
|
||||
if (HAL_GPIO_ReadPin(GPIOI, GPIO_PIN_3) == GPIO_PIN_RESET) {
|
||||
val |= 2;
|
||||
}
|
||||
if (HAL_GPIO_ReadPin(GPIOG, GPIO_PIN_7) == GPIO_PIN_RESET) {
|
||||
val |= 4;
|
||||
}
|
||||
if (HAL_GPIO_ReadPin(GPIOG, GPIO_PIN_6) == GPIO_PIN_RESET) {
|
||||
val |= 8;
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
23
RTE/Hesso_pack/ext_buttons.h
Normal file
23
RTE/Hesso_pack/ext_buttons.h
Normal file
@@ -0,0 +1,23 @@
|
||||
/************************************************************************//**
|
||||
* \file ext_buttons.h
|
||||
* \brief Function to use the extension uart
|
||||
* \author pascal (dot) sartoretti (at) hevs (dot) ch
|
||||
***************************************************************************/
|
||||
#ifndef __EXT_BUTTONS_H
|
||||
#define __EXT_BUTTONS_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Inits the external buttons usage.
|
||||
* \return Always #0
|
||||
***************************************************************************/
|
||||
extern int32_t Ext_Buttons_Init(void);
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Reads the buttons status
|
||||
* \return The binary state of the buttons (example 4 for button 2 pressed).
|
||||
***************************************************************************/
|
||||
extern uint32_t Ext_Buttons_GetState(void);
|
||||
|
||||
#endif /* __BOARD_BUTTONS_H */
|
579
RTE/Hesso_pack/ext_keyboard.c
Normal file
579
RTE/Hesso_pack/ext_keyboard.c
Normal file
@@ -0,0 +1,579 @@
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "ext_keyboard.h"
|
||||
|
||||
#define TRUE 1
|
||||
#define FALSE 0
|
||||
#define NORMAL 0
|
||||
#define SHIFT 1
|
||||
#define CONTROL 2
|
||||
#define ALT 3
|
||||
#define TABULATOR 0x09
|
||||
#define BACKSPACE 0x08
|
||||
#define ESCAPE 0x1B
|
||||
#define CR 0x0D
|
||||
#define F1 0x10
|
||||
#define F2 0x11
|
||||
#define F3 0x12
|
||||
#define F4 0x13
|
||||
#define F5 0x14
|
||||
#define F6 0x15
|
||||
#define F7 0x16
|
||||
#define F8 0x17
|
||||
#define F9 0x18
|
||||
#define F10 0x19
|
||||
#define F11 0x1A
|
||||
#define F12 0x1B
|
||||
|
||||
static SPI_HandleTypeDef keyboard; // SPI keyboard handle
|
||||
uint8_t ext_kbChar; // exported to global use
|
||||
uint8_t scan;
|
||||
static uint32_t newChar=0; // internal flag
|
||||
uint8_t release;
|
||||
uint8_t state;
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
uint8_t ScanCodeAnalyse(uint8_t scan)
|
||||
{
|
||||
switch(scan)
|
||||
{
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0xF0: release = TRUE; return 0 ; /* release key code */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x14: if (release == FALSE)
|
||||
state = CONTROL;
|
||||
else
|
||||
{
|
||||
state = NORMAL;
|
||||
release = FALSE;
|
||||
}
|
||||
return 0x00;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x11: if (release == FALSE)
|
||||
state = ALT;
|
||||
else
|
||||
{
|
||||
state = NORMAL;
|
||||
release = FALSE;
|
||||
}
|
||||
return 0x00;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x12:
|
||||
case 0x58:
|
||||
case 0x59: if (release == FALSE)
|
||||
state = SHIFT;
|
||||
else
|
||||
{
|
||||
state = NORMAL;
|
||||
release = FALSE;
|
||||
}
|
||||
return 0x00;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
if (release == TRUE)
|
||||
{
|
||||
release = FALSE;
|
||||
return 0x00;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
switch(scan)
|
||||
{
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x05: return F1; // 'F1' to 'F12'
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x06: return F2;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x04: return F3;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x0c: return F4;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x03: return F5;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x0B: return F6;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x83: return F7;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x0A: return F8;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x01: return F9;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x09: return F10;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x78: return F11;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x07: return F12;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x16: switch (state) /* key '1' */
|
||||
{
|
||||
case NORMAL : return '1';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '!';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x1E: switch (state) /* key '2' */
|
||||
{
|
||||
case NORMAL : return '2';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '@';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x26: switch (state) /* key '3' */
|
||||
{
|
||||
case NORMAL : return '3';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '#';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x25: switch (state) /* key '4' */
|
||||
{
|
||||
case NORMAL : return '4';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '$';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x2E: switch (state) /* key '5' */
|
||||
{
|
||||
case NORMAL : return '5';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '%';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x36: switch (state) /* key '6' */
|
||||
{
|
||||
case NORMAL : return '6';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '^';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x6C:
|
||||
case 0x3D: switch (state) /* key '7' */
|
||||
{
|
||||
case NORMAL : return '7';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '&';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x75:
|
||||
case 0x3E: switch (state) /* key '8' */
|
||||
{
|
||||
case NORMAL : return '8';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '*';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x7D:
|
||||
case 0x46: switch (state) /* key '9' */
|
||||
{
|
||||
case NORMAL : return '9';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '(';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x7C:
|
||||
case 0x45: switch (state) /* key '0' */
|
||||
{
|
||||
case NORMAL : return '0';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return ')';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x7E: switch (state) /* key '*' */
|
||||
{
|
||||
case NORMAL : return '*';
|
||||
case CONTROL : return F11;
|
||||
case SHIFT : return '?';
|
||||
default : return 0xBF; /* ? vertical flipped */
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x4E: switch (state) /* key '-' */
|
||||
{
|
||||
case NORMAL : return '-';
|
||||
case CONTROL : return 0;
|
||||
case SHIFT : return '_';
|
||||
default : return 0x00;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x65: return 0x1B; /* End button -> Escape command */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x15: switch (state) /* key 'Q' */
|
||||
{
|
||||
case SHIFT : return 'Q';
|
||||
case CONTROL : return 0x11;
|
||||
default : return 'q';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x1D: switch (state) /* key 'W' */
|
||||
{
|
||||
case SHIFT : return 'W';
|
||||
case CONTROL : return 0x17;
|
||||
default : return 'w';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x24: switch (state) /* key 'E' */
|
||||
{
|
||||
case SHIFT : return 'E';
|
||||
case CONTROL : return 0x05;
|
||||
default : return 'e';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x2D: switch (state) /* key 'R' */
|
||||
{
|
||||
case SHIFT : return 'R';
|
||||
case CONTROL : return 0x12;
|
||||
default : return 'r';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x2C: switch (state) /* key 'T' */
|
||||
{
|
||||
case SHIFT : return 'T';
|
||||
case CONTROL : return 0x14;
|
||||
default : return 't';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x35: switch (state) /* key 'Z' */
|
||||
{
|
||||
case SHIFT : return 'Y';
|
||||
case CONTROL : return 0x1A;
|
||||
default : return 'y';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x6B:
|
||||
case 0x3C: switch (state) /* key 'U' */
|
||||
{
|
||||
case SHIFT : return 'U';
|
||||
case CONTROL : return 0x15;
|
||||
default : return 'u';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x73:
|
||||
case 0x43: switch (state) /* key 'I' */
|
||||
{
|
||||
case SHIFT : return 'I';
|
||||
case CONTROL : return 0x09;
|
||||
default : return 'i';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x74:
|
||||
case 0x44: switch (state) /* key 'O' */
|
||||
{
|
||||
case SHIFT : return 'O';
|
||||
case CONTROL : return 0x0F;
|
||||
default : return 'o';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x7B:
|
||||
case 0x4D: switch (state) /* key 'P' */
|
||||
{
|
||||
case SHIFT : return 'P';
|
||||
case CONTROL : return 0x10;
|
||||
default : return 'p';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x5B: switch (state) /* key '<27>' */
|
||||
{
|
||||
case SHIFT : return '}';
|
||||
case ALT : return 0;
|
||||
default : return ']';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x66: return 0x08; /* Backspace */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x0D: return 0x09; /* Horizontal tabulator */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x1C: switch (state) /* key 'A' */
|
||||
{
|
||||
case SHIFT : return 'A';
|
||||
case CONTROL : return 0x01;
|
||||
default : return 'a';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x1B: switch (state) /* key 'S' */
|
||||
{
|
||||
case SHIFT : return 'S';
|
||||
case CONTROL : return 0x13;
|
||||
default : return 's';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x23: switch (state) /* key 'D' */
|
||||
{
|
||||
case SHIFT : return 'D';
|
||||
case CONTROL : return 0x04;
|
||||
default : return 'd';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x2B: switch (state) /* key 'F' */
|
||||
{
|
||||
case SHIFT : return 'F';
|
||||
case CONTROL : return 0x06;
|
||||
default : return 'f';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x34: switch (state) /* key 'G' */
|
||||
{
|
||||
case SHIFT : return 'G';
|
||||
case CONTROL : return 0x07;
|
||||
default : return 'g';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x33: switch (state) /* key 'H' */
|
||||
{
|
||||
case SHIFT : return 'H';
|
||||
case CONTROL : return 0x08;
|
||||
default : return 'h';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x69:
|
||||
case 0x3B: switch (state) /* key 'J' */
|
||||
{
|
||||
case SHIFT : return 'J';
|
||||
case CONTROL : return 0x0A;
|
||||
default : return 'j';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x72:
|
||||
case 0x42: switch (state) /* key 'K' */
|
||||
{
|
||||
case SHIFT : return 'K';
|
||||
case CONTROL : return 0x0B;
|
||||
default : return 'k';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x7A:
|
||||
case 0x4B: switch (state) /* key 'L' */
|
||||
{
|
||||
case SHIFT : return 'L';
|
||||
case CONTROL : return 0x0C;
|
||||
default : return 'l';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x54: switch (state) /* key '[' */
|
||||
{
|
||||
case SHIFT : return '{';
|
||||
case ALT : return 0; /* beta symbol */
|
||||
default : return '[';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x52: switch (state) /* key ''' */
|
||||
{
|
||||
case SHIFT : return '"';
|
||||
case ALT : return 0;
|
||||
default : return 0x27;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x1A: switch (state) /* key 'Y' */
|
||||
{
|
||||
case SHIFT : return 'Z';
|
||||
case CONTROL : return 0x19;
|
||||
default : return 'z';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x22: switch (state) /* key 'X' */
|
||||
{
|
||||
case SHIFT : return 'X';
|
||||
case CONTROL : return 0x18;
|
||||
default : return 'x';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x21: switch (state) /* key 'C' */
|
||||
{
|
||||
case SHIFT : return 'C';
|
||||
case CONTROL : return 0x03;
|
||||
default : return 'c';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x2A: switch (state) /* key 'V' */
|
||||
{
|
||||
case SHIFT : return 'V';
|
||||
case CONTROL : return 0x16;
|
||||
default : return 'v';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x32: switch (state) /* key 'B' */
|
||||
{
|
||||
case SHIFT : return 'B';
|
||||
case CONTROL : return 0x02;
|
||||
default : return 'b';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x31: switch (state) /* key 'N' */
|
||||
{
|
||||
case SHIFT : return 'N';
|
||||
case CONTROL : return 0x0E;
|
||||
default : return 'n';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x70:
|
||||
case 0x3A: switch (state) /* key 'M' */
|
||||
{
|
||||
case SHIFT : return 'M';
|
||||
case CONTROL : return 0x0D;
|
||||
default : return 'm';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x41: switch (state) /* key ',' */
|
||||
{
|
||||
case SHIFT : return '<';
|
||||
default : return ',';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x49: switch (state) /* key '.' */
|
||||
{
|
||||
case SHIFT : return '>';
|
||||
default : return '.';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x5A: return 0x0D; /* Carriage return (Enter) */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x29: return ' '; /* Spacebar */
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x63: switch (state) /* key 'UP ARROW' */
|
||||
{
|
||||
case SHIFT : return 'U';
|
||||
default : return 'u';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x60: switch (state) /* key 'DOWN ARROW' */
|
||||
{
|
||||
case SHIFT : return 'D';
|
||||
default : return 'd';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x61: switch (state) /* key 'LEFT ARROW' */
|
||||
{
|
||||
case SHIFT : return 'L';
|
||||
default : return 'l';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x6A: switch (state) /* key 'RIGHT ARROW' */
|
||||
{
|
||||
case SHIFT : return 'R';
|
||||
default : return 'r';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x0E: switch (state) /* key 'apostroph' */
|
||||
{
|
||||
case SHIFT : return '~';
|
||||
default : return '`';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x79:
|
||||
case 0x4C: switch (state) /* key ';' */
|
||||
{
|
||||
case SHIFT : return ':';
|
||||
default : return ';';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x4A: switch (state) /* key '/' */
|
||||
{
|
||||
case SHIFT : return '?';
|
||||
default : return '/';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x5D: switch (state) /* key '\' */
|
||||
{
|
||||
case SHIFT : return '|';
|
||||
default : return '\\';
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
case 0x55: switch (state) /* key '=' */
|
||||
{
|
||||
case SHIFT : return '+';
|
||||
default : return '=';
|
||||
}
|
||||
}
|
||||
}
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
void EXTI9_5_IRQHandler(void)
|
||||
{
|
||||
// read keyboard data and store it on global variable
|
||||
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_0, GPIO_PIN_RESET); // SPI CS activate
|
||||
HAL_SPI_Receive(&keyboard,&scan,1,100); // SPI read
|
||||
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_0, GPIO_PIN_SET); // SPI CS desactivate
|
||||
// process irq
|
||||
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8); // clear irq and callback
|
||||
ext_kbChar = ScanCodeAnalyse(scan);
|
||||
if(ext_kbChar != 0)
|
||||
{
|
||||
newChar = 1;
|
||||
}
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
void Ext_Keyboard_Init(void)
|
||||
{
|
||||
volatile uint8_t dummy;
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_SPI2_CLK_ENABLE();
|
||||
|
||||
/**SPI2 GPIO Configuration
|
||||
PI1 ------> SPI2_SCK
|
||||
PB14 ------> SPI2_MISO
|
||||
PB15 ------> SPI2_MOSI
|
||||
PI0 ------> /SPI_CB_SS
|
||||
PF8 ------> /SPI_INT
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||
keyboard.Instance = SPI2;
|
||||
keyboard.Init.Mode = SPI_MODE_MASTER;
|
||||
keyboard.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
keyboard.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
keyboard.Init.CLKPolarity = SPI_POLARITY_HIGH;
|
||||
keyboard.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
keyboard.Init.NSS = SPI_NSS_SOFT;
|
||||
keyboard.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; //3.333MHz -> (Fosc/4) / 16
|
||||
keyboard.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
keyboard.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
keyboard.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
keyboard.Init.CRCPolynomial = 7;
|
||||
keyboard.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
|
||||
keyboard.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
|
||||
HAL_SPI_Init(&keyboard);
|
||||
// dummy read to clear any glitch
|
||||
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_0, GPIO_PIN_RESET);
|
||||
HAL_SPI_Receive(&keyboard,(uint8_t *)&dummy,1,10);
|
||||
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_0, GPIO_PIN_SET);
|
||||
// enable interrupts on keyboard ISR
|
||||
HAL_NVIC_SetPriority(EXTI9_5_IRQn,5,5);
|
||||
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
uint8_t Ext_Keyboard_Read(void)
|
||||
{
|
||||
while(newChar == 0) // wait new char coming
|
||||
{}
|
||||
newChar = 0; // clear it
|
||||
return ext_kbChar; // return read char
|
||||
}
|
||||
|
||||
|
||||
|
53
RTE/Hesso_pack/ext_keyboard.h
Normal file
53
RTE/Hesso_pack/ext_keyboard.h
Normal file
@@ -0,0 +1,53 @@
|
||||
/************************************************************************//**
|
||||
* \file ext_keyboard.h
|
||||
* \brief Function to use the extension keyboard
|
||||
* \author pascal (dot) sartoretti (at) hevs (dot) ch
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
#ifndef __EXT_KEYBOARD_H
|
||||
#define __EXT_KEYBOARD_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "stm32f7xx_hal.h"
|
||||
|
||||
extern uint8_t ext_kbChar;
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Inits the extension keyboard
|
||||
* The extension keyboard use interrupt from keyboard (PF8)
|
||||
*
|
||||
* Read keyboard non blocking (interrupt):
|
||||
* ---------------------------------------
|
||||
* To read the keyboard, the callback function HAL_GPIO_EXTI_Callback has
|
||||
* to be implemented.
|
||||
* the example below send the keyboard char to the serial port
|
||||
* void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
|
||||
* {
|
||||
* if(GPIO_Pin == GPIO_PIN_8)
|
||||
* {
|
||||
* HAL_UART_Transmit(&ext_uart, &ext_kbChar, 1,100);;
|
||||
* }
|
||||
* }
|
||||
* Read keyboard blocking (pooling until key pressed):
|
||||
* ---------------------------------------------------
|
||||
* The functions below have to be used:
|
||||
* pressed = Ext_Keyboard_Read();
|
||||
*
|
||||
* \warning The external interrupts (5,6,7,9) have to be implemented
|
||||
* in the ext_keyboard.c file because they share the same processor irq
|
||||
* EXTI9_5_IRQHandler.
|
||||
***************************************************************************/
|
||||
void Ext_Keyboard_Init(void);
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Read the pressed key on extension keyboard
|
||||
* \return The ASCII code of key pressed.
|
||||
*
|
||||
* \warning This function is blocking until a char is received
|
||||
***************************************************************************/
|
||||
uint8_t Ext_Keyboard_Read(void);
|
||||
|
||||
|
||||
#endif /* __BOARD_LED_H */
|
||||
|
224
RTE/Hesso_pack/ext_led.c
Normal file
224
RTE/Hesso_pack/ext_led.c
Normal file
@@ -0,0 +1,224 @@
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "ext_led.h"
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
static const uint8_t cie1931[101] =
|
||||
{
|
||||
0, 0, 1, 1, 1, 1, 2, 2, 2, 3,
|
||||
3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
|
||||
8, 8, 9, 10, 10, 11, 12, 13, 14, 15,
|
||||
16, 17, 18, 19, 20, 22, 23, 24, 26, 27,
|
||||
29, 30, 32, 34, 35, 37, 39, 41, 43, 45,
|
||||
47, 49, 51, 54, 56, 58, 61, 64, 66, 69,
|
||||
72, 75, 78, 81, 84, 87, 90, 93, 97, 100,
|
||||
104, 108, 111, 115, 119, 123, 127, 131, 136, 140,
|
||||
145, 149, 154, 159, 163, 168, 173, 179, 184, 189,
|
||||
195, 200, 206, 212, 217, 223, 230, 236, 242, 248,
|
||||
255,
|
||||
};
|
||||
|
||||
#if LIGHTNESS_PWM_STEP != 100
|
||||
#error this cie1931 array supports only 100 steps, feel free to implement your own
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
uint8_t lightness_to_pwm(uint8_t percentage)
|
||||
{
|
||||
if(percentage > (LIGHTNESS_PWM_STEP-1))
|
||||
percentage = (LIGHTNESS_PWM_STEP-1);
|
||||
|
||||
return cie1931[percentage];
|
||||
}
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
int32_t Ext_LED_Init(void) {
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
//----------------------------------------------------------------------------
|
||||
// Configure GPIO pin: PA15 (LED0)
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE(); // enable GPIO timer
|
||||
__HAL_RCC_TIM2_CLK_ENABLE(); // enable timer 2 clock
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_15; // used pin is PA15
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; // alternate function use
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL; // no pullup
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;// timer 2 is used
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST; // speed is fast
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
TIM2->CCER = TIM_CCER_CC1E; // compare for PWM usage
|
||||
TIM2->PSC = 16; // timer prescaler
|
||||
TIM2->ARR = 255; // max count value
|
||||
TIM2->CCR1 = lightness_to_pwm(0); // duty cycle
|
||||
TIM2->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE;
|
||||
TIM2->EGR |= TIM_EGR_UG; // update register now
|
||||
TIM2->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN; // start the timer
|
||||
//----------------------------------------------------------------------------
|
||||
// Configure GPIO pin: PH6 (LED1)
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE(); // enable GPIO timer
|
||||
__HAL_RCC_TIM12_CLK_ENABLE(); // enable timer 12 clock
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6; // used pin is PH6
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; // alternate function use
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL; // no pullup
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_TIM12;// timer 12 is used
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST; // speed is fast
|
||||
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
|
||||
|
||||
TIM12->CCER = TIM_CCER_CC1E; // compare for PWM usage
|
||||
TIM12->PSC = 16; // timer prescaler
|
||||
TIM12->ARR = 255; // max count value
|
||||
TIM12->CCR1 = lightness_to_pwm(0); // duty cycle
|
||||
TIM12->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE;
|
||||
TIM12->EGR |= TIM_EGR_UG; // update register now
|
||||
TIM12->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN; // start the timer
|
||||
//----------------------------------------------------------------------------
|
||||
// Configure GPIO pin: PA8 (LED2)
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE(); // enable GPIO timer
|
||||
__HAL_RCC_TIM1_CLK_ENABLE(); // enable timer 1 clock
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8; // used pin is PA8
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; // alternate function use
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL; // no pullup
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;// timer 5 is used
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST; // speed is fast
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
TIM1->CCER = TIM_CCER_CC1E; // compare for PWM usage
|
||||
TIM1->PSC = 16; // timer prescaler
|
||||
TIM1->ARR = 255; // max count value
|
||||
TIM1->CCR1 = lightness_to_pwm(0); // duty cycle
|
||||
TIM1->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE;
|
||||
TIM1->EGR |= TIM_EGR_UG; // update register now
|
||||
TIM1->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN; // start the timer
|
||||
TIM1->BDTR = TIM_BDTR_MOE; // master output enable
|
||||
//----------------------------------------------------------------------------
|
||||
// Configure GPIO pin: PB4 (LED3)
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE(); // enable GPIO timer
|
||||
__HAL_RCC_TIM3_CLK_ENABLE(); // enable timer 3 clock
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_4; // used pin is PB4
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; // alternate function use
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL; // no pullup
|
||||
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;// timer 3 is used
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FAST; // speed is fast
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
TIM3->CCER = TIM_CCER_CC1E; // compare for PWM usage
|
||||
TIM3->PSC = 16; // timer prescaler
|
||||
TIM3->ARR = 255; // max count value
|
||||
TIM3->CCR1 = lightness_to_pwm(0); // duty cycle
|
||||
TIM3->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1PE;
|
||||
TIM3->EGR |= TIM_EGR_UG; // update register now
|
||||
TIM3->CR1 = TIM_CR1_ARPE | TIM_CR1_CEN; // start the timer
|
||||
return 0;
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
int32_t Ext_LED_On (uint32_t num) {
|
||||
|
||||
if((num & 1) != 0)
|
||||
{
|
||||
TIM2->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
if((num & 2) != 0)
|
||||
{
|
||||
TIM12->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
if((num & 4) != 0)
|
||||
{
|
||||
TIM1->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
if((num & 8) != 0)
|
||||
{
|
||||
TIM3->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
int32_t Ext_LED_Off (uint32_t num) {
|
||||
|
||||
if((num & 1) != 0)
|
||||
{
|
||||
TIM2->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
if((num & 2) != 0)
|
||||
{
|
||||
TIM12->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
if((num & 4) != 0)
|
||||
{
|
||||
TIM1->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
if((num & 8) != 0)
|
||||
{
|
||||
TIM3->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
int32_t Ext_LED_PWM (uint32_t num, uint32_t duty) {
|
||||
|
||||
if((num & 1) != 0)
|
||||
{
|
||||
TIM2->CCR1 = lightness_to_pwm(duty);
|
||||
}
|
||||
if((num & 2) != 0)
|
||||
{
|
||||
TIM12->CCR1 = lightness_to_pwm(duty);
|
||||
}
|
||||
if((num & 4) != 0)
|
||||
{
|
||||
TIM1->CCR1 = lightness_to_pwm(duty);
|
||||
}
|
||||
if((num & 8) != 0)
|
||||
{
|
||||
TIM3->CCR1 = lightness_to_pwm(duty);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
int32_t Ext_LEDs(uint32_t num) {
|
||||
|
||||
if((num & 1) != 0)
|
||||
{
|
||||
TIM2->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
else
|
||||
{
|
||||
TIM2->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
if((num & 2) != 0)
|
||||
{
|
||||
TIM12->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
else
|
||||
{
|
||||
TIM12->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
if((num & 4) != 0)
|
||||
{
|
||||
TIM1->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
else
|
||||
{
|
||||
TIM1->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
if((num & 8) != 0)
|
||||
{
|
||||
TIM3->CCR1 = lightness_to_pwm(LIGHTNESS_PWM_STEP);
|
||||
}
|
||||
else
|
||||
{
|
||||
TIM3->CCR1 = lightness_to_pwm(0);
|
||||
}
|
||||
return 0;
|
||||
}
|
51
RTE/Hesso_pack/ext_led.h
Normal file
51
RTE/Hesso_pack/ext_led.h
Normal file
@@ -0,0 +1,51 @@
|
||||
/************************************************************************//**
|
||||
* \file ext_led.h
|
||||
* \brief Function to use the extension LEDs
|
||||
* \author pascal (dot) sartoretti (at) hevs (dot) ch
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
#ifndef __EXT_LED_H
|
||||
#define __EXT_LED_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define LIGHTNESS_PWM_STEP 100
|
||||
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Inits the external Leds usage.
|
||||
* \return Always #0
|
||||
***************************************************************************/
|
||||
extern int32_t Ext_LED_Init (void);
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Turn on one led.
|
||||
* \param num The led to turn on (1,2,4,8)
|
||||
* \return Always 0
|
||||
***************************************************************************/
|
||||
extern int32_t Ext_LED_On (uint32_t num);
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Turn off one led.
|
||||
* \param num The led to turn off (1,2,4,8)
|
||||
* \return Always 0
|
||||
***************************************************************************/
|
||||
extern int32_t Ext_LED_Off (uint32_t num);
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Set a power on a led.
|
||||
* \param num The led to turn set the power (1,2,4,8)
|
||||
* \param duty The power of the led (0 to 255)
|
||||
* \return Always 0
|
||||
***************************************************************************/
|
||||
extern int32_t Ext_LED_PWM (uint32_t num, uint32_t duty);
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Set the state on all leds.
|
||||
* \param val The binary state of the four leds (example 0b1101).
|
||||
* \return Always 0
|
||||
***************************************************************************/
|
||||
extern int32_t Ext_LEDs(uint32_t val);
|
||||
|
||||
#endif /* __BOARD_LED_H */
|
57
RTE/Hesso_pack/ext_uart.c
Normal file
57
RTE/Hesso_pack/ext_uart.c
Normal file
@@ -0,0 +1,57 @@
|
||||
|
||||
#include "stm32f7xx_hal.h"
|
||||
#include "ext_uart.h"
|
||||
|
||||
UART_HandleTypeDef ext_uart; // extension uart handler
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
if(huart->Instance==USART6)
|
||||
{
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_USART6_CLK_ENABLE();
|
||||
|
||||
/**USART6 GPIO Configuration
|
||||
PC7 ------> USART6_RX
|
||||
PC6 ------> USART6_TX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
}
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
void Ext_UART_Init(uint32_t speed)
|
||||
{
|
||||
ext_uart.Instance = USART6;
|
||||
ext_uart.Init.BaudRate = speed;
|
||||
ext_uart.Init.WordLength = UART_WORDLENGTH_8B;
|
||||
ext_uart.Init.StopBits = UART_STOPBITS_1;
|
||||
ext_uart.Init.Parity = UART_PARITY_NONE;
|
||||
ext_uart.Init.Mode = UART_MODE_TX_RX;
|
||||
ext_uart.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||
ext_uart.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||
ext_uart.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||
ext_uart.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||
HAL_UART_Init(&ext_uart);
|
||||
/* USART6 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USART6_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(USART6_IRQn);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
void USART6_IRQHandler(void)
|
||||
{
|
||||
HAL_UART_IRQHandler(&ext_uart);
|
||||
}
|
||||
|
||||
|
44
RTE/Hesso_pack/ext_uart.h
Normal file
44
RTE/Hesso_pack/ext_uart.h
Normal file
@@ -0,0 +1,44 @@
|
||||
/************************************************************************//**
|
||||
* \file ext_uart.h
|
||||
* \brief Function to use the extension uart
|
||||
* \author pascal (dot) sartoretti (at) hevs (dot) ch
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
#ifndef __EXT_UART_H
|
||||
#define __EXT_UART_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "stm32f7xx_hal.h"
|
||||
|
||||
extern UART_HandleTypeDef ext_uart; // extension uart handle
|
||||
|
||||
/************************************************************************//**
|
||||
* \brief Inits the extension uart
|
||||
* \param speed This si the uart speed selected for example 115200.
|
||||
* The extension uart could be use with or without interrupts.
|
||||
*
|
||||
* Without interrupts:
|
||||
* -------------------
|
||||
* To send something on the uart, you have to use HAL_UART_Transmit function
|
||||
* as the example below.
|
||||
* error = HAL_UART_Transmit(&ext_uart, msg, sizeof(msg),50);
|
||||
* To receive you have to use HAL_UART_Receive as example below.
|
||||
* error = HAL_UART_Receive(&ext_uart, msg, sizeof(msg),HAL_MAX_DELAY);
|
||||
* The HAL_MAX_DELAY waits until receive is finished.
|
||||
*
|
||||
* With interrupts:
|
||||
* ----------------
|
||||
* The functions below have to be used:
|
||||
* HAL_UART_Transmit_IT(&ext_uart," Welcome\n\r", 10);
|
||||
* HAL_UART_Receive_IT(&ext_uart,data,8);
|
||||
*
|
||||
* The callback functions above could be implemented for usage on interrupt
|
||||
* mode when the full size is transmitted (or received).
|
||||
* void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
|
||||
* void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
|
||||
*
|
||||
***************************************************************************/
|
||||
extern void Ext_UART_Init(uint32_t speed);
|
||||
|
||||
#endif /* __BOARD_LED_H */
|
61
RTE/_Target_1/RTE_Components.h
Normal file
61
RTE/_Target_1/RTE_Components.h
Normal file
@@ -0,0 +1,61 @@
|
||||
|
||||
/*
|
||||
* Auto generated Run-Time-Environment Configuration File
|
||||
* *** Do not modify ! ***
|
||||
*
|
||||
* Project: 'tokenring_project'
|
||||
* Target: 'Target 1'
|
||||
*/
|
||||
|
||||
#ifndef RTE_COMPONENTS_H
|
||||
#define RTE_COMPONENTS_H
|
||||
|
||||
|
||||
/*
|
||||
* Define the Device Header File:
|
||||
*/
|
||||
#define CMSIS_device_header "stm32f7xx.h"
|
||||
|
||||
/* ARM::CMSIS:RTOS2:Keil RTX5:Source:5.5.4 */
|
||||
#define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */
|
||||
#define RTE_CMSIS_RTOS2_RTX5 /* CMSIS-RTOS2 Keil RTX5 */
|
||||
#define RTE_CMSIS_RTOS2_RTX5_SOURCE /* CMSIS-RTOS2 Keil RTX5 Source */
|
||||
/* Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.5.1 */
|
||||
#define RTE_Compiler_EventRecorder
|
||||
#define RTE_Compiler_EventRecorder_DAP
|
||||
/* Keil.ARM Compiler::Compiler:I/O:STDOUT:ITM:1.2.0 */
|
||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||
#define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
|
||||
/* Keil::CMSIS Driver:I2C:1.9.0 */
|
||||
#define RTE_Drivers_I2C1 /* Driver I2C1 */
|
||||
#define RTE_Drivers_I2C2 /* Driver I2C2 */
|
||||
#define RTE_Drivers_I2C3 /* Driver I2C3 */
|
||||
#define RTE_Drivers_I2C4 /* Driver I2C4 */
|
||||
/* Keil::CMSIS Driver:SAI:1.5.0 */
|
||||
#define RTE_Drivers_SAI1 /* Driver SAI1 */
|
||||
#define RTE_Drivers_SAI2 /* Driver SAI2 */
|
||||
/* Keil::Device:STM32Cube Framework:Classic:1.2.7 */
|
||||
#define RTE_DEVICE_FRAMEWORK_CLASSIC
|
||||
/* Keil::Device:STM32Cube HAL:Common:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_COMMON
|
||||
/* Keil::Device:STM32Cube HAL:Cortex:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_CORTEX
|
||||
/* Keil::Device:STM32Cube HAL:DMA:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_DMA
|
||||
/* Keil::Device:STM32Cube HAL:GPIO:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_GPIO
|
||||
/* Keil::Device:STM32Cube HAL:PWR:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_PWR
|
||||
/* Keil::Device:STM32Cube HAL:RCC:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_RCC
|
||||
/* Keil::Device:STM32Cube HAL:SDRAM:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_SDRAM
|
||||
/* Keil::Device:STM32Cube HAL:SPI:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_SPI
|
||||
/* Keil::Device:STM32Cube HAL:UART:1.2.7 */
|
||||
#define RTE_DEVICE_HAL_UART
|
||||
/* Keil::Device:Startup:1.2.4 */
|
||||
#define RTE_DEVICE_STARTUP_STM32F7XX /* Device Startup for STM32F7 */
|
||||
|
||||
|
||||
#endif /* RTE_COMPONENTS_H */
|
473
RTE/uGFX_library/gfxconf.h
Normal file
473
RTE/uGFX_library/gfxconf.h
Normal file
@@ -0,0 +1,473 @@
|
||||
/**
|
||||
* This file has a different license to the rest of the uGFX system.
|
||||
* You can copy, modify and distribute this file as you see fit.
|
||||
* You do not need to publish your source modifications to this file.
|
||||
* The only thing you are not permitted to do is to relicense it
|
||||
* under a different license.
|
||||
*/
|
||||
|
||||
/**
|
||||
* Copy this file into your project directory and rename it as gfxconf.h
|
||||
* Edit your copy to turn on the uGFX features you want to use.
|
||||
* The values below are the defaults.
|
||||
*
|
||||
* Only remove the comments from lines where you want to change the
|
||||
* default value. This allows definitions to be included from
|
||||
* driver makefiles when required and provides the best future
|
||||
* compatibility for your project.
|
||||
*
|
||||
* Please use spaces instead of tabs in this file.
|
||||
*/
|
||||
//* <<< Use Configuration Wizard in Context Menu >>>
|
||||
#ifndef _GFXCONF_H
|
||||
#define _GFXCONF_H
|
||||
//<h> uGFX configuration with RTX5 operating system.
|
||||
//<i> Full documentation available at: https://wiki.ugfx.io
|
||||
#define CONF_WIZ_OS 1
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GOS - One of these must be defined, preferably in your Makefile //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
//#define GFX_USE_OS_CHIBIOS FALSE
|
||||
//#define GFX_USE_OS_FREERTOS FALSE
|
||||
// #define GFX_FREERTOS_USE_TRACE FALSE
|
||||
//#define GFX_USE_OS_WIN32 FALSE
|
||||
//#define GFX_USE_OS_LINUX FALSE
|
||||
//#define GFX_USE_OS_OSX FALSE
|
||||
//#define GFX_USE_OS_ECOS FALSE
|
||||
//#define GFX_USE_OS_RAWRTOS TRUE
|
||||
//#define GFX_USE_OS_ARDUINO FALSE
|
||||
//#define GFX_USE_OS_KEIL TRUE
|
||||
//#define GFX_USE_OS_CMSIS FALSE
|
||||
//#define GFX_USE_OS_CMSIS2 FALSE
|
||||
#if CONF_WIZ_OS == 0
|
||||
#define GFX_USE_OS_RAW32 TRUE
|
||||
#define GFX_USE_OS_RTX5 FALSE
|
||||
#define GFX_OS_PRE_INIT_FUNCTION Raw32OSInit
|
||||
#define GFX_OS_INIT_NO_WARNING TRUE
|
||||
#else
|
||||
#define GFX_USE_OS_RAW32 FALSE
|
||||
#define GFX_USE_OS_RTX5 TRUE
|
||||
#define GFX_OS_INIT_NO_WARNING TRUE
|
||||
#endif
|
||||
//#define GFX_USE_OS_ZEPHYR FALSE
|
||||
//#define GFX_USE_OS_NIOS FALSE
|
||||
//#define GFX_USE_OS_QT FALSE
|
||||
// #define INTERRUPTS_OFF() optional_code
|
||||
// #define INTERRUPTS_ON() optional_code
|
||||
|
||||
// Options that (should where relevant) apply to all operating systems
|
||||
// #define GFX_NO_INLINE FALSE
|
||||
#define GFX_COMPILER GFX_COMPILER_KEIL
|
||||
// #define GFX_SHOW_COMPILER FALSE
|
||||
#define GFX_CPU GFX_CPU_CORTEX_M7
|
||||
// #define GFX_CPU_NO_ALIGNMENT_FAULTS FALSE
|
||||
// #define GFX_CPU_ENDIAN GFX_CPU_ENDIAN_UNKNOWN
|
||||
//<o> GFX heap size (in bytes), min. 32000
|
||||
|
||||
#define GFX_OS_HEAP_SIZE 60000
|
||||
#define GFX_OS_NO_INIT TRUE
|
||||
// #define GFX_OS_EXTRA_INIT_FUNCTION myOSInitRoutine
|
||||
// #define GFX_OS_EXTRA_DEINIT_FUNCTION myOSDeInitRoutine
|
||||
// #define GFX_OS_CALL_UGFXMAIN FALSE
|
||||
// #define GFX_OS_UGFXMAIN_STACKSIZE 0
|
||||
// #define GFX_EMULATE_MALLOC FALSE
|
||||
//<o> LCD orientartion <0=> Board orientation
|
||||
// <90=> 90 degree rotate
|
||||
// <180=> 180 degree rotate (default laboratory)
|
||||
// <270=> 270 degree rotate
|
||||
#define GDISP_DEFAULT_ORIENTATION 180 // If not defined the native hardware orientation is used.
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GDISP //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// <e> GDISP configuration
|
||||
#define GFX_USE_GDISP 1
|
||||
#define GDISP_NEED_CONTROL 1 // always because LCD is 180 degree
|
||||
//<q> Use of draw circle functions
|
||||
#define GDISP_NEED_CIRCLE 1
|
||||
//<q> Use of draw circle into circle
|
||||
#define GDISP_NEED_DUALCIRCLE 0
|
||||
//<q> Use of draw ellipse functions
|
||||
#define GDISP_NEED_ELLIPSE 0
|
||||
//<q> Use of draw arc functions
|
||||
#define GDISP_NEED_ARC 0
|
||||
//<q> Use of draw arc sectors functions
|
||||
#define GDISP_NEED_ARCSECTORS 0
|
||||
//<q> Use of draw convex polygon functions
|
||||
#define GDISP_NEED_CONVEX_POLYGON 0
|
||||
//<q> Use of scrolling functions
|
||||
#define GDISP_NEED_SCROLL 0
|
||||
//<q> Use of read pixel functions
|
||||
#define GDISP_NEED_PIXELREAD 1
|
||||
//#define GDISP_NEED_QUERY FALSE
|
||||
#define GDISP_NEED_MULTITHREAD 1
|
||||
//#define GDISP_NEED_STREAMING FALSE
|
||||
//#define GDISP_NEED_AUTOFLUSH FALSE
|
||||
//#define GDISP_NEED_TIMERFLUSH FALSE
|
||||
|
||||
//<q> Control LCD boundaries
|
||||
#define GDISP_NEED_VALIDATION 0
|
||||
#define GDISP_NEED_CLIP TRUE
|
||||
// <e> Text usage
|
||||
#define GDISP_NEED_TEXT 1
|
||||
|
||||
//<q> Text word wrap
|
||||
#define GDISP_NEED_TEXT_WORDWRAP 1
|
||||
// #define GDISP_NEED_TEXT_BOXPADLR 1
|
||||
// #define GDISP_NEED_TEXT_BOXPADTB 1
|
||||
//<q> Text antialiasing
|
||||
#define GDISP_NEED_ANTIALIAS 1
|
||||
//<q> Text UTF8
|
||||
#define GDISP_NEED_UTF8 1
|
||||
//<q> Text kerning
|
||||
#define GDISP_NEED_TEXT_KERNING 1
|
||||
|
||||
// <e> Fonts (use one at least)
|
||||
#define FOR_CONF_WIZARD 1
|
||||
//<q> Font ui1
|
||||
#define GDISP_INCLUDE_FONT_UI1 0
|
||||
//<q> Font ui2
|
||||
#define GDISP_INCLUDE_FONT_UI2 1 // The smallest preferred font.
|
||||
//<q> Font Largenumbers
|
||||
#define GDISP_INCLUDE_FONT_LARGENUMBERS 0
|
||||
//<q> Font DejaVuSans10
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS10 0
|
||||
//<q> Font DejaVuSans12
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS12 0
|
||||
//<q> Font DejaVuSans16
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS16 0
|
||||
//<q> Font DejaVuSans20
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS20 0
|
||||
//<q> Font DejaVuSans24
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS24 0
|
||||
//<q> Font DejaVuSans32
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS32 0
|
||||
//<q> Font DejaVuSansBold12
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANSBOLD12 0
|
||||
//<q> Font Fixed_10x20
|
||||
#define GDISP_INCLUDE_FONT_FIXED_10X20 0
|
||||
//<q> Font Fixed_7x14
|
||||
#define GDISP_INCLUDE_FONT_FIXED_7X14 0
|
||||
//<q> Font Fixed_5x8
|
||||
#define GDISP_INCLUDE_FONT_FIXED_5X8 0
|
||||
//<q> Font DejaVuSans12_aa
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS12_AA 1
|
||||
//<q> Font DejaVuSans16_aa
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS16_AA 1
|
||||
//<q> Font DejaVuSans20_aa
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS20_AA 0
|
||||
//<q> Font Dejavusans24_aa
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS24_AA 0
|
||||
//<q> Font DejaVuSans32_aa
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANS32_AA 0
|
||||
//<q> Font DejaVuSansBold12_aa
|
||||
#define GDISP_INCLUDE_FONT_DEJAVUSANSBOLD12_AA 0
|
||||
//<q> Font user
|
||||
#define GDISP_INCLUDE_USER_FONTS 1
|
||||
// </e>
|
||||
// </e>
|
||||
// <e> Image usage
|
||||
#define GDISP_NEED_IMAGE 1
|
||||
// <e> Image bitmap (BMP)
|
||||
#define GDISP_NEED_IMAGE_BMP 1
|
||||
//<q> Bitmap 1 bit
|
||||
#define GDISP_NEED_IMAGE_BMP_1 0
|
||||
//<q> Bitmap 4 bits
|
||||
#define GDISP_NEED_IMAGE_BMP_4 0
|
||||
//<q> Bitmap 4 bits RLE compressed
|
||||
#define GDISP_NEED_IMAGE_BMP_4_RLE 1
|
||||
//<q> Bitmap 8 bits
|
||||
#define GDISP_NEED_IMAGE_BMP_8 0
|
||||
//<q> Bitmap 8 bits RLE compressed
|
||||
#define GDISP_NEED_IMAGE_BMP_8_RLE 1
|
||||
//<q> Bitmap 16 bits
|
||||
#define GDISP_NEED_IMAGE_BMP_16 0
|
||||
//<q> Bitmap 24 bits
|
||||
#define GDISP_NEED_IMAGE_BMP_24 0
|
||||
//<q> Bitmap 32 bits
|
||||
#define GDISP_NEED_IMAGE_BMP_32 0
|
||||
#define GDISP_IMAGE_BMP_BLIT_BUFFER_SIZE 32
|
||||
// </e>
|
||||
//<q> Image GIF
|
||||
#define GDISP_NEED_IMAGE_GIF 0
|
||||
#define GDISP_IMAGE_GIF_BLIT_BUFFER_SIZE 32
|
||||
//<q> Image JPG
|
||||
#define GDISP_NEED_IMAGE_JPG 0
|
||||
//<e> Image PNG
|
||||
#define GDISP_NEED_IMAGE_PNG 0
|
||||
//<q> PDG interlaced
|
||||
#define GDISP_NEED_IMAGE_PNG_INTERLACED 0
|
||||
//<q> PDG transparency
|
||||
#define GDISP_NEED_IMAGE_PNG_TRANSPARENCY 1
|
||||
//<q> PDG background
|
||||
#define GDISP_NEED_IMAGE_PNG_BACKGROUND 1
|
||||
// #define GDISP_NEED_IMAGE_PNG_ALPHACLIFF 32
|
||||
// #define GDISP_NEED_IMAGE_PNG_PALETTE_124 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_PALETTE_8 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_GRAYSCALE_124 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_GRAYSCALE_8 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_GRAYSCALE_16 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_GRAYALPHA_8 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_GRAYALPHA_16 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_RGB_8 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_RGB_16 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_RGBALPHA_8 TRUE
|
||||
// #define GDISP_NEED_IMAGE_PNG_RGBALPHA_16 TRUE
|
||||
// #define GDISP_IMAGE_PNG_BLIT_BUFFER_SIZE 32
|
||||
// #define GDISP_IMAGE_PNG_FILE_BUFFER_SIZE 8
|
||||
// #define GDISP_IMAGE_PNG_Z_BUFFER_SIZE 32768
|
||||
// </e>
|
||||
// #define GDISP_NEED_IMAGE_ACCOUNTING FALSE
|
||||
// #define GDISP_NEED_IMAGE_NATIVE FALSE
|
||||
|
||||
//#define GDISP_NEED_PIXMAP FALSE
|
||||
// #define GDISP_NEED_PIXMAP_IMAGE FALSE
|
||||
|
||||
//#define GDISP_LINEBUF_SIZE 128
|
||||
//#define GDISP_STARTUP_COLOR Black
|
||||
#define GDISP_NEED_STARTUP_LOGO FALSE
|
||||
|
||||
//#define GDISP_TOTAL_DISPLAYS 1
|
||||
|
||||
#define GDISP_DRIVER_LIST GDISPVMT_STM32LTDC
|
||||
// #ifdef GDISP_DRIVER_LIST
|
||||
// // For code and speed optimization define as TRUE or FALSE if all controllers have the same capability
|
||||
// #define GDISP_HARDWARE_STREAM_WRITE FALSE
|
||||
// #define GDISP_HARDWARE_STREAM_READ FALSE
|
||||
// #define GDISP_HARDWARE_STREAM_POS FALSE
|
||||
// #define GDISP_HARDWARE_DRAWPIXEL FALSE
|
||||
// #define GDISP_HARDWARE_CLEARS FALSE
|
||||
// #define GDISP_HARDWARE_FILLS FALSE
|
||||
// #define GDISP_HARDWARE_BITFILLS FALSE
|
||||
// #define GDISP_HARDWARE_SCROLL FALSE
|
||||
#define GDISP_HARDWARE_PIXELREAD GFXON
|
||||
// #define GDISP_HARDWARE_CONTROL FALSE
|
||||
// #define GDISP_HARDWARE_QUERY FALSE
|
||||
// #define GDISP_HARDWARE_CLIP FALSE
|
||||
|
||||
#define GDISP_PIXELFORMAT GDISP_PIXELFORMAT_RGB565
|
||||
// #endif
|
||||
|
||||
//#define GDISP_USE_GFXNET FALSE
|
||||
// #define GDISP_GFXNET_PORT 13001
|
||||
// #define GDISP_GFXNET_CUSTOM_LWIP_STARTUP FALSE
|
||||
// #define GDISP_DONT_WAIT_FOR_NET_DISPLAY FALSE
|
||||
// #define GDISP_GFXNET_UNSAFE_SOCKETS FALSE
|
||||
//</e>
|
||||
// </e>
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GWIN //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// <e> GWIN configuration
|
||||
#define GFX_USE_GWIN 1
|
||||
// <e> Use windows manager
|
||||
#define GWIN_NEED_WINDOWMANAGER 1
|
||||
//<q> Redraw imadiate
|
||||
#define GWIN_REDRAW_IMMEDIATE 0
|
||||
//<q> Redraw all windows in single operation
|
||||
#define GWIN_REDRAW_SINGLEOP 1
|
||||
//<q> Flashing widget support
|
||||
#define GWIN_NEED_FLASHING 0
|
||||
//<o> Flashing period
|
||||
#define GWIN_FLASHING_PERIOD 250
|
||||
// </e>
|
||||
// <e> Console support
|
||||
#define GWIN_NEED_CONSOLE 1
|
||||
//<q> Console history
|
||||
#define GWIN_CONSOLE_HISTORY_ATCREATE 1
|
||||
// #define GWIN_CONSOLE_USE_HISTORY
|
||||
// #define GWIN_CONSOLE_HISTORY_AVERAGING FALSE
|
||||
//<q> Use escape command for coloring
|
||||
#define GWIN_CONSOLE_ESCSEQ 1
|
||||
// #define GWIN_CONSOLE_USE_BASESTREAM FALSE // chibios only
|
||||
//<q> Floating numbers support
|
||||
#define GWIN_CONSOLE_USE_FLOAT 0
|
||||
//</e>
|
||||
//#define GWIN_NEED_GRAPH FALSE
|
||||
//#define GWIN_NEED_GL3D FALSE
|
||||
//<q> Widget support
|
||||
#define GWIN_NEED_WIDGET 1
|
||||
//#define GWIN_FOCUS_HIGHLIGHT_WIDTH 1
|
||||
//<q> Label support
|
||||
#define GWIN_NEED_LABEL 1
|
||||
// #define GWIN_LABEL_ATTRIBUTE FALSE
|
||||
//<q> Button support
|
||||
#define GWIN_NEED_BUTTON 1
|
||||
// #define GWIN_BUTTON_LAZY_RELEASE FALSE
|
||||
//<q> Slider support
|
||||
#define GWIN_NEED_SLIDER 0
|
||||
// #define GWIN_SLIDER_NOSNAP FALSE
|
||||
// #define GWIN_SLIDER_DEAD_BAND 5
|
||||
// #define GWIN_SLIDER_TOGGLE_INC 20
|
||||
//<q> Checkbox support
|
||||
#define GWIN_NEED_CHECKBOX 1
|
||||
//<e> Image support
|
||||
#define GWIN_NEED_IMAGE 1
|
||||
//<q> Image animation support
|
||||
#define GWIN_NEED_IMAGE_ANIMATION 0
|
||||
//</e>
|
||||
//<q> Radio button support
|
||||
#define GWIN_NEED_RADIO 1
|
||||
//<e> List support
|
||||
#define GWIN_NEED_LIST 0
|
||||
//<q> List image support
|
||||
#define GWIN_NEED_LIST_IMAGES 0
|
||||
// </e>
|
||||
|
||||
//<q> Progressbar support
|
||||
#define GWIN_NEED_PROGRESSBAR 0
|
||||
// #define GWIN_PROGRESSBAR_AUTO FALSE
|
||||
//<q> Keyboard support
|
||||
#define GWIN_NEED_KEYBOARD 0
|
||||
// #define GWIN_KEYBOARD_DEFAULT_LAYOUT VirtualKeyboard_English1
|
||||
// #define GWIN_NEED_KEYBOARD_ENGLISH1 TRUE
|
||||
//<q> Text edit support
|
||||
#define GWIN_NEED_TEXTEDIT 0
|
||||
// #define GWIN_FLAT_STYLING FALSE
|
||||
//<q> Widgets tag support
|
||||
#define GWIN_WIDGET_TAGS 1
|
||||
//<q> Containers support
|
||||
#define GWIN_NEED_CONTAINERS 1
|
||||
//<q> Need container support
|
||||
#define GWIN_NEED_CONTAINER 1
|
||||
//<q> Frame support
|
||||
#define GWIN_NEED_FRAME 0
|
||||
//<q> Tabset support (see details)
|
||||
#define GWIN_NEED_TABSET 0
|
||||
// #define GWIN_TABSET_TABHEIGHT 18
|
||||
// </e>
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GTRANS //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
//#define GFX_USE_GTRANS FALSE
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GEVENT //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// <e> GEVENT configuration
|
||||
#define GFX_USE_GEVENT 1
|
||||
|
||||
//#define GEVENT_ASSERT_NO_RESOURCE FALSE
|
||||
//<o> Maximum size of an event (in bytes)
|
||||
#define GEVENT_MAXIMUM_SIZE 32
|
||||
//<o> Maximum Source/Listener pair
|
||||
#define GEVENT_MAX_SOURCE_LISTENERS 32
|
||||
|
||||
//</e>
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GTIMER //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
#define GFX_USE_GTIMER 1
|
||||
|
||||
#define GTIMER_THREAD_PRIORITY HIGH_PRIORITY
|
||||
#define GTIMER_THREAD_WORKAREA_SIZE 4096
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GQUEUE //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
#define GFX_USE_GQUEUE TRUE
|
||||
|
||||
#define GQUEUE_NEED_ASYNC TRUE
|
||||
//#define GQUEUE_NEED_GSYNC FALSE
|
||||
//#define GQUEUE_NEED_FSYNC FALSE
|
||||
//#define GQUEUE_NEED_BUFFERS FALSE
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GINPUT //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// <e> GINPUT configuration
|
||||
#define GFX_USE_GINPUT 1
|
||||
|
||||
//<q> Mouse / touchscreen support
|
||||
#define GINPUT_NEED_MOUSE 1
|
||||
// #define GINPUT_TOUCH_STARTRAW FALSE
|
||||
|
||||
// #define GINPUT_TOUCH_NOTOUCH FALSE
|
||||
// #define GINPUT_TOUCH_NOCALIBRATE FALSE
|
||||
#define GINPUT_TOUCH_NOCALIBRATE_GUI TRUE
|
||||
// #define GINPUT_MOUSE_POLL_PERIOD 25
|
||||
// #define GINPUT_MOUSE_CLICK_TIME 300
|
||||
// #define GINPUT_TOUCH_CXTCLICK_TIME 700
|
||||
// #define GINPUT_TOUCH_USER_CALIBRATION_LOAD FALSE
|
||||
// #define GINPUT_TOUCH_USER_CALIBRATION_SAVE FALSE
|
||||
#define GMOUSE_DRIVER_LIST GMOUSEVMT_FT5336
|
||||
//<q> Keyboard support
|
||||
#define GINPUT_NEED_KEYBOARD 0
|
||||
// #define GINPUT_KEYBOARD_POLL_PERIOD 200
|
||||
// #define GKEYBOARD_DRIVER_LIST GKEYBOARDVMT_Win32, GKEYBOARDVMT_Win32
|
||||
// #define GKEYBOARD_LAYOUT_OFF FALSE
|
||||
// #define GKEYBOARD_LAYOUT_SCANCODE2_US FALSE
|
||||
//#define GINPUT_NEED_TOGGLE FALSE
|
||||
//#define GINPUT_NEED_DIAL FALSE
|
||||
//</e>
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GFILE //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// <e> GFILE configuration
|
||||
#define GFX_USE_GFILE 1
|
||||
// <e> String support
|
||||
#define GFILE_NEED_STRINGS 0
|
||||
//<q> printfg, fprintg, etc support
|
||||
#define GFILE_NEED_PRINTG 0
|
||||
//<q> scang, fscang, etc support
|
||||
#define GFILE_NEED_SCANG 0
|
||||
//</e>
|
||||
//#define GFILE_NEED_FILELISTS FALSE
|
||||
//#define GFILE_NEED_STDIO FALSE
|
||||
//#define GFILE_NEED_NOAUTOMOUNT FALSE
|
||||
//#define GFILE_NEED_NOAUTOSYNC FALSE
|
||||
|
||||
//#define GFILE_NEED_MEMFS FALSE
|
||||
//<q> ROM file system support
|
||||
#define GFILE_NEED_ROMFS 1
|
||||
//<q> RAM file system support
|
||||
#define GFILE_NEED_RAMFS 0
|
||||
//#define GFILE_NEED_FATFS FALSE
|
||||
//#define GFILE_NEED_NATIVEFS FALSE
|
||||
//#define GFILE_NEED_CHBIOSFS FALSE
|
||||
//#define GFILE_NEED_USERFS FALSE
|
||||
|
||||
//#define GFILE_ALLOW_FLOATS FALSE
|
||||
//#define GFILE_ALLOW_DEVICESPECIFIC FALSE
|
||||
//<o> Maximum number of files
|
||||
#define GFILE_MAX_GFILES 6
|
||||
//</e>
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GADC //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
//#define GFX_USE_GADC FALSE
|
||||
// #define GADC_MAX_LOWSPEED_DEVICES 4
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GAUDIO //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
//#define GFX_USE_GAUDIO FALSE
|
||||
// #define GAUDIO_NEED_PLAY FALSE
|
||||
// #define GAUDIO_NEED_RECORD FALSE
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// GMISC //
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
// <e> GMISC configuration (see details in file)
|
||||
#define GFX_USE_GMISC 0
|
||||
|
||||
//#define GMISC_NEED_ARRAYOPS FALSE
|
||||
//#define GMISC_NEED_FASTTRIG FALSE
|
||||
//#define GMISC_NEED_FIXEDTRIG FALSE
|
||||
//#define GMISC_NEED_INVSQRT FALSE
|
||||
// #define GMISC_INVSQRT_MIXED_ENDIAN FALSE
|
||||
// #define GMISC_INVSQRT_REAL_SLOW FALSE
|
||||
#define GMISC_NEED_MATRIXFLOAT2D 0
|
||||
//#define GMISC_NEED_MATRIXFIXED2D FALSE
|
||||
//#define GMISC_NEED_HITTEST_POLY FALSE
|
||||
// </e>
|
||||
//</h>
|
||||
|
||||
|
||||
#endif /* _GFXCONF_H */
|
82
RTE/uGFX_library/stm32f7_i2c.c
Normal file
82
RTE/uGFX_library/stm32f7_i2c.c
Normal file
@@ -0,0 +1,82 @@
|
||||
#include "gfx.h"
|
||||
|
||||
#include "stm32f7_i2c.h"
|
||||
#include "Driver_I2C.h"
|
||||
|
||||
/* I2C Driver */
|
||||
extern ARM_DRIVER_I2C Driver_I2C3;
|
||||
static ARM_DRIVER_I2C * I2Cdrv = &Driver_I2C3;
|
||||
|
||||
|
||||
#ifndef EEPROM_I2C_PORT
|
||||
#define EEPROM_I2C_PORT 3 /* I2C Port number */
|
||||
#endif
|
||||
|
||||
|
||||
#define A_WR 0 /* Master will write to the I2C */
|
||||
#define A_RD 1 /* Master will read from the I2C */
|
||||
|
||||
static uint8_t wr_buf[256];
|
||||
uint8_t gI2CAccess = 0;
|
||||
bool_t i2cInit(I2C_TypeDef* i2c)
|
||||
{
|
||||
gI2CAccess = 1;
|
||||
I2Cdrv->Initialize (NULL);
|
||||
I2Cdrv->PowerControl (ARM_POWER_FULL);
|
||||
I2Cdrv->Control (ARM_I2C_BUS_SPEED, ARM_I2C_BUS_SPEED_STANDARD);
|
||||
I2Cdrv->Control (ARM_I2C_BUS_CLEAR, 0);
|
||||
gI2CAccess = 0;
|
||||
|
||||
|
||||
return 1; // just says no error
|
||||
}
|
||||
|
||||
|
||||
void i2cWriteReg(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr, uint8_t value)
|
||||
{
|
||||
wr_buf[0] = regAddr;
|
||||
wr_buf[1] = value;
|
||||
gI2CAccess = 1;
|
||||
|
||||
I2Cdrv->MasterTransmit (slaveAddr/2, wr_buf, 2, false);
|
||||
while (I2Cdrv->GetStatus().busy);
|
||||
if (I2Cdrv->GetDataCount () != 2) return;
|
||||
/* Acknowledge polling */
|
||||
gI2CAccess = 0;
|
||||
|
||||
// do {
|
||||
// I2Cdrv->MasterReceive (DeviceAddr, &wr_buf[0], 1, false);
|
||||
// while (I2Cdrv->GetStatus().busy);
|
||||
// } while (I2Cdrv->GetDataCount () < 0);
|
||||
|
||||
}
|
||||
|
||||
uint8_t i2cReadByte(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr)
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
gI2CAccess = 1;
|
||||
|
||||
I2Cdrv->MasterTransmit (slaveAddr/2, ®Addr, 1, true);
|
||||
while (I2Cdrv->GetStatus().busy);
|
||||
I2Cdrv->MasterReceive (slaveAddr/2, &ret, 1, false);
|
||||
while (I2Cdrv->GetStatus().busy);
|
||||
if (I2Cdrv->GetDataCount () != 1) return 0xAA;
|
||||
gI2CAccess = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint16_t i2cReadWord(I2C_TypeDef* i2c, uint8_t slaveAddr, uint8_t regAddr)
|
||||
{
|
||||
uint8_t ret[2] = { 0, 0 };
|
||||
gI2CAccess = 1;
|
||||
|
||||
I2Cdrv->MasterTransmit (slaveAddr/2, ®Addr, 1, true);
|
||||
while (I2Cdrv->GetStatus().busy);
|
||||
I2Cdrv->MasterReceive (slaveAddr/2, ret, 2, false);
|
||||
while (I2Cdrv->GetStatus().busy);
|
||||
if (I2Cdrv->GetDataCount () != 2) return 0xAAAA;
|
||||
gI2CAccess = 0;
|
||||
|
||||
return (uint16_t)((ret[0] << 8) | (ret[1] & 0x00FF));
|
||||
}
|
Reference in New Issue
Block a user