1
0
mirror of https://github.com/Klagarge/Cursor.git synced 2024-11-22 17:43:26 +00:00

try to debug 2

This commit is contained in:
Rémi Heredero 2021-12-21 14:42:09 +01:00
parent 39617b48f4
commit 431a1a01ed
23 changed files with 1385 additions and 1379 deletions

View File

@ -131,23 +131,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\struct.bd.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\struct.bd.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\struct.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -167,11 +167,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Main"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Main"
)
(vvPair
variable "date"
@ -211,7 +211,7 @@ value "struct"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -223,11 +223,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:59"
)
(vvPair
variable "group"
@ -235,7 +235,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -267,11 +267,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\struct.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\struct.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Main\\struct.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Main\\struct.bd"
)
(vvPair
variable "package_name"
@ -299,7 +299,7 @@ value "struct"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:59"
)
(vvPair
variable "unit"
@ -307,7 +307,7 @@ value "Main"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -534,7 +534,7 @@ uid 49,0
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 3,0
@ -3068,43 +3068,6 @@ uid 72,0
va (VaSet
vasetType 3
)
xt "95000,22000,115000,22000"
pts [
"115000,22000"
"95000,22000"
]
)
start &9
end &38
sat 32
eat 2
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
isHidden 1
)
xt "114000,20800,116700,22000"
st "RaZ"
blo "114000,21800"
tm "WireNameMgr"
)
)
on &10
)
*112 (Wire
uid 71,0
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
)
xt "35000,40000,114000,45000"
pts [
"114000,45000"
@ -3137,6 +3100,43 @@ tm "WireNameMgr"
)
on &16
)
*112 (Wire
uid 71,0
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
)
xt "95000,22000,115000,22000"
pts [
"115000,22000"
"95000,22000"
]
)
start &9
end &38
sat 32
eat 2
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
isHidden 1
)
xt "114000,20800,116700,22000"
st "RaZ"
blo "114000,21800"
tm "WireNameMgr"
)
)
on &10
)
*113 (Wire
uid 85,0
optionalChildren [
@ -5639,12 +5639,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,11,1715,1130"
viewArea "-20675,-15400,90850,58925"
windowSize "0,0,1537,960"
viewArea "-20700,-29676,91874,41876"
cachedDiagramExtent "-37000,-20200,122900,50000"
hasePageBreakOrigin 1
pageBreakOrigin "-82000,-49000"
lastUid 3379,0
lastUid 3566,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -6731,7 +6731,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 3,0

View File

@ -90,7 +90,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 77,0
@ -561,23 +561,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -597,11 +597,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Main"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Main"
)
(vvPair
variable "date"
@ -641,7 +641,7 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -653,11 +653,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:59"
)
(vvPair
variable "group"
@ -665,7 +665,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -697,11 +697,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Main\\symbol.sb"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Main\\symbol.sb"
)
(vvPair
variable "package_name"
@ -729,7 +729,7 @@ value "symbol"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:59"
)
(vvPair
variable "unit"
@ -737,7 +737,7 @@ value "Main"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -888,15 +888,15 @@ uid 893,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,71500,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,67000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 77,0
@ -2031,6 +2031,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1146,0
lastUid 1169,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,11 +70,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
)
(vvPair
variable "date"
@ -114,7 +114,7 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:02:25"
value "14:39:05"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -170,11 +170,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:02:25"
value "14:39:05"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "accelerator"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -1153,7 +1153,7 @@ lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
)
xt "16230,25272,51930,26672"
xt "15930,25272,52230,26672"
)
autoResize 1
tline (Line
@ -1164,10 +1164,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "16330,25172,51830,25172"
xt "16030,25172,52130,25172"
pts [
"16330,25172"
"51830,25172"
"16030,25172"
"52130,25172"
]
)
bline (Line
@ -1178,10 +1178,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "16330,24572,51830,24572"
xt "16030,24572,52130,24572"
pts [
"16330,24572"
"51830,24572"
"16030,24572"
"52130,24572"
]
)
ttri (Triangle
@ -1195,7 +1195,7 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "15880,24797,16230,25147"
xt "15580,24797,15930,25147"
)
btri (Triangle
uid 1014,0
@ -1208,21 +1208,21 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "15880,22397,16230,22747"
xt "15580,22397,15930,22747"
)
entryActions (MLText
uid 1015,0
va (VaSet
)
xt "16330,24972,16330,24972"
xt "16030,24972,16030,24972"
tm "Actions"
)
inActions (MLText
uid 1016,0
va (VaSet
)
xt "16330,25372,51830,26572"
st "power_acceleration <= (257 - ((Position - info_accleration)/17));"
xt "16030,25372,52130,26572"
st "power_acceleration <= (257 - ((Position - info_acceleration)/17));"
tm "Actions"
)
exitActions (MLText
@ -1312,7 +1312,7 @@ lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
)
xt "55778,22488,91678,23888"
xt "55478,22488,91978,23888"
)
autoResize 1
tline (Line
@ -1323,10 +1323,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "55878,22388,91578,22388"
xt "55578,22388,91878,22388"
pts [
"55878,22388"
"91578,22388"
"55578,22388"
"91878,22388"
]
)
bline (Line
@ -1337,10 +1337,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "55878,21788,91578,21788"
xt "55578,21788,91878,21788"
pts [
"55878,21788"
"91578,21788"
"55578,21788"
"91878,21788"
]
)
ttri (Triangle
@ -1354,7 +1354,7 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "55428,22013,55778,22363"
xt "55128,22013,55478,22363"
)
btri (Triangle
uid 1031,0
@ -1367,21 +1367,21 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "55428,19613,55778,19963"
xt "55128,19613,55478,19963"
)
entryActions (MLText
uid 1032,0
va (VaSet
)
xt "55878,22188,55878,22188"
xt "55578,22188,55578,22188"
tm "Actions"
)
inActions (MLText
uid 1033,0
va (VaSet
)
xt "55878,22588,91578,23788"
st "power_acceleration <= (257 - ((Position + info_accleration)/17));"
xt "55578,22588,91878,23788"
st "power_acceleration <= (257 - ((Position + info_acceleration)/17));"
tm "Actions"
)
exitActions (MLText
@ -2206,9 +2206,9 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1715,1143"
viewArea "14600,-900,85976,45324"
cachedDiagramExtent "0,-1000,91678,47000"
windowSize "0,0,1537,960"
viewArea "14600,-900,86595,44860"
cachedDiagramExtent "0,-1000,91978,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
isTopLevel 1
@ -2581,7 +2581,7 @@ stateOrder [
name "csm"
)
]
lastUid 1198,0
lastUid 1227,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *61 (LEmptyRow
@ -2644,7 +2644,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
)
@ -2656,7 +2656,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_ulogic"
o 2
)
)
@ -2669,7 +2669,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 5
)
)
@ -3944,6 +3944,6 @@ pts [
]
)
)
activeModelName "StateMachine:CDM"
activeModelName "StateMachine"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 73,0
suid 80,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -67,10 +67,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 2
suid 67,0
suid 74,0
)
)
uid 950,0
uid 1022,0
)
*15 (LogPort
port (LogicalPort
@ -78,11 +78,11 @@ lang 11
decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 68,0
o 3
suid 75,0
)
)
uid 952,0
uid 1024,0
)
*16 (LogPort
port (LogicalPort
@ -91,24 +91,24 @@ decl (Decl
n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 3
suid 69,0
o 4
suid 76,0
)
)
uid 954,0
uid 1026,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 70,0
suid 77,0
)
)
uid 956,0
uid 1028,0
)
*18 (LogPort
port (LogicalPort
@ -118,11 +118,11 @@ decl (Decl
n "power_acceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 71,0
o 7
suid 78,0
)
)
uid 958,0
uid 1030,0
)
*19 (LogPort
port (LogicalPort
@ -130,11 +130,11 @@ lang 11
decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 72,0
o 5
suid 79,0
)
)
uid 960,0
uid 1032,0
)
*20 (LogPort
port (LogicalPort
@ -142,11 +142,11 @@ lang 11
decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 73,0
o 6
suid 80,0
)
)
uid 962,0
uid 1034,0
)
]
)
@ -202,43 +202,43 @@ uid 106,0
litem &14
pos 0
dimension 20
uid 951,0
uid 1023,0
)
*27 (MRCItem
litem &15
pos 1
dimension 20
uid 953,0
uid 1025,0
)
*28 (MRCItem
litem &16
pos 2
dimension 20
uid 955,0
uid 1027,0
)
*29 (MRCItem
litem &17
pos 3
dimension 20
uid 957,0
uid 1029,0
)
*30 (MRCItem
litem &18
pos 4
dimension 20
uid 959,0
uid 1031,0
)
*31 (MRCItem
litem &19
pos 5
dimension 20
uid 961,0
uid 1033,0
)
*32 (MRCItem
litem &20
pos 6
dimension 20
uid 963,0
uid 1035,0
)
]
)
@ -469,23 +469,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -505,11 +505,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator"
)
(vvPair
variable "date"
@ -549,7 +549,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -561,11 +561,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:06:44"
value "14:39:05"
)
(vvPair
variable "group"
@ -573,7 +573,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -605,11 +605,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\accelerator\\interface"
)
(vvPair
variable "package_name"
@ -637,7 +637,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:06:44"
value "14:39:05"
)
(vvPair
variable "unit"
@ -645,7 +645,7 @@ value "accelerator"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -672,10 +672,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*66 (CptPort
uid 915,0
uid 987,0
ps "OnEdgeStrategy"
shape (Triangle
uid 916,0
uid 988,0
ro 90
va (VaSet
vasetType 1
@ -684,11 +684,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 917,0
uid 989,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 918,0
uid 990,0
va (VaSet
font "Verdana,12,0"
)
@ -699,7 +699,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 919,0
uid 991,0
va (VaSet
font "Courier New,8,0"
)
@ -713,15 +713,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 2
suid 67,0
suid 74,0
)
)
)
*67 (CptPort
uid 920,0
uid 992,0
ps "OnEdgeStrategy"
shape (Triangle
uid 921,0
uid 993,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -729,11 +729,11 @@ fg "0,65535,0"
xt "19625,16000,20375,16750"
)
tg (CPTG
uid 922,0
uid 994,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 923,0
uid 995,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -745,7 +745,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 924,0
uid 996,0
va (VaSet
font "Courier New,8,0"
)
@ -758,16 +758,16 @@ lang 11
decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 68,0
o 3
suid 75,0
)
)
)
*68 (CptPort
uid 925,0
uid 997,0
ps "OnEdgeStrategy"
shape (Triangle
uid 926,0
uid 998,0
ro 90
va (VaSet
vasetType 1
@ -776,11 +776,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 927,0
uid 999,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 928,0
uid 1000,0
va (VaSet
font "Verdana,12,0"
)
@ -791,7 +791,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 929,0
uid 1001,0
va (VaSet
font "Courier New,8,0"
)
@ -805,16 +805,16 @@ decl (Decl
n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 3
suid 69,0
o 4
suid 76,0
)
)
)
*69 (CptPort
uid 930,0
uid 1002,0
ps "OnEdgeStrategy"
shape (Triangle
uid 931,0
uid 1003,0
ro 90
va (VaSet
vasetType 1
@ -823,11 +823,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 932,0
uid 1004,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 933,0
uid 1005,0
va (VaSet
font "Verdana,12,0"
)
@ -838,30 +838,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 934,0
uid 1006,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,76500,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 70,0
suid 77,0
)
)
)
*70 (CptPort
uid 935,0
uid 1007,0
ps "OnEdgeStrategy"
shape (Triangle
uid 936,0
uid 1008,0
ro 90
va (VaSet
vasetType 1
@ -870,11 +870,11 @@ fg "0,65535,0"
xt "23000,6625,23750,7375"
)
tg (CPTG
uid 937,0
uid 1009,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 938,0
uid 1010,0
va (VaSet
font "Verdana,12,0"
)
@ -886,7 +886,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 939,0
uid 1011,0
va (VaSet
font "Courier New,8,0"
)
@ -901,16 +901,16 @@ decl (Decl
n "power_acceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 71,0
o 7
suid 78,0
)
)
)
*71 (CptPort
uid 940,0
uid 1012,0
ps "OnEdgeStrategy"
shape (Triangle
uid 941,0
uid 1013,0
ro 90
va (VaSet
vasetType 1
@ -919,11 +919,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 942,0
uid 1014,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 943,0
uid 1015,0
va (VaSet
font "Verdana,12,0"
)
@ -934,7 +934,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 944,0
uid 1016,0
va (VaSet
font "Courier New,8,0"
)
@ -947,16 +947,16 @@ lang 11
decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 72,0
o 5
suid 79,0
)
)
)
*72 (CptPort
uid 945,0
uid 1017,0
ps "OnEdgeStrategy"
shape (Triangle
uid 946,0
uid 1018,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -964,11 +964,11 @@ fg "0,65535,0"
xt "17625,16000,18375,16750"
)
tg (CPTG
uid 947,0
uid 1019,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 948,0
uid 1020,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -980,7 +980,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 949,0
uid 1021,0
va (VaSet
font "Courier New,8,0"
)
@ -993,8 +993,8 @@ lang 11
decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 73,0
o 6
suid 80,0
)
)
)
@ -1083,7 +1083,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1705,6 +1705,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 963,0
lastUid 1058,0
activeModelName "Symbol:CDM"
)

View File

@ -66,23 +66,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -102,11 +102,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit"
)
(vvPair
variable "date"
@ -150,7 +150,7 @@ value "student@version"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -162,11 +162,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "13:55:09"
value "14:39:31"
)
(vvPair
variable "group"
@ -174,7 +174,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -222,11 +222,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit\\studentVersion.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit\\studentVersion.bd"
)
(vvPair
variable "package_name"
@ -302,7 +302,7 @@ value "studentVersion"
)
(vvPair
variable "time"
value "13:55:09"
value "14:39:31"
)
(vvPair
variable "unit"
@ -310,7 +310,7 @@ value "cursorCircuit"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -449,7 +449,7 @@ va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "125200,150400,140600,151600"
xt "125200,150400,139700,151600"
st "
by %user on %dd %month %year
"
@ -1675,8 +1675,7 @@ va (VaSet
isHidden 1
)
xt "0,-23800,12500,-22600"
st "button4 : std_ulogic
"
st "button4 : std_ulogic"
)
)
*41 (PortIoIn
@ -2816,7 +2815,7 @@ thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 77,0
@ -4681,7 +4680,7 @@ tm "BdCompilerDirectivesTextMgr"
associable 1
)
windowSize "0,0,1537,960"
viewArea "39300,8052,141402,72948"
viewArea "49400,346,130558,51930"
cachedDiagramExtent "-17000,-23800,171000,152000"
pageSetupInfo (PageSetupInfo
ptrCmd "\\\\ipp://ippsion.hevs.ch\\PREA309_HPLJ3005DN,winspool,"
@ -4708,7 +4707,7 @@ boundaryWidth 0
)
hasePageBreakOrigin 1
pageBreakOrigin "24000,-12000"
lastUid 12975,0
lastUid 13141,0
defaultCommentText (CommentText
shape (Rectangle
layer 0

View File

@ -88,7 +88,7 @@ uid 329,0
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 8
suid 2,0
)
@ -99,7 +99,7 @@ uid 330,0
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 2
suid 1,0
)
@ -295,7 +295,7 @@ m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 TO testLineNb)"
b "(1 DOWNTO 0)"
o 21
suid 2022,0
)
@ -893,7 +893,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "13:55:09"
value "14:39:31"
)
(vvPair
variable "group"
@ -1029,7 +1029,7 @@ value "symbol"
)
(vvPair
variable "time"
value "13:55:09"
value "14:39:31"
)
(vvPair
variable "unit"
@ -1105,13 +1105,12 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,12700,19000,13500"
st "clock : IN std_ulogic ;
"
st "clock : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 2
suid 1,0
)
@ -1159,13 +1158,12 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,17500,19000,18300"
st "reset : IN std_ulogic ;
"
st "reset : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 8
suid 2,0
)
@ -1215,8 +1213,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,26300,19000,27100"
st "side1 : OUT std_uLogic ;
"
st "side1 : OUT std_uLogic ;"
)
thePort (LogicalPort
m 1
@ -1270,8 +1267,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,18300,19000,19100"
st "restart : IN std_uLogic ;
"
st "restart : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1324,8 +1320,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,16700,19000,17500"
st "go2 : IN std_uLogic ;
"
st "go2 : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1380,8 +1375,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,19100,19000,19900"
st "sensor1 : IN std_uLogic ;
"
st "sensor1 : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1434,8 +1428,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,20700,19000,21500"
st "testMode : IN std_uLogic ;
"
st "testMode : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1488,8 +1481,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,15900,19000,16700"
st "go1 : IN std_uLogic ;
"
st "go1 : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1544,8 +1536,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,27100,19000,27900"
st "side2 : OUT std_uLogic ;
"
st "side2 : OUT std_uLogic ;"
)
thePort (LogicalPort
m 1
@ -1601,8 +1592,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,19900,19000,20700"
st "sensor2 : IN std_uLogic ;
"
st "sensor2 : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1657,8 +1647,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,25500,19000,26300"
st "motorOn : OUT std_uLogic ;
"
st "motorOn : OUT std_uLogic ;"
)
thePort (LogicalPort
m 1
@ -1714,8 +1703,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,13500,19000,14300"
st "encoderA : IN std_uLogic ;
"
st "encoderA : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1770,8 +1758,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,14300,19000,15100"
st "encoderB : IN std_uLogic ;
"
st "encoderB : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1826,8 +1813,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,15100,19000,15900"
st "encoderI : IN std_uLogic ;
"
st "encoderI : IN std_uLogic ;"
)
thePort (LogicalPort
decl (Decl
@ -1880,8 +1866,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,11900,19000,12700"
st "button4 : IN std_ulogic ;
"
st "button4 : IN std_ulogic ;"
)
thePort (LogicalPort
lang 11
@ -1935,8 +1920,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,22300,19000,23100"
st "CS1_n : OUT std_ulogic ;
"
st "CS1_n : OUT std_ulogic ;"
)
thePort (LogicalPort
m 1
@ -1990,8 +1974,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,23900,19000,24700"
st "SCL : OUT std_ulogic ;
"
st "SCL : OUT std_ulogic ;"
)
thePort (LogicalPort
m 1
@ -2045,8 +2028,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,24700,19000,25500"
st "SI : OUT std_ulogic ;
"
st "SI : OUT std_ulogic ;"
)
thePort (LogicalPort
m 1
@ -2100,8 +2082,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,21500,19000,22300"
st "A0 : OUT std_ulogic ;
"
st "A0 : OUT std_ulogic ;"
)
thePort (LogicalPort
m 1
@ -2155,8 +2136,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,23100,19000,23900"
st "RST_n : OUT std_ulogic ;
"
st "RST_n : OUT std_ulogic ;"
)
thePort (LogicalPort
m 1
@ -2211,16 +2191,15 @@ uid 947,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,27900,30500,28700"
st "testOut : OUT std_uLogic_vector (1 TO testLineNb)
"
xt "2000,27900,28000,28700"
st "testOut : OUT std_uLogic_vector (1 DOWNTO 0)"
)
thePort (LogicalPort
m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 TO testLineNb)"
b "(1 DOWNTO 0)"
o 21
suid 2022,0
)
@ -2966,7 +2945,7 @@ xt "0,9900,0,9900"
tm "SyDeclarativeTextMgr"
)
)
lastUid 993,0
lastUid 1039,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol"

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 66,0
suid 74,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -67,10 +67,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 2
suid 59,0
suid 67,0
)
)
uid 830,0
uid 909,0
)
*15 (LogPort
port (LogicalPort
@ -80,10 +80,10 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 60,0
suid 68,0
)
)
uid 832,0
uid 911,0
)
*16 (LogPort
port (LogicalPort
@ -93,23 +93,23 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 3
suid 61,0
suid 69,0
)
)
uid 834,0
uid 913,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 62,0
suid 70,0
)
)
uid 836,0
uid 915,0
)
*18 (LogPort
port (LogicalPort
@ -118,10 +118,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 63,0
suid 71,0
)
)
uid 838,0
uid 917,0
)
*19 (LogPort
port (LogicalPort
@ -130,10 +130,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 64,0
suid 72,0
)
)
uid 840,0
uid 919,0
)
*20 (LogPort
port (LogicalPort
@ -142,10 +142,10 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 5
suid 65,0
suid 73,0
)
)
uid 842,0
uid 921,0
)
*21 (LogPort
port (LogicalPort
@ -154,10 +154,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 6
suid 66,0
suid 74,0
)
)
uid 844,0
uid 923,0
)
]
)
@ -213,49 +213,49 @@ uid 99,0
litem &14
pos 0
dimension 20
uid 831,0
uid 910,0
)
*28 (MRCItem
litem &15
pos 1
dimension 20
uid 833,0
uid 912,0
)
*29 (MRCItem
litem &16
pos 2
dimension 20
uid 835,0
uid 914,0
)
*30 (MRCItem
litem &17
pos 3
dimension 20
uid 837,0
uid 916,0
)
*31 (MRCItem
litem &18
pos 4
dimension 20
uid 839,0
uid 918,0
)
*32 (MRCItem
litem &19
pos 5
dimension 20
uid 841,0
uid 920,0
)
*33 (MRCItem
litem &20
pos 6
dimension 20
uid 843,0
uid 922,0
)
*34 (MRCItem
litem &21
pos 7
dimension 20
uid 845,0
uid 924,0
)
]
)
@ -486,23 +486,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -522,11 +522,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration"
)
(vvPair
variable "date"
@ -566,7 +566,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -578,11 +578,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:06:44"
value "14:36:24"
)
(vvPair
variable "group"
@ -590,7 +590,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -622,11 +622,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\enable_acceleration\\interface"
)
(vvPair
variable "package_name"
@ -654,7 +654,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:06:44"
value "14:36:24"
)
(vvPair
variable "unit"
@ -662,7 +662,7 @@ value "enable_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -689,10 +689,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*68 (CptPort
uid 790,0
uid 869,0
ps "OnEdgeStrategy"
shape (Triangle
uid 791,0
uid 870,0
ro 90
va (VaSet
vasetType 1
@ -701,11 +701,11 @@ fg "0,65535,0"
xt "14250,13625,15000,14375"
)
tg (CPTG
uid 792,0
uid 871,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 793,0
uid 872,0
va (VaSet
font "Verdana,12,0"
)
@ -716,7 +716,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 794,0
uid 873,0
va (VaSet
font "Courier New,8,0"
)
@ -730,15 +730,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 2
suid 59,0
suid 67,0
)
)
)
*69 (CptPort
uid 795,0
uid 874,0
ps "OnEdgeStrategy"
shape (Triangle
uid 796,0
uid 875,0
ro 90
va (VaSet
vasetType 1
@ -747,11 +747,11 @@ fg "0,65535,0"
xt "23000,14625,23750,15375"
)
tg (CPTG
uid 797,0
uid 876,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 798,0
uid 877,0
va (VaSet
font "Verdana,12,0"
)
@ -763,7 +763,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 799,0
uid 878,0
va (VaSet
font "Courier New,8,0"
)
@ -778,15 +778,15 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 60,0
suid 68,0
)
)
)
*70 (CptPort
uid 800,0
uid 879,0
ps "OnEdgeStrategy"
shape (Triangle
uid 801,0
uid 880,0
ro 90
va (VaSet
vasetType 1
@ -795,11 +795,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 802,0
uid 881,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 803,0
uid 882,0
va (VaSet
font "Verdana,12,0"
)
@ -810,7 +810,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 804,0
uid 883,0
va (VaSet
font "Courier New,8,0"
)
@ -825,15 +825,15 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 3
suid 61,0
suid 69,0
)
)
)
*71 (CptPort
uid 805,0
uid 884,0
ps "OnEdgeStrategy"
shape (Triangle
uid 806,0
uid 885,0
ro 90
va (VaSet
vasetType 1
@ -842,11 +842,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 807,0
uid 886,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 808,0
uid 887,0
va (VaSet
font "Verdana,12,0"
)
@ -857,30 +857,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 809,0
uid 888,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,76500,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 62,0
suid 70,0
)
)
)
*72 (CptPort
uid 810,0
uid 889,0
ps "OnEdgeStrategy"
shape (Triangle
uid 811,0
uid 890,0
ro 90
va (VaSet
vasetType 1
@ -889,11 +889,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 812,0
uid 891,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 813,0
uid 892,0
va (VaSet
font "Verdana,12,0"
)
@ -904,7 +904,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 814,0
uid 893,0
va (VaSet
font "Courier New,8,0"
)
@ -918,15 +918,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 63,0
suid 71,0
)
)
)
*73 (CptPort
uid 815,0
uid 894,0
ps "OnEdgeStrategy"
shape (Triangle
uid 816,0
uid 895,0
ro 90
va (VaSet
vasetType 1
@ -935,11 +935,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 817,0
uid 896,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 818,0
uid 897,0
va (VaSet
font "Verdana,12,0"
)
@ -950,7 +950,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 819,0
uid 898,0
va (VaSet
font "Courier New,8,0"
)
@ -964,15 +964,15 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 64,0
suid 72,0
)
)
)
*74 (CptPort
uid 820,0
uid 899,0
ps "OnEdgeStrategy"
shape (Triangle
uid 821,0
uid 900,0
ro 90
va (VaSet
vasetType 1
@ -981,11 +981,11 @@ fg "0,65535,0"
xt "14250,12625,15000,13375"
)
tg (CPTG
uid 822,0
uid 901,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 823,0
uid 902,0
va (VaSet
font "Verdana,12,0"
)
@ -996,7 +996,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 824,0
uid 903,0
va (VaSet
font "Courier New,8,0"
)
@ -1010,15 +1010,15 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 5
suid 65,0
suid 73,0
)
)
)
*75 (CptPort
uid 825,0
uid 904,0
ps "OnEdgeStrategy"
shape (Triangle
uid 826,0
uid 905,0
ro 90
va (VaSet
vasetType 1
@ -1027,11 +1027,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 827,0
uid 906,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 828,0
uid 907,0
va (VaSet
font "Verdana,12,0"
)
@ -1042,7 +1042,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 829,0
uid 908,0
va (VaSet
font "Courier New,8,0"
)
@ -1056,7 +1056,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 6
suid 66,0
suid 74,0
)
)
)
@ -1767,6 +1767,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 845,0
lastUid 924,0
activeModelName "Symbol:CDM"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 129,0
suid 138,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 121,0
suid 130,0
)
)
uid 1568,0
uid 1677,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 13
suid 122,0
suid 131,0
)
)
uid 1570,0
uid 1679,0
)
*16 (LogPort
port (LogicalPort
@ -98,23 +98,23 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 16
suid 123,0
suid 132,0
)
)
uid 1572,0
uid 1681,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 124,0
suid 133,0
)
)
uid 1574,0
uid 1683,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "power_acceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 22
suid 125,0
suid 134,0
)
)
uid 1576,0
uid 1685,0
)
*19 (LogPort
port (LogicalPort
@ -137,10 +137,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 126,0
suid 135,0
)
)
uid 1578,0
uid 1687,0
)
*20 (LogPort
port (LogicalPort
@ -150,10 +150,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 26
suid 127,0
suid 136,0
)
)
uid 1580,0
uid 1689,0
)
*21 (LogPort
port (LogicalPort
@ -162,10 +162,10 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 128,0
suid 137,0
)
)
uid 1582,0
uid 1691,0
)
*22 (LogPort
port (LogicalPort
@ -174,10 +174,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 129,0
suid 138,0
)
)
uid 1584,0
uid 1693,0
)
]
)
@ -233,55 +233,55 @@ uid 106,0
litem &14
pos 0
dimension 20
uid 1569,0
uid 1678,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 1571,0
uid 1680,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 1573,0
uid 1682,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 1575,0
uid 1684,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 1577,0
uid 1686,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 1579,0
uid 1688,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 1581,0
uid 1690,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 1583,0
uid 1692,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 1585,0
uid 1694,0
)
]
)
@ -512,23 +512,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -548,11 +548,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
)
(vvPair
variable "date"
@ -592,7 +592,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -604,11 +604,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:06:44"
value "14:37:58"
)
(vvPair
variable "group"
@ -616,7 +616,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -648,11 +648,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\interface"
)
(vvPair
variable "package_name"
@ -680,7 +680,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:06:44"
value "14:37:58"
)
(vvPair
variable "unit"
@ -688,7 +688,7 @@ value "process_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -715,10 +715,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 1523,0
uid 1632,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1524,0
uid 1633,0
ro 90
va (VaSet
vasetType 1
@ -727,11 +727,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1525,0
uid 1634,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1526,0
uid 1635,0
va (VaSet
font "Verdana,12,0"
)
@ -742,10 +742,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1527,0
uid 1636,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,66500,4000"
st "clk : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -753,15 +756,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 121,0
suid 130,0
)
)
)
*71 (CptPort
uid 1528,0
uid 1637,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1529,0
uid 1638,0
ro 180
va (VaSet
vasetType 1
@ -770,11 +773,11 @@ fg "0,65535,0"
xt "33625,15000,34375,15750"
)
tg (CPTG
uid 1530,0
uid 1639,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1531,0
uid 1640,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -786,10 +789,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1532,0
uid 1641,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,66500,8000"
st "end_acceleration : OUT std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -798,15 +804,15 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 13
suid 122,0
suid 131,0
)
)
)
*72 (CptPort
uid 1533,0
uid 1642,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1534,0
uid 1643,0
ro 180
va (VaSet
vasetType 1
@ -815,11 +821,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 1535,0
uid 1644,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1536,0
uid 1645,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -832,10 +838,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1537,0
uid 1646,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,76500,4800"
st "info_acceleration : IN std_ulogic_vector (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -844,15 +853,15 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 16
suid 123,0
suid 132,0
)
)
)
*73 (CptPort
uid 1538,0
uid 1647,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1539,0
uid 1648,0
ro 180
va (VaSet
vasetType 1
@ -861,11 +870,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 1540,0
uid 1649,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1541,0
uid 1650,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -878,27 +887,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1542,0
uid 1651,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 124,0
suid 133,0
)
)
)
*74 (CptPort
uid 1543,0
uid 1652,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1544,0
uid 1653,0
ro 180
va (VaSet
vasetType 1
@ -907,11 +919,11 @@ fg "0,65535,0"
xt "31625,15000,32375,15750"
)
tg (CPTG
uid 1545,0
uid 1654,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1546,0
uid 1655,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -923,10 +935,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1547,0
uid 1656,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,71500,8800"
st "power_acceleration : OUT unsigned (7 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -936,15 +951,15 @@ n "power_acceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 22
suid 125,0
suid 134,0
)
)
)
*75 (CptPort
uid 1548,0
uid 1657,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1549,0
uid 1658,0
ro 90
va (VaSet
vasetType 1
@ -953,11 +968,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 1550,0
uid 1659,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1551,0
uid 1660,0
va (VaSet
font "Verdana,12,0"
)
@ -968,10 +983,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1552,0
uid 1661,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,66500,5600"
st "rst : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -979,15 +997,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 126,0
suid 135,0
)
)
)
*76 (CptPort
uid 1553,0
uid 1662,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1554,0
uid 1663,0
ro 180
va (VaSet
vasetType 1
@ -996,11 +1014,11 @@ fg "0,65535,0"
xt "29625,15000,30375,15750"
)
tg (CPTG
uid 1555,0
uid 1664,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1556,0
uid 1665,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1012,10 +1030,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1557,0
uid 1666,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8800,65000,9600"
st "sideL_acceleration : OUT std_ulogic
"
)
thePort (LogicalPort
lang 11
@ -1024,15 +1045,15 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 26
suid 127,0
suid 136,0
)
)
)
*77 (CptPort
uid 1558,0
uid 1667,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1559,0
uid 1668,0
ro 180
va (VaSet
vasetType 1
@ -1041,11 +1062,11 @@ fg "0,65535,0"
xt "23625,5250,24375,6000"
)
tg (CPTG
uid 1560,0
uid 1669,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1561,0
uid 1670,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1058,10 +1079,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1562,0
uid 1671,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,66500,6400"
st "skip_acceleration : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -1069,15 +1093,15 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 128,0
suid 137,0
)
)
)
*78 (CptPort
uid 1563,0
uid 1672,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1564,0
uid 1673,0
ro 270
va (VaSet
vasetType 1
@ -1086,11 +1110,11 @@ fg "0,65535,0"
xt "36000,11625,36750,12375"
)
tg (CPTG
uid 1565,0
uid 1674,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1566,0
uid 1675,0
va (VaSet
font "Verdana,12,0"
)
@ -1102,10 +1126,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1567,0
uid 1676,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,66500,7200"
st "unlock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -1113,7 +1140,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 129,0
suid 138,0
)
)
)
@ -1202,7 +1229,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1826,6 +1853,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1585,0
lastUid 1694,0
activeModelName "Symbol:CDM"
)

View File

@ -53,23 +53,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -89,11 +89,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration"
)
(vvPair
variable "date"
@ -133,7 +133,7 @@ value "struct1"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -145,11 +145,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:06:44"
value "14:36:24"
)
(vvPair
variable "group"
@ -157,7 +157,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -189,11 +189,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_acceleration\\struct1.bd"
)
(vvPair
variable "package_name"
@ -221,7 +221,7 @@ value "struct1"
)
(vvPair
variable "time"
value "14:06:44"
value "14:36:24"
)
(vvPair
variable "unit"
@ -229,7 +229,7 @@ value "process_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -494,7 +494,7 @@ uid 63,0
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 4,0
@ -2459,12 +2459,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1715,1143"
viewArea "-30000,-15600,78551,56743"
windowSize "0,0,1537,960"
viewArea "-30000,-15600,79956,51936"
cachedDiagramExtent "-15300,-6200,74400,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-87000,-49000"
lastUid 1240,0
lastUid 1319,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -3551,7 +3551,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 4,0
@ -3989,5 +3989,5 @@ vaOverrides [
uid 194,0
type 1
)
activeModelName "BlockDiag"
activeModelName "BlockDiag:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,11 +70,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
)
(vvPair
variable "date"
@ -114,7 +114,7 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:01"
value "14:36:39"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -170,11 +170,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:07:01"
value "14:36:39"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "process_cruse"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -2907,8 +2907,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1715,1143"
viewArea "-6000,-6100,102551,64199"
windowSize "0,0,1537,960"
viewArea "-6000,-6100,102647,60632"
cachedDiagramExtent "0,-1000,93382,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -3295,7 +3295,7 @@ stateOrder [
name "csm"
)
]
lastUid 563,0
lastUid 592,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *67 (LEmptyRow
@ -3358,7 +3358,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 99,0
suid 108,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 91,0
suid 100,0
)
)
uid 1197,0
uid 1306,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "end_cruse"
t "std_ulogic"
o 14
suid 92,0
suid 101,0
)
)
uid 1199,0
uid 1308,0
)
*16 (LogPort
port (LogicalPort
@ -98,23 +98,23 @@ n "info_cruse"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 93,0
suid 102,0
)
)
uid 1201,0
uid 1310,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 94,0
suid 103,0
)
)
uid 1203,0
uid 1312,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "power_cruse"
t "unsigned"
b "(7 DOWNTO 0)"
o 23
suid 95,0
suid 104,0
)
)
uid 1205,0
uid 1314,0
)
*19 (LogPort
port (LogicalPort
@ -137,10 +137,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 96,0
suid 105,0
)
)
uid 1207,0
uid 1316,0
)
*20 (LogPort
port (LogicalPort
@ -150,10 +150,10 @@ n "sensor_bus"
t "std_ulogic_vector"
b "(1 DOWNTO 0)"
o 25
suid 97,0
suid 106,0
)
)
uid 1209,0
uid 1318,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "sideL_cruse"
t "std_ulogic"
o 27
suid 98,0
suid 107,0
)
)
uid 1211,0
uid 1320,0
)
*22 (LogPort
port (LogicalPort
@ -175,10 +175,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 99,0
suid 108,0
)
)
uid 1213,0
uid 1322,0
)
]
)
@ -234,55 +234,55 @@ uid 120,0
litem &14
pos 0
dimension 20
uid 1198,0
uid 1307,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 1200,0
uid 1309,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 1202,0
uid 1311,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 1204,0
uid 1313,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 1206,0
uid 1315,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 1208,0
uid 1317,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 1210,0
uid 1319,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 1212,0
uid 1321,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 1214,0
uid 1323,0
)
]
)
@ -513,23 +513,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -549,11 +549,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse"
)
(vvPair
variable "date"
@ -593,7 +593,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -605,11 +605,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "group"
@ -617,7 +617,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -649,11 +649,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_cruse\\interface"
)
(vvPair
variable "package_name"
@ -681,7 +681,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "unit"
@ -689,7 +689,7 @@ value "process_cruse"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -716,10 +716,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 1152,0
uid 1261,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1153,0
uid 1262,0
ro 90
va (VaSet
vasetType 1
@ -728,11 +728,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 1154,0
uid 1263,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1155,0
uid 1264,0
va (VaSet
font "Verdana,12,0"
)
@ -743,7 +743,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1156,0
uid 1265,0
va (VaSet
font "Courier New,8,0"
)
@ -757,15 +757,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 91,0
suid 100,0
)
)
)
*71 (CptPort
uid 1157,0
uid 1266,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1158,0
uid 1267,0
ro 180
va (VaSet
vasetType 1
@ -774,11 +774,11 @@ fg "0,65535,0"
xt "33625,15000,34375,15750"
)
tg (CPTG
uid 1159,0
uid 1268,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1160,0
uid 1269,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -790,7 +790,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1161,0
uid 1270,0
va (VaSet
font "Courier New,8,0"
)
@ -805,15 +805,15 @@ decl (Decl
n "end_cruse"
t "std_ulogic"
o 14
suid 92,0
suid 101,0
)
)
)
*72 (CptPort
uid 1162,0
uid 1271,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1163,0
uid 1272,0
ro 180
va (VaSet
vasetType 1
@ -822,11 +822,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 1164,0
uid 1273,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1165,0
uid 1274,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -839,7 +839,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1166,0
uid 1275,0
va (VaSet
font "Courier New,8,0"
)
@ -854,15 +854,15 @@ n "info_cruse"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 93,0
suid 102,0
)
)
)
*73 (CptPort
uid 1167,0
uid 1276,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1168,0
uid 1277,0
ro 180
va (VaSet
vasetType 1
@ -871,11 +871,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 1169,0
uid 1278,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1170,0
uid 1279,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -888,30 +888,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1171,0
uid 1280,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,73000,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,68500,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 94,0
suid 103,0
)
)
)
*74 (CptPort
uid 1172,0
uid 1281,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1173,0
uid 1282,0
ro 180
va (VaSet
vasetType 1
@ -920,11 +920,11 @@ fg "0,65535,0"
xt "31625,15000,32375,15750"
)
tg (CPTG
uid 1174,0
uid 1283,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1175,0
uid 1284,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -936,7 +936,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1176,0
uid 1285,0
va (VaSet
font "Courier New,8,0"
)
@ -952,15 +952,15 @@ n "power_cruse"
t "unsigned"
b "(7 DOWNTO 0)"
o 23
suid 95,0
suid 104,0
)
)
)
*75 (CptPort
uid 1177,0
uid 1286,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1178,0
uid 1287,0
ro 90
va (VaSet
vasetType 1
@ -969,11 +969,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1179,0
uid 1288,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1180,0
uid 1289,0
va (VaSet
font "Verdana,12,0"
)
@ -984,7 +984,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1181,0
uid 1290,0
va (VaSet
font "Courier New,8,0"
)
@ -998,15 +998,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 96,0
suid 105,0
)
)
)
*76 (CptPort
uid 1182,0
uid 1291,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1183,0
uid 1292,0
ro 270
va (VaSet
vasetType 1
@ -1015,11 +1015,11 @@ fg "0,65535,0"
xt "36000,12625,36750,13375"
)
tg (CPTG
uid 1184,0
uid 1293,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1185,0
uid 1294,0
va (VaSet
font "Verdana,12,0"
)
@ -1031,7 +1031,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1186,0
uid 1295,0
va (VaSet
font "Courier New,8,0"
)
@ -1046,15 +1046,15 @@ n "sensor_bus"
t "std_ulogic_vector"
b "(1 DOWNTO 0)"
o 25
suid 97,0
suid 106,0
)
)
)
*77 (CptPort
uid 1187,0
uid 1296,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1188,0
uid 1297,0
ro 180
va (VaSet
vasetType 1
@ -1063,11 +1063,11 @@ fg "0,65535,0"
xt "29625,15000,30375,15750"
)
tg (CPTG
uid 1189,0
uid 1298,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1190,0
uid 1299,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1079,7 +1079,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1191,0
uid 1300,0
va (VaSet
font "Courier New,8,0"
)
@ -1094,15 +1094,15 @@ decl (Decl
n "sideL_cruse"
t "std_ulogic"
o 27
suid 98,0
suid 107,0
)
)
)
*78 (CptPort
uid 1192,0
uid 1301,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1193,0
uid 1302,0
ro 270
va (VaSet
vasetType 1
@ -1111,11 +1111,11 @@ fg "0,65535,0"
xt "36000,10625,36750,11375"
)
tg (CPTG
uid 1194,0
uid 1303,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1195,0
uid 1304,0
va (VaSet
font "Verdana,12,0"
)
@ -1127,7 +1127,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1196,0
uid 1305,0
va (VaSet
font "Courier New,8,0"
)
@ -1141,7 +1141,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 99,0
suid 108,0
)
)
)
@ -1230,7 +1230,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1854,6 +1854,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1214,0
lastUid 1323,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,11 +70,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
)
(vvPair
variable "date"
@ -114,7 +114,7 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:14"
value "14:36:56"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -170,11 +170,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:07:14"
value "14:36:56"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "process_deceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -2474,8 +2474,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1715,1119"
viewArea "-500,-10500,134817,77133"
windowSize "0,0,1537,960"
viewArea "-500,-10500,134448,72387"
cachedDiagramExtent "0,-1000,125000,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -2854,7 +2854,7 @@ stateOrder [
name "csm"
)
]
lastUid 445,0
lastUid 474,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *62 (LEmptyRow
@ -2917,7 +2917,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 90,0
suid 100,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 81,0
suid 91,0
)
)
uid 994,0
uid 1110,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "end_deceleration"
t "std_ulogic"
o 15
suid 82,0
suid 92,0
)
)
uid 996,0
uid 1112,0
)
*16 (LogPort
port (LogicalPort
@ -98,23 +98,23 @@ n "info_deceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 83,0
suid 93,0
)
)
uid 998,0
uid 1114,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 84,0
suid 94,0
)
)
uid 1000,0
uid 1116,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "power_deceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 24
suid 85,0
suid 95,0
)
)
uid 1002,0
uid 1118,0
)
*19 (LogPort
port (LogicalPort
@ -138,10 +138,10 @@ decl (Decl
n "RaZ"
t "std_ulogic"
o 9
suid 86,0
suid 96,0
)
)
uid 1004,0
uid 1120,0
)
*20 (LogPort
port (LogicalPort
@ -150,10 +150,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 87,0
suid 97,0
)
)
uid 1006,0
uid 1122,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "sideL_deceleration"
t "std_ulogic"
o 28
suid 88,0
suid 98,0
)
)
uid 1008,0
uid 1124,0
)
*22 (LogPort
port (LogicalPort
@ -175,10 +175,10 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 89,0
suid 99,0
)
)
uid 1010,0
uid 1126,0
)
*23 (LogPort
port (LogicalPort
@ -187,10 +187,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 90,0
suid 100,0
)
)
uid 1012,0
uid 1128,0
)
]
)
@ -246,61 +246,61 @@ uid 127,0
litem &14
pos 0
dimension 20
uid 995,0
uid 1111,0
)
*30 (MRCItem
litem &15
pos 1
dimension 20
uid 997,0
uid 1113,0
)
*31 (MRCItem
litem &16
pos 2
dimension 20
uid 999,0
uid 1115,0
)
*32 (MRCItem
litem &17
pos 3
dimension 20
uid 1001,0
uid 1117,0
)
*33 (MRCItem
litem &18
pos 4
dimension 20
uid 1003,0
uid 1119,0
)
*34 (MRCItem
litem &19
pos 5
dimension 20
uid 1005,0
uid 1121,0
)
*35 (MRCItem
litem &20
pos 6
dimension 20
uid 1007,0
uid 1123,0
)
*36 (MRCItem
litem &21
pos 7
dimension 20
uid 1009,0
uid 1125,0
)
*37 (MRCItem
litem &22
pos 8
dimension 20
uid 1011,0
uid 1127,0
)
*38 (MRCItem
litem &23
pos 9
dimension 20
uid 1013,0
uid 1129,0
)
]
)
@ -531,23 +531,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -567,11 +567,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration"
)
(vvPair
variable "date"
@ -611,7 +611,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -623,11 +623,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "group"
@ -635,7 +635,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -667,11 +667,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\process_deceleration\\interface"
)
(vvPair
variable "package_name"
@ -699,7 +699,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "unit"
@ -707,7 +707,7 @@ value "process_deceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -734,10 +734,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*72 (CptPort
uid 944,0
uid 1060,0
ps "OnEdgeStrategy"
shape (Triangle
uid 945,0
uid 1061,0
ro 90
va (VaSet
vasetType 1
@ -746,11 +746,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 946,0
uid 1062,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 947,0
uid 1063,0
va (VaSet
font "Verdana,12,0"
)
@ -761,7 +761,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 948,0
uid 1064,0
va (VaSet
font "Courier New,8,0"
)
@ -775,15 +775,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 81,0
suid 91,0
)
)
)
*73 (CptPort
uid 949,0
uid 1065,0
ps "OnEdgeStrategy"
shape (Triangle
uid 950,0
uid 1066,0
ro 180
va (VaSet
vasetType 1
@ -792,11 +792,11 @@ fg "0,65535,0"
xt "33625,15000,34375,15750"
)
tg (CPTG
uid 951,0
uid 1067,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 952,0
uid 1068,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -808,7 +808,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 953,0
uid 1069,0
va (VaSet
font "Courier New,8,0"
)
@ -823,15 +823,15 @@ decl (Decl
n "end_deceleration"
t "std_ulogic"
o 15
suid 82,0
suid 92,0
)
)
)
*74 (CptPort
uid 954,0
uid 1070,0
ps "OnEdgeStrategy"
shape (Triangle
uid 955,0
uid 1071,0
ro 180
va (VaSet
vasetType 1
@ -840,11 +840,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 956,0
uid 1072,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 957,0
uid 1073,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -857,7 +857,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 958,0
uid 1074,0
va (VaSet
font "Courier New,8,0"
)
@ -872,15 +872,15 @@ n "info_deceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 83,0
suid 93,0
)
)
)
*75 (CptPort
uid 959,0
uid 1075,0
ps "OnEdgeStrategy"
shape (Triangle
uid 960,0
uid 1076,0
ro 180
va (VaSet
vasetType 1
@ -889,11 +889,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 961,0
uid 1077,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 962,0
uid 1078,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -906,30 +906,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 963,0
uid 1079,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,76500,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 84,0
suid 94,0
)
)
)
*76 (CptPort
uid 964,0
uid 1080,0
ps "OnEdgeStrategy"
shape (Triangle
uid 965,0
uid 1081,0
ro 180
va (VaSet
vasetType 1
@ -938,11 +938,11 @@ fg "0,65535,0"
xt "31625,15000,32375,15750"
)
tg (CPTG
uid 966,0
uid 1082,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 967,0
uid 1083,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -954,7 +954,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 968,0
uid 1084,0
va (VaSet
font "Courier New,8,0"
)
@ -970,15 +970,15 @@ n "power_deceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 24
suid 85,0
suid 95,0
)
)
)
*77 (CptPort
uid 969,0
uid 1085,0
ps "OnEdgeStrategy"
shape (Triangle
uid 970,0
uid 1086,0
ro 90
va (VaSet
vasetType 1
@ -987,11 +987,11 @@ fg "0,65535,0"
xt "36000,8625,36750,9375"
)
tg (CPTG
uid 971,0
uid 1087,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 972,0
uid 1088,0
va (VaSet
font "Verdana,12,0"
)
@ -1003,7 +1003,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 973,0
uid 1089,0
va (VaSet
font "Courier New,8,0"
)
@ -1018,15 +1018,15 @@ decl (Decl
n "RaZ"
t "std_ulogic"
o 9
suid 86,0
suid 96,0
)
)
)
*78 (CptPort
uid 974,0
uid 1090,0
ps "OnEdgeStrategy"
shape (Triangle
uid 975,0
uid 1091,0
ro 90
va (VaSet
vasetType 1
@ -1035,11 +1035,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 976,0
uid 1092,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 977,0
uid 1093,0
va (VaSet
font "Verdana,12,0"
)
@ -1050,7 +1050,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 978,0
uid 1094,0
va (VaSet
font "Courier New,8,0"
)
@ -1064,15 +1064,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 87,0
suid 97,0
)
)
)
*79 (CptPort
uid 979,0
uid 1095,0
ps "OnEdgeStrategy"
shape (Triangle
uid 980,0
uid 1096,0
ro 180
va (VaSet
vasetType 1
@ -1081,11 +1081,11 @@ fg "0,65535,0"
xt "29625,15000,30375,15750"
)
tg (CPTG
uid 981,0
uid 1097,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 982,0
uid 1098,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1097,7 +1097,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 983,0
uid 1099,0
va (VaSet
font "Courier New,8,0"
)
@ -1112,15 +1112,15 @@ decl (Decl
n "sideL_deceleration"
t "std_ulogic"
o 28
suid 88,0
suid 98,0
)
)
)
*80 (CptPort
uid 984,0
uid 1100,0
ps "OnEdgeStrategy"
shape (Triangle
uid 985,0
uid 1101,0
ro 180
va (VaSet
vasetType 1
@ -1129,11 +1129,11 @@ fg "0,65535,0"
xt "23625,5250,24375,6000"
)
tg (CPTG
uid 986,0
uid 1102,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 987,0
uid 1103,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1146,7 +1146,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 988,0
uid 1104,0
va (VaSet
font "Courier New,8,0"
)
@ -1160,15 +1160,15 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 89,0
suid 99,0
)
)
)
*81 (CptPort
uid 989,0
uid 1105,0
ps "OnEdgeStrategy"
shape (Triangle
uid 990,0
uid 1106,0
ro 270
va (VaSet
vasetType 1
@ -1177,11 +1177,11 @@ fg "0,65535,0"
xt "36000,11625,36750,12375"
)
tg (CPTG
uid 991,0
uid 1107,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 992,0
uid 1108,0
va (VaSet
font "Verdana,12,0"
)
@ -1193,7 +1193,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 993,0
uid 1109,0
va (VaSet
font "Courier New,8,0"
)
@ -1207,7 +1207,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 90,0
suid 100,0
)
)
)
@ -1296,7 +1296,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1920,6 +1920,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1013,0
lastUid 1129,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,15 +70,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
)
(vvPair
variable "date"
value "14.12.2021"
value "21.12.2021"
)
(vvPair
variable "day"
@ -90,7 +90,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "14"
value "21"
)
(vvPair
variable "entity_name"
@ -114,11 +114,11 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "21.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:16:14"
value "14:37:51"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -170,11 +170,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:16:14"
value "14:37:51"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "selector_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -3289,8 +3289,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1715,1143"
viewArea "11200,-8300,119751,64043"
windowSize "0,0,1537,960"
viewArea "11200,-8300,121156,59236"
cachedDiagramExtent "0,-1000,118304,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -3670,7 +3670,7 @@ stateOrder [
name "csm"
)
]
lastUid 672,0
lastUid 701,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *71 (LEmptyRow
@ -3745,7 +3745,7 @@ port (LogicalPort
lang 11
decl (Decl
n "button"
t "unsigned"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
)
@ -3757,7 +3757,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "std_uLogic"
t "std_ulogic"
o 3
)
)
@ -3770,7 +3770,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "std_uLogic"
t "std_ulogic"
o 7
)
)
@ -3784,7 +3784,7 @@ lang 11
m 1
decl (Decl
n "info_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 8
)
@ -3798,7 +3798,7 @@ lang 11
m 1
decl (Decl
n "skip_acceleration"
t "unsigned"
t "std_ulogic"
o 9
)
)
@ -3810,7 +3810,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 4
)
@ -3823,7 +3823,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 5
)
@ -3836,7 +3836,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos_init"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 6
)
@ -5072,6 +5072,6 @@ pts [
]
)
)
activeModelName "StateMachine"
activeModelName "StateMachine:CDM"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 81,0
suid 90,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,10 +73,10 @@ n "button"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
suid 73,0
suid 82,0
)
)
uid 1002,0
uid 1111,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 74,0
suid 83,0
)
)
uid 1004,0
uid 1113,0
)
*16 (LogPort
port (LogicalPort
@ -99,10 +99,10 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 16
suid 75,0
suid 84,0
)
)
uid 1006,0
uid 1115,0
)
*17 (LogPort
port (LogicalPort
@ -112,10 +112,10 @@ n "pos1"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 19
suid 76,0
suid 85,0
)
)
uid 1008,0
uid 1117,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "pos2"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 20
suid 77,0
suid 86,0
)
)
uid 1010,0
uid 1119,0
)
*19 (LogPort
port (LogicalPort
@ -138,23 +138,23 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 78,0
suid 87,0
)
)
uid 1012,0
uid 1121,0
)
*20 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 79,0
suid 88,0
)
)
uid 1014,0
uid 1123,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 80,0
suid 89,0
)
)
uid 1016,0
uid 1125,0
)
*22 (LogPort
port (LogicalPort
@ -176,10 +176,10 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 81,0
suid 90,0
)
)
uid 1018,0
uid 1127,0
)
]
)
@ -235,55 +235,55 @@ uid 113,0
litem &14
pos 0
dimension 20
uid 1003,0
uid 1112,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 1005,0
uid 1114,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 1007,0
uid 1116,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 1009,0
uid 1118,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 1011,0
uid 1120,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 1013,0
uid 1122,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 1015,0
uid 1124,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 1017,0
uid 1126,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 1019,0
uid 1128,0
)
]
)
@ -514,23 +514,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -550,11 +550,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration"
)
(vvPair
variable "date"
@ -594,7 +594,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -606,11 +606,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "group"
@ -618,7 +618,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -650,11 +650,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_acceleration\\interface"
)
(vvPair
variable "package_name"
@ -682,7 +682,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "unit"
@ -690,7 +690,7 @@ value "selector_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -717,10 +717,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 957,0
uid 1066,0
ps "OnEdgeStrategy"
shape (Triangle
uid 958,0
uid 1067,0
ro 180
va (VaSet
vasetType 1
@ -729,11 +729,11 @@ fg "0,65535,0"
xt "16625,5250,17375,6000"
)
tg (CPTG
uid 959,0
uid 1068,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 960,0
uid 1069,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -746,7 +746,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 961,0
uid 1070,0
va (VaSet
font "Courier New,8,0"
)
@ -761,15 +761,15 @@ n "button"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
suid 73,0
suid 82,0
)
)
)
*71 (CptPort
uid 962,0
uid 1071,0
ps "OnEdgeStrategy"
shape (Triangle
uid 963,0
uid 1072,0
ro 180
va (VaSet
vasetType 1
@ -778,11 +778,11 @@ fg "0,65535,0"
xt "19625,5250,20375,6000"
)
tg (CPTG
uid 964,0
uid 1073,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 965,0
uid 1074,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -795,7 +795,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 966,0
uid 1075,0
va (VaSet
font "Courier New,8,0"
)
@ -809,15 +809,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 74,0
suid 83,0
)
)
)
*72 (CptPort
uid 967,0
uid 1076,0
ps "OnEdgeStrategy"
shape (Triangle
uid 968,0
uid 1077,0
ro 180
va (VaSet
vasetType 1
@ -826,11 +826,11 @@ fg "0,65535,0"
xt "16625,13000,17375,13750"
)
tg (CPTG
uid 969,0
uid 1078,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 970,0
uid 1079,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -842,7 +842,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 971,0
uid 1080,0
va (VaSet
font "Courier New,8,0"
)
@ -858,15 +858,15 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 16
suid 75,0
suid 84,0
)
)
)
*73 (CptPort
uid 972,0
uid 1081,0
ps "OnEdgeStrategy"
shape (Triangle
uid 973,0
uid 1082,0
ro 90
va (VaSet
vasetType 1
@ -875,11 +875,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 974,0
uid 1083,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 975,0
uid 1084,0
va (VaSet
font "Verdana,12,0"
)
@ -890,7 +890,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 976,0
uid 1085,0
va (VaSet
font "Courier New,8,0"
)
@ -905,15 +905,15 @@ n "pos1"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 19
suid 76,0
suid 85,0
)
)
)
*74 (CptPort
uid 977,0
uid 1086,0
ps "OnEdgeStrategy"
shape (Triangle
uid 978,0
uid 1087,0
ro 90
va (VaSet
vasetType 1
@ -922,11 +922,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 979,0
uid 1088,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 980,0
uid 1089,0
va (VaSet
font "Verdana,12,0"
)
@ -937,7 +937,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 981,0
uid 1090,0
va (VaSet
font "Courier New,8,0"
)
@ -952,15 +952,15 @@ n "pos2"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 20
suid 77,0
suid 86,0
)
)
)
*75 (CptPort
uid 982,0
uid 1091,0
ps "OnEdgeStrategy"
shape (Triangle
uid 983,0
uid 1092,0
ro 90
va (VaSet
vasetType 1
@ -969,11 +969,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 984,0
uid 1093,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 985,0
uid 1094,0
va (VaSet
font "Verdana,12,0"
)
@ -984,7 +984,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 986,0
uid 1095,0
va (VaSet
font "Courier New,8,0"
)
@ -999,15 +999,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 78,0
suid 87,0
)
)
)
*76 (CptPort
uid 987,0
uid 1096,0
ps "OnEdgeStrategy"
shape (Triangle
uid 988,0
uid 1097,0
ro 90
va (VaSet
vasetType 1
@ -1016,11 +1016,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 989,0
uid 1098,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 990,0
uid 1099,0
va (VaSet
font "Verdana,12,0"
)
@ -1031,30 +1031,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 991,0
uid 1100,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,76000,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,71500,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 79,0
suid 88,0
)
)
)
*77 (CptPort
uid 992,0
uid 1101,0
ps "OnEdgeStrategy"
shape (Triangle
uid 993,0
uid 1102,0
ro 180
va (VaSet
vasetType 1
@ -1063,11 +1063,11 @@ fg "0,65535,0"
xt "21625,5250,22375,6000"
)
tg (CPTG
uid 994,0
uid 1103,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 995,0
uid 1104,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1080,7 +1080,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 996,0
uid 1105,0
va (VaSet
font "Courier New,8,0"
)
@ -1094,15 +1094,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 80,0
suid 89,0
)
)
)
*78 (CptPort
uid 997,0
uid 1106,0
ps "OnEdgeStrategy"
shape (Triangle
uid 998,0
uid 1107,0
ro 180
va (VaSet
vasetType 1
@ -1111,11 +1111,11 @@ fg "0,65535,0"
xt "19625,13000,20375,13750"
)
tg (CPTG
uid 999,0
uid 1108,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1000,0
uid 1109,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1127,7 +1127,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1001,0
uid 1110,0
va (VaSet
font "Courier New,8,0"
)
@ -1142,7 +1142,7 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 81,0
suid 90,0
)
)
)
@ -1231,7 +1231,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1855,6 +1855,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1019,0
lastUid 1128,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,15 +70,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
)
(vvPair
variable "date"
value "14.12.2021"
value "21.12.2021"
)
(vvPair
variable "day"
@ -90,7 +90,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "14"
value "21"
)
(vvPair
variable "entity_name"
@ -114,11 +114,11 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "21.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:16:51"
value "14:37:32"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -170,11 +170,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:16:51"
value "14:37:32"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "selector_cruse"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -3288,8 +3288,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1715,1119"
viewArea "-24000,-19600,111317,70581"
windowSize "0,0,1537,960"
viewArea "-24000,-19600,113789,65032"
cachedDiagramExtent "0,-1000,86600,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -3668,7 +3668,7 @@ stateOrder [
name "csm"
)
]
lastUid 482,0
lastUid 511,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *71 (LEmptyRow
@ -3743,7 +3743,7 @@ port (LogicalPort
lang 11
decl (Decl
n "button"
t "unsigned"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
)
@ -3755,7 +3755,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "std_uLogic"
t "std_ulogic"
o 3
)
)
@ -3768,7 +3768,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 4
)
@ -3780,7 +3780,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 5
)
@ -3792,7 +3792,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos_init"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 6
)
@ -3804,7 +3804,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "std_uLogic"
t "std_ulogic"
o 7
)
)
@ -3818,7 +3818,7 @@ lang 11
m 1
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 8
)
@ -5048,6 +5048,6 @@ pts [
]
)
)
activeModelName "StateMachine"
activeModelName "StateMachine:CDM"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 64,0
suid 72,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,10 +73,10 @@ n "button"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
suid 57,0
suid 65,0
)
)
uid 839,0
uid 941,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 58,0
suid 66,0
)
)
uid 841,0
uid 943,0
)
*16 (LogPort
port (LogicalPort
@ -99,10 +99,10 @@ n "info_cruse"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 59,0
suid 67,0
)
)
uid 843,0
uid 945,0
)
*17 (LogPort
port (LogicalPort
@ -112,10 +112,10 @@ n "pos1"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 19
suid 60,0
suid 68,0
)
)
uid 845,0
uid 947,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "pos2"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 20
suid 61,0
suid 69,0
)
)
uid 847,0
uid 949,0
)
*19 (LogPort
port (LogicalPort
@ -138,23 +138,23 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 62,0
suid 70,0
)
)
uid 849,0
uid 951,0
)
*20 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 63,0
suid 71,0
)
)
uid 851,0
uid 953,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 64,0
suid 72,0
)
)
uid 853,0
uid 955,0
)
]
)
@ -222,49 +222,49 @@ uid 127,0
litem &14
pos 0
dimension 20
uid 840,0
uid 942,0
)
*28 (MRCItem
litem &15
pos 1
dimension 20
uid 842,0
uid 944,0
)
*29 (MRCItem
litem &16
pos 2
dimension 20
uid 844,0
uid 946,0
)
*30 (MRCItem
litem &17
pos 3
dimension 20
uid 846,0
uid 948,0
)
*31 (MRCItem
litem &18
pos 4
dimension 20
uid 848,0
uid 950,0
)
*32 (MRCItem
litem &19
pos 5
dimension 20
uid 850,0
uid 952,0
)
*33 (MRCItem
litem &20
pos 6
dimension 20
uid 852,0
uid 954,0
)
*34 (MRCItem
litem &21
pos 7
dimension 20
uid 854,0
uid 956,0
)
]
)
@ -495,23 +495,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -531,11 +531,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse"
)
(vvPair
variable "date"
@ -575,7 +575,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -587,11 +587,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "group"
@ -599,7 +599,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -631,11 +631,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_cruse\\interface"
)
(vvPair
variable "package_name"
@ -663,7 +663,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "unit"
@ -671,7 +671,7 @@ value "selector_cruse"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -698,10 +698,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*68 (CptPort
uid 799,0
uid 901,0
ps "OnEdgeStrategy"
shape (Triangle
uid 800,0
uid 902,0
ro 180
va (VaSet
vasetType 1
@ -710,11 +710,11 @@ fg "0,65535,0"
xt "16625,5250,17375,6000"
)
tg (CPTG
uid 801,0
uid 903,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 802,0
uid 904,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -727,7 +727,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 803,0
uid 905,0
va (VaSet
font "Courier New,8,0"
)
@ -742,15 +742,15 @@ n "button"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
suid 57,0
suid 65,0
)
)
)
*69 (CptPort
uid 804,0
uid 906,0
ps "OnEdgeStrategy"
shape (Triangle
uid 805,0
uid 907,0
ro 180
va (VaSet
vasetType 1
@ -759,11 +759,11 @@ fg "0,65535,0"
xt "19625,5250,20375,6000"
)
tg (CPTG
uid 806,0
uid 908,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 807,0
uid 909,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -776,7 +776,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 808,0
uid 910,0
va (VaSet
font "Courier New,8,0"
)
@ -790,15 +790,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 58,0
suid 66,0
)
)
)
*70 (CptPort
uid 809,0
uid 911,0
ps "OnEdgeStrategy"
shape (Triangle
uid 810,0
uid 912,0
ro 180
va (VaSet
vasetType 1
@ -807,11 +807,11 @@ fg "0,65535,0"
xt "16625,13000,17375,13750"
)
tg (CPTG
uid 811,0
uid 913,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 812,0
uid 914,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -823,7 +823,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 813,0
uid 915,0
va (VaSet
font "Courier New,8,0"
)
@ -839,15 +839,15 @@ n "info_cruse"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 59,0
suid 67,0
)
)
)
*71 (CptPort
uid 814,0
uid 916,0
ps "OnEdgeStrategy"
shape (Triangle
uid 815,0
uid 917,0
ro 90
va (VaSet
vasetType 1
@ -856,11 +856,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 816,0
uid 918,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 817,0
uid 919,0
va (VaSet
font "Verdana,12,0"
)
@ -871,7 +871,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 818,0
uid 920,0
va (VaSet
font "Courier New,8,0"
)
@ -886,15 +886,15 @@ n "pos1"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 19
suid 60,0
suid 68,0
)
)
)
*72 (CptPort
uid 819,0
uid 921,0
ps "OnEdgeStrategy"
shape (Triangle
uid 820,0
uid 922,0
ro 90
va (VaSet
vasetType 1
@ -903,11 +903,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 821,0
uid 923,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 822,0
uid 924,0
va (VaSet
font "Verdana,12,0"
)
@ -918,7 +918,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 823,0
uid 925,0
va (VaSet
font "Courier New,8,0"
)
@ -933,15 +933,15 @@ n "pos2"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 20
suid 61,0
suid 69,0
)
)
)
*73 (CptPort
uid 824,0
uid 926,0
ps "OnEdgeStrategy"
shape (Triangle
uid 825,0
uid 927,0
ro 90
va (VaSet
vasetType 1
@ -950,11 +950,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 826,0
uid 928,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 827,0
uid 929,0
va (VaSet
font "Verdana,12,0"
)
@ -965,7 +965,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 828,0
uid 930,0
va (VaSet
font "Courier New,8,0"
)
@ -980,15 +980,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 62,0
suid 70,0
)
)
)
*74 (CptPort
uid 829,0
uid 931,0
ps "OnEdgeStrategy"
shape (Triangle
uid 830,0
uid 932,0
ro 90
va (VaSet
vasetType 1
@ -997,11 +997,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 831,0
uid 933,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 832,0
uid 934,0
va (VaSet
font "Verdana,12,0"
)
@ -1012,30 +1012,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 833,0
uid 935,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,72500,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,68000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 63,0
suid 71,0
)
)
)
*75 (CptPort
uid 834,0
uid 936,0
ps "OnEdgeStrategy"
shape (Triangle
uid 835,0
uid 937,0
ro 180
va (VaSet
vasetType 1
@ -1044,11 +1044,11 @@ fg "0,65535,0"
xt "21625,5250,22375,6000"
)
tg (CPTG
uid 836,0
uid 938,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 837,0
uid 939,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1061,7 +1061,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 838,0
uid 940,0
va (VaSet
font "Courier New,8,0"
)
@ -1075,7 +1075,7 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 64,0
suid 72,0
)
)
)
@ -1164,7 +1164,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1788,6 +1788,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 854,0
lastUid 956,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,15 +70,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
)
(vvPair
variable "date"
value "14.12.2021"
value "21.12.2021"
)
(vvPair
variable "day"
@ -90,7 +90,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "14"
value "21"
)
(vvPair
variable "entity_name"
@ -114,11 +114,11 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "21.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:16:33"
value "14:37:13"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -170,11 +170,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:16:33"
value "14:37:13"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "selector_deceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -2288,8 +2288,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1715,1143"
viewArea "-400,-20100,134917,70081"
windowSize "0,0,1537,960"
viewArea "-400,-20100,137389,64532"
cachedDiagramExtent "0,-1000,128724,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -2665,7 +2665,7 @@ stateOrder [
name "csm"
)
]
lastUid 529,0
lastUid 558,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *63 (LEmptyRow
@ -2740,7 +2740,7 @@ port (LogicalPort
lang 11
decl (Decl
n "button"
t "unsigned"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
)
@ -2752,7 +2752,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "std_uLogic"
t "std_ulogic"
o 3
)
)
@ -2765,7 +2765,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 4
)
@ -2777,7 +2777,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 5
)
@ -2789,7 +2789,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos_init"
t "std_logic"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 6
)
@ -2801,7 +2801,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "std_uLogic"
t "std_ulogic"
o 7
)
)
@ -2815,7 +2815,7 @@ lang 11
m 1
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 8
)
@ -2888,19 +2888,19 @@ uid 427,0
)
*96 (MRCItem
litem &82
pos 0
pos 6
dimension 20
uid 157,0
)
*97 (MRCItem
litem &83
pos 1
pos 0
dimension 20
uid 159,0
)
*98 (MRCItem
litem &84
pos 2
pos 1
dimension 20
uid 161,0
)
@ -2924,13 +2924,13 @@ uid 167,0
)
*102 (MRCItem
litem &88
pos 6
pos 7
dimension 20
uid 169,0
)
*103 (MRCItem
litem &89
pos 7
pos 2
dimension 20
uid 171,0
)
@ -4064,6 +4064,6 @@ pts [
]
)
)
activeModelName "StateMachine"
activeModelName "StateMachine:CDM"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 71,0
suid 80,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,10 +73,10 @@ n "button"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
suid 63,0
suid 72,0
)
)
uid 840,0
uid 949,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 64,0
suid 73,0
)
)
uid 842,0
uid 951,0
)
*16 (LogPort
port (LogicalPort
@ -99,10 +99,10 @@ n "info_deceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 65,0
suid 74,0
)
)
uid 844,0
uid 953,0
)
*17 (LogPort
port (LogicalPort
@ -112,10 +112,10 @@ n "pos1"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 19
suid 66,0
suid 75,0
)
)
uid 846,0
uid 955,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "pos2"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 20
suid 67,0
suid 76,0
)
)
uid 848,0
uid 957,0
)
*19 (LogPort
port (LogicalPort
@ -138,23 +138,23 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 68,0
suid 77,0
)
)
uid 850,0
uid 959,0
)
*20 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 69,0
suid 78,0
)
)
uid 852,0
uid 961,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 70,0
suid 79,0
)
)
uid 854,0
uid 963,0
)
*22 (LogPort
port (LogicalPort
@ -176,10 +176,10 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 71,0
suid 80,0
)
)
uid 856,0
uid 965,0
)
]
)
@ -235,55 +235,55 @@ uid 127,0
litem &14
pos 0
dimension 20
uid 841,0
uid 950,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 843,0
uid 952,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 845,0
uid 954,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 847,0
uid 956,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 849,0
uid 958,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 851,0
uid 960,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 853,0
uid 962,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 855,0
uid 964,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 857,0
uid 966,0
)
]
)
@ -514,23 +514,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -550,11 +550,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration"
)
(vvPair
variable "date"
@ -594,7 +594,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -606,11 +606,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "group"
@ -618,7 +618,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -650,11 +650,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\selector_deceleration\\interface"
)
(vvPair
variable "package_name"
@ -682,7 +682,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:07:25"
value "14:37:58"
)
(vvPair
variable "unit"
@ -690,7 +690,7 @@ value "selector_deceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -717,10 +717,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 795,0
uid 904,0
ps "OnEdgeStrategy"
shape (Triangle
uid 796,0
uid 905,0
ro 180
va (VaSet
vasetType 1
@ -729,11 +729,11 @@ fg "0,65535,0"
xt "15625,5250,16375,6000"
)
tg (CPTG
uid 797,0
uid 906,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 798,0
uid 907,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -746,7 +746,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 799,0
uid 908,0
va (VaSet
font "Courier New,8,0"
)
@ -761,15 +761,15 @@ n "button"
t "std_uLogic_vector"
b "(3 DOWNTO 0)"
o 2
suid 63,0
suid 72,0
)
)
)
*71 (CptPort
uid 800,0
uid 909,0
ps "OnEdgeStrategy"
shape (Triangle
uid 801,0
uid 910,0
ro 180
va (VaSet
vasetType 1
@ -778,11 +778,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 802,0
uid 911,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 803,0
uid 912,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -795,7 +795,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 804,0
uid 913,0
va (VaSet
font "Courier New,8,0"
)
@ -809,15 +809,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 3
suid 64,0
suid 73,0
)
)
)
*72 (CptPort
uid 805,0
uid 914,0
ps "OnEdgeStrategy"
shape (Triangle
uid 806,0
uid 915,0
ro 180
va (VaSet
vasetType 1
@ -826,11 +826,11 @@ fg "0,65535,0"
xt "16625,13000,17375,13750"
)
tg (CPTG
uid 807,0
uid 916,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 808,0
uid 917,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -842,7 +842,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 809,0
uid 918,0
va (VaSet
font "Courier New,8,0"
)
@ -858,15 +858,15 @@ n "info_deceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 65,0
suid 74,0
)
)
)
*73 (CptPort
uid 810,0
uid 919,0
ps "OnEdgeStrategy"
shape (Triangle
uid 811,0
uid 920,0
ro 90
va (VaSet
vasetType 1
@ -875,11 +875,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 812,0
uid 921,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 813,0
uid 922,0
va (VaSet
font "Verdana,12,0"
)
@ -890,7 +890,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 814,0
uid 923,0
va (VaSet
font "Courier New,8,0"
)
@ -905,15 +905,15 @@ n "pos1"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 19
suid 66,0
suid 75,0
)
)
)
*74 (CptPort
uid 815,0
uid 924,0
ps "OnEdgeStrategy"
shape (Triangle
uid 816,0
uid 925,0
ro 90
va (VaSet
vasetType 1
@ -922,11 +922,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 817,0
uid 926,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 818,0
uid 927,0
va (VaSet
font "Verdana,12,0"
)
@ -937,7 +937,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 819,0
uid 928,0
va (VaSet
font "Courier New,8,0"
)
@ -952,15 +952,15 @@ n "pos2"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 20
suid 67,0
suid 76,0
)
)
)
*75 (CptPort
uid 820,0
uid 929,0
ps "OnEdgeStrategy"
shape (Triangle
uid 821,0
uid 930,0
ro 90
va (VaSet
vasetType 1
@ -969,11 +969,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 822,0
uid 931,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 823,0
uid 932,0
va (VaSet
font "Verdana,12,0"
)
@ -984,7 +984,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 824,0
uid 933,0
va (VaSet
font "Courier New,8,0"
)
@ -999,15 +999,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 68,0
suid 77,0
)
)
)
*76 (CptPort
uid 825,0
uid 934,0
ps "OnEdgeStrategy"
shape (Triangle
uid 826,0
uid 935,0
ro 90
va (VaSet
vasetType 1
@ -1016,11 +1016,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 827,0
uid 936,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 828,0
uid 937,0
va (VaSet
font "Verdana,12,0"
)
@ -1031,30 +1031,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 829,0
uid 938,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,76000,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,71500,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 69,0
suid 78,0
)
)
)
*77 (CptPort
uid 830,0
uid 939,0
ps "OnEdgeStrategy"
shape (Triangle
uid 831,0
uid 940,0
ro 180
va (VaSet
vasetType 1
@ -1063,11 +1063,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 832,0
uid 941,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 833,0
uid 942,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1080,7 +1080,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 834,0
uid 943,0
va (VaSet
font "Courier New,8,0"
)
@ -1094,15 +1094,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 70,0
suid 79,0
)
)
)
*78 (CptPort
uid 835,0
uid 944,0
ps "OnEdgeStrategy"
shape (Triangle
uid 836,0
uid 945,0
ro 180
va (VaSet
vasetType 1
@ -1111,11 +1111,11 @@ fg "0,65535,0"
xt "19625,13000,20375,13750"
)
tg (CPTG
uid 837,0
uid 946,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 838,0
uid 947,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1127,7 +1127,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 839,0
uid 948,0
va (VaSet
font "Courier New,8,0"
)
@ -1142,7 +1142,7 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 71,0
suid 80,0
)
)
)
@ -1231,7 +1231,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,45400,49000"
st "
by %user on %dd %month %year
"
@ -1855,6 +1855,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 857,0
lastUid 966,0
activeModelName "Symbol:CDM"
)

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 30,0
suid 35,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -67,10 +67,10 @@ decl (Decl
n "clk"
t "std_ulogic"
o 2
suid 26,0
suid 31,0
)
)
uid 515,0
uid 573,0
)
*15 (LogPort
port (LogicalPort
@ -80,23 +80,23 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 3
suid 27,0
suid 32,0
)
)
uid 517,0
uid 575,0
)
*16 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 28,0
suid 33,0
)
)
uid 519,0
uid 577,0
)
*17 (LogPort
port (LogicalPort
@ -105,10 +105,10 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 29,0
suid 34,0
)
)
uid 521,0
uid 579,0
)
*18 (LogPort
port (LogicalPort
@ -118,10 +118,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 30,0
suid 35,0
)
)
uid 523,0
uid 581,0
)
]
)
@ -177,31 +177,31 @@ uid 92,0
litem &14
pos 0
dimension 20
uid 516,0
uid 574,0
)
*25 (MRCItem
litem &15
pos 1
dimension 20
uid 518,0
uid 576,0
)
*26 (MRCItem
litem &16
pos 2
dimension 20
uid 520,0
uid 578,0
)
*27 (MRCItem
litem &17
pos 3
dimension 20
uid 522,0
uid 580,0
)
*28 (MRCItem
litem &18
pos 4
dimension 20
uid 524,0
uid 582,0
)
]
)
@ -432,23 +432,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -468,11 +468,11 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
)
(vvPair
variable "date"
@ -512,7 +512,7 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
@ -524,11 +524,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:06:44"
value "14:36:24"
)
(vvPair
variable "group"
@ -536,7 +536,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -568,11 +568,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\interface"
)
(vvPair
variable "package_name"
@ -600,7 +600,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:06:44"
value "14:36:24"
)
(vvPair
variable "unit"
@ -608,7 +608,7 @@ value "side_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -635,10 +635,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*62 (CptPort
uid 490,0
uid 548,0
ps "OnEdgeStrategy"
shape (Triangle
uid 491,0
uid 549,0
ro 90
va (VaSet
vasetType 1
@ -647,11 +647,11 @@ fg "0,65535,0"
xt "14250,13625,15000,14375"
)
tg (CPTG
uid 492,0
uid 550,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 493,0
uid 551,0
va (VaSet
font "Verdana,12,0"
)
@ -662,7 +662,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 494,0
uid 552,0
va (VaSet
font "Courier New,8,0"
)
@ -676,15 +676,15 @@ decl (Decl
n "clk"
t "std_ulogic"
o 2
suid 26,0
suid 31,0
)
)
)
*63 (CptPort
uid 495,0
uid 553,0
ps "OnEdgeStrategy"
shape (Triangle
uid 496,0
uid 554,0
ro 90
va (VaSet
vasetType 1
@ -693,11 +693,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 497,0
uid 555,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 498,0
uid 556,0
va (VaSet
font "Verdana,12,0"
)
@ -708,7 +708,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 499,0
uid 557,0
va (VaSet
font "Courier New,8,0"
)
@ -723,15 +723,15 @@ n "info_acceleration"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 3
suid 27,0
suid 32,0
)
)
)
*64 (CptPort
uid 500,0
uid 558,0
ps "OnEdgeStrategy"
shape (Triangle
uid 501,0
uid 559,0
ro 90
va (VaSet
vasetType 1
@ -740,11 +740,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 502,0
uid 560,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 503,0
uid 561,0
va (VaSet
font "Verdana,12,0"
)
@ -755,30 +755,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 504,0
uid 562,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,76500,3200"
st "Position : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 28,0
suid 33,0
)
)
)
*65 (CptPort
uid 505,0
uid 563,0
ps "OnEdgeStrategy"
shape (Triangle
uid 506,0
uid 564,0
ro 90
va (VaSet
vasetType 1
@ -787,11 +787,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 507,0
uid 565,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 508,0
uid 566,0
va (VaSet
font "Verdana,12,0"
)
@ -802,7 +802,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 509,0
uid 567,0
va (VaSet
font "Courier New,8,0"
)
@ -816,15 +816,15 @@ decl (Decl
n "rst"
t "std_ulogic"
o 4
suid 29,0
suid 34,0
)
)
)
*66 (CptPort
uid 510,0
uid 568,0
ps "OnEdgeStrategy"
shape (Triangle
uid 511,0
uid 569,0
ro 90
va (VaSet
vasetType 1
@ -833,11 +833,11 @@ fg "0,65535,0"
xt "23000,10625,23750,11375"
)
tg (CPTG
uid 512,0
uid 570,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 513,0
uid 571,0
va (VaSet
font "Verdana,12,0"
)
@ -849,7 +849,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 514,0
uid 572,0
va (VaSet
font "Courier New,8,0"
)
@ -864,7 +864,7 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 30,0
suid 35,0
)
)
)
@ -1575,6 +1575,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 524,0
lastUid 582,0
activeModelName "Symbol:CDM"
)

View File

@ -59,7 +59,7 @@ value "0"
)
]
mwi 0
uid 4692,0
uid 5729,0
)
]
libraryRefs [
@ -178,7 +178,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:28:55"
value "14:33:58"
)
(vvPair
variable "group"
@ -302,7 +302,7 @@ value "struct"
)
(vvPair
variable "time"
value "14:28:55"
value "14:33:58"
)
(vvPair
variable "unit"
@ -449,7 +449,7 @@ va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "56200,91400,71600,92600"
xt "56200,91400,70700,92600"
st "
by %user on %dd %month %year
"
@ -985,13 +985,13 @@ st "SIGNAL button4 : std_uLogic"
)
)
*31 (SaComponent
uid 4692,0
uid 5729,0
optionalChildren [
*32 (CptPort
uid 4587,0
uid 5624,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4588,0
uid 5625,0
ro 90
va (VaSet
vasetType 1
@ -1000,11 +1000,11 @@ fg "0,65535,0"
xt "38250,62625,39000,63375"
)
tg (CPTG
uid 4589,0
uid 5626,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4590,0
uid 5627,0
va (VaSet
font "Verdana,12,0"
)
@ -1023,10 +1023,10 @@ suid 1,0
)
)
*33 (CptPort
uid 4592,0
uid 5629,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4593,0
uid 5630,0
ro 90
va (VaSet
vasetType 1
@ -1035,11 +1035,11 @@ fg "0,65535,0"
xt "38250,64625,39000,65375"
)
tg (CPTG
uid 4594,0
uid 5631,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4595,0
uid 5632,0
va (VaSet
font "Verdana,12,0"
)
@ -1058,10 +1058,10 @@ suid 2,0
)
)
*34 (CptPort
uid 4597,0
uid 5634,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4598,0
uid 5635,0
ro 90
va (VaSet
vasetType 1
@ -1070,11 +1070,11 @@ fg "0,65535,0"
xt "55000,40625,55750,41375"
)
tg (CPTG
uid 4599,0
uid 5636,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4600,0
uid 5637,0
va (VaSet
font "Verdana,12,0"
)
@ -1095,10 +1095,10 @@ suid 3,0
)
)
*35 (CptPort
uid 4602,0
uid 5639,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4603,0
uid 5640,0
ro 90
va (VaSet
vasetType 1
@ -1107,11 +1107,11 @@ fg "0,65535,0"
xt "38250,38625,39000,39375"
)
tg (CPTG
uid 4604,0
uid 5641,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4605,0
uid 5642,0
va (VaSet
font "Verdana,12,0"
)
@ -1130,10 +1130,10 @@ suid 4,0
)
)
*36 (CptPort
uid 4607,0
uid 5644,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4608,0
uid 5645,0
ro 90
va (VaSet
vasetType 1
@ -1142,11 +1142,11 @@ fg "0,65535,0"
xt "38250,42625,39000,43375"
)
tg (CPTG
uid 4609,0
uid 5646,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4610,0
uid 5647,0
va (VaSet
font "Verdana,12,0"
)
@ -1165,10 +1165,10 @@ suid 5,0
)
)
*37 (CptPort
uid 4612,0
uid 5649,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4613,0
uid 5650,0
ro 270
va (VaSet
vasetType 1
@ -1177,11 +1177,11 @@ fg "0,65535,0"
xt "55000,46625,55750,47375"
)
tg (CPTG
uid 4614,0
uid 5651,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4615,0
uid 5652,0
va (VaSet
font "Verdana,12,0"
)
@ -1201,10 +1201,10 @@ suid 6,0
)
)
*38 (CptPort
uid 4617,0
uid 5654,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4618,0
uid 5655,0
ro 90
va (VaSet
vasetType 1
@ -1213,11 +1213,11 @@ fg "0,65535,0"
xt "38250,60625,39000,61375"
)
tg (CPTG
uid 4619,0
uid 5656,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4620,0
uid 5657,0
va (VaSet
font "Verdana,12,0"
)
@ -1236,47 +1236,10 @@ suid 7,0
)
)
*39 (CptPort
uid 4622,0
uid 5659,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4623,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "46625,34250,47375,35000"
)
tg (CPTG
uid 4624,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4625,0
va (VaSet
font "Verdana,12,0"
)
xt "44000,36000,49600,37400"
st "testOut"
ju 2
blo "49600,37200"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 TO testLineNb)"
o 21
suid 8,0
)
)
)
*40 (CptPort
uid 4627,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4628,0
uid 5660,0
ro 90
va (VaSet
vasetType 1
@ -1285,11 +1248,11 @@ fg "0,65535,0"
xt "38250,40625,39000,41375"
)
tg (CPTG
uid 4629,0
uid 5661,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4630,0
uid 5662,0
va (VaSet
font "Verdana,12,0"
)
@ -1307,11 +1270,11 @@ suid 9,0
)
)
)
*41 (CptPort
uid 4632,0
*40 (CptPort
uid 5664,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4633,0
uid 5665,0
ro 90
va (VaSet
vasetType 1
@ -1320,11 +1283,11 @@ fg "0,65535,0"
xt "55000,42625,55750,43375"
)
tg (CPTG
uid 4634,0
uid 5666,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4635,0
uid 5667,0
va (VaSet
font "Verdana,12,0"
)
@ -1344,11 +1307,11 @@ suid 10,0
)
)
)
*42 (CptPort
uid 4637,0
*41 (CptPort
uid 5669,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4638,0
uid 5670,0
ro 270
va (VaSet
vasetType 1
@ -1357,11 +1320,11 @@ fg "0,65535,0"
xt "55000,48625,55750,49375"
)
tg (CPTG
uid 4639,0
uid 5671,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4640,0
uid 5672,0
va (VaSet
font "Verdana,12,0"
)
@ -1380,11 +1343,11 @@ suid 11,0
)
)
)
*43 (CptPort
uid 4642,0
*42 (CptPort
uid 5674,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4643,0
uid 5675,0
ro 90
va (VaSet
vasetType 1
@ -1393,11 +1356,11 @@ fg "0,65535,0"
xt "55000,38625,55750,39375"
)
tg (CPTG
uid 4644,0
uid 5676,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4645,0
uid 5677,0
va (VaSet
font "Verdana,12,0"
)
@ -1417,11 +1380,11 @@ suid 12,0
)
)
)
*44 (CptPort
uid 4647,0
*43 (CptPort
uid 5679,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4648,0
uid 5680,0
ro 270
va (VaSet
vasetType 1
@ -1430,11 +1393,11 @@ fg "0,65535,0"
xt "55000,52625,55750,53375"
)
tg (CPTG
uid 4649,0
uid 5681,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4650,0
uid 5682,0
va (VaSet
font "Verdana,12,0"
)
@ -1453,11 +1416,11 @@ suid 13,0
)
)
)
*45 (CptPort
uid 4652,0
*44 (CptPort
uid 5684,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4653,0
uid 5685,0
ro 270
va (VaSet
vasetType 1
@ -1466,11 +1429,11 @@ fg "0,65535,0"
xt "55000,54625,55750,55375"
)
tg (CPTG
uid 4654,0
uid 5686,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4655,0
uid 5687,0
va (VaSet
font "Verdana,12,0"
)
@ -1489,11 +1452,11 @@ suid 14,0
)
)
)
*46 (CptPort
uid 4657,0
*45 (CptPort
uid 5689,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4658,0
uid 5690,0
ro 270
va (VaSet
vasetType 1
@ -1502,11 +1465,11 @@ fg "0,65535,0"
xt "55000,56625,55750,57375"
)
tg (CPTG
uid 4659,0
uid 5691,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 4660,0
uid 5692,0
va (VaSet
font "Verdana,12,0"
)
@ -1525,11 +1488,11 @@ suid 15,0
)
)
)
*47 (CptPort
uid 4662,0
*46 (CptPort
uid 5694,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4663,0
uid 5695,0
ro 90
va (VaSet
vasetType 1
@ -1538,11 +1501,11 @@ fg "0,65535,0"
xt "38250,44625,39000,45375"
)
tg (CPTG
uid 4664,0
uid 5696,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4665,0
uid 5697,0
va (VaSet
font "Verdana,12,0"
)
@ -1561,11 +1524,11 @@ suid 16,0
)
)
)
*48 (CptPort
uid 4667,0
*47 (CptPort
uid 5699,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4668,0
uid 5700,0
ro 270
va (VaSet
vasetType 1
@ -1574,11 +1537,11 @@ fg "0,65535,0"
xt "38250,48625,39000,49375"
)
tg (CPTG
uid 4669,0
uid 5701,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4670,0
uid 5702,0
va (VaSet
font "Verdana,12,0"
)
@ -1597,11 +1560,11 @@ suid 2017,0
)
)
)
*49 (CptPort
uid 4672,0
*48 (CptPort
uid 5704,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4673,0
uid 5705,0
ro 270
va (VaSet
vasetType 1
@ -1610,11 +1573,11 @@ fg "0,65535,0"
xt "38250,50625,39000,51375"
)
tg (CPTG
uid 4674,0
uid 5706,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4675,0
uid 5707,0
va (VaSet
font "Verdana,12,0"
)
@ -1633,11 +1596,11 @@ suid 2018,0
)
)
)
*50 (CptPort
uid 4677,0
*49 (CptPort
uid 5709,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4678,0
uid 5710,0
ro 270
va (VaSet
vasetType 1
@ -1646,11 +1609,11 @@ fg "0,65535,0"
xt "38250,52625,39000,53375"
)
tg (CPTG
uid 4679,0
uid 5711,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4680,0
uid 5712,0
va (VaSet
font "Verdana,12,0"
)
@ -1669,11 +1632,11 @@ suid 2019,0
)
)
)
*51 (CptPort
uid 4682,0
*50 (CptPort
uid 5714,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4683,0
uid 5715,0
ro 270
va (VaSet
vasetType 1
@ -1682,11 +1645,11 @@ fg "0,65535,0"
xt "38250,54625,39000,55375"
)
tg (CPTG
uid 4684,0
uid 5716,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4685,0
uid 5717,0
va (VaSet
font "Verdana,12,0"
)
@ -1705,11 +1668,11 @@ suid 2020,0
)
)
)
*52 (CptPort
uid 4687,0
*51 (CptPort
uid 5719,0
ps "OnEdgeStrategy"
shape (Triangle
uid 4688,0
uid 5720,0
ro 270
va (VaSet
vasetType 1
@ -1718,11 +1681,11 @@ fg "0,65535,0"
xt "38250,56625,39000,57375"
)
tg (CPTG
uid 4689,0
uid 5721,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 4690,0
uid 5722,0
va (VaSet
font "Verdana,12,0"
)
@ -1741,9 +1704,46 @@ suid 2021,0
)
)
)
*52 (CptPort
uid 5724,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5725,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "46625,34250,47375,35000"
)
tg (CPTG
uid 5726,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5727,0
va (VaSet
font "Verdana,12,0"
)
xt "44000,36000,49600,37400"
st "testOut"
ju 2
blo "49600,37200"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 TO testLineNb)"
o 21
suid 2022,0
)
)
)
]
shape (Rectangle
uid 4693,0
uid 5730,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -1754,53 +1754,53 @@ xt "39000,35000,55000,67000"
)
oxt "40000,2000,56000,34000"
ttg (MlTextGroup
uid 4694,0
uid 5731,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*53 (Text
uid 4695,0
uid 5732,0
va (VaSet
font "Verdana,8,1"
)
xt "39100,66700,42100,67600"
xt "39100,66700,42800,67700"
st "Cursor"
blo "39100,67400"
blo "39100,67500"
tm "BdLibraryNameMgr"
)
*54 (Text
uid 4696,0
uid 5733,0
va (VaSet
font "Verdana,8,1"
)
xt "39100,67600,46100,68500"
xt "39100,67700,46400,68700"
st "cursorCircuit"
blo "39100,68300"
blo "39100,68500"
tm "CptNameMgr"
)
*55 (Text
uid 4697,0
uid 5734,0
va (VaSet
font "Verdana,8,1"
)
xt "39100,68500,41600,69400"
xt "39100,68700,42600,69700"
st "I_DUT"
blo "39100,69200"
blo "39100,69500"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 4698,0
uid 5735,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 4699,0
uid 5736,0
text (MLText
uid 4700,0
uid 5737,0
va (VaSet
font "Verdana,8,0"
font "Courier New,8,0"
)
xt "39000,70200,61000,76200"
xt "39000,70200,66500,75000"
st "position0 = position0 ( positive )
position1 = position1 ( positive )
position2 = position2 ( positive )
@ -1979,7 +1979,7 @@ pts [
"67000,75000"
]
)
start &42
start &41
end &14
sat 32
eat 2
@ -2055,7 +2055,7 @@ pts [
"77000,75000"
]
)
start &43
start &42
end &14
sat 32
eat 1
@ -2131,7 +2131,7 @@ pts [
"73000,75000"
]
)
start &41
start &40
end &14
sat 32
eat 1
@ -2207,7 +2207,7 @@ pts [
"23000,75000"
]
)
start &40
start &39
end &14
sat 32
eat 2
@ -2283,7 +2283,7 @@ pts [
"59000,75000"
]
)
start &46
start &45
end &14
sat 32
eat 2
@ -2321,7 +2321,7 @@ pts [
"61000,75000"
]
)
start &45
start &44
end &14
sat 32
eat 2
@ -2359,7 +2359,7 @@ pts [
"63000,75000"
]
)
start &44
start &43
end &14
sat 32
eat 2
@ -2397,7 +2397,7 @@ pts [
"27000,75000"
]
)
start &47
start &46
end &14
sat 32
eat 2
@ -2532,7 +2532,7 @@ tm "BdCompilerDirectivesTextMgr"
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pageSetupInfo (PageSetupInfo
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hasePageBreakOrigin 1
pageBreakOrigin "-7000,19000"
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lastUid 5737,0
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@ -6695,6 +6695,7 @@ font "Courier New,8,0"
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order 0
editSignalScope 4
promptGenOrderIndicator 0
showUpdateWhereUsedPrompt 0
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]