1
0
mirror of https://github.com/Klagarge/Cursor.git synced 2025-04-11 10:56:02 +00:00

finish buttons

This commit is contained in:
Rémi Heredero 2021-12-15 20:43:01 +01:00
parent 2e9c496048
commit 56e5c6f084
7 changed files with 710 additions and 886 deletions

File diff suppressed because it is too large Load Diff

View File

@ -523,19 +523,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "07.12.2021"
value "15.12.2021"
)
(vvPair
variable "day"
value "mar."
value "mer."
)
(vvPair
variable "day_long"
value "mardi"
value "mercredi"
)
(vvPair
variable "dd"
value "07"
value "15"
)
(vvPair
variable "entity_name"
@ -563,7 +563,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "07.12.2021"
value "15.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -575,7 +575,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "09:34:59"
value "20:42:30"
)
(vvPair
variable "group"
@ -647,7 +647,7 @@ value "interface"
)
(vvPair
variable "time"
value "09:34:59"
value "20:42:30"
)
(vvPair
variable "unit"
@ -1746,6 +1746,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 357,0
lastUid 380,0
activeModelName "Symbol:CDM"
)

File diff suppressed because it is too large Load Diff

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 7,0
suid 14,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -65,11 +65,11 @@ port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 1
suid 1,0
o 2
suid 8,0
)
)
uid 86,0
uid 353,0
)
*15 (LogPort
port (LogicalPort
@ -79,55 +79,55 @@ decl (Decl
n "dbus0"
t "unsigned"
b "(2 DOWNTO 0)"
o 7
suid 2,0
o 9
suid 9,0
)
)
uid 88,0
uid 355,0
)
*16 (LogPort
port (LogicalPort
decl (Decl
n "go1"
t "std_uLogic"
o 2
suid 3,0
o 3
suid 10,0
)
)
uid 90,0
uid 357,0
)
*17 (LogPort
port (LogicalPort
decl (Decl
n "go2"
t "std_uLogic"
o 3
suid 4,0
o 4
suid 11,0
)
)
uid 92,0
uid 359,0
)
*18 (LogPort
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 5,0
o 9
suid 12,0
)
)
uid 94,0
uid 361,0
)
*19 (LogPort
port (LogicalPort
decl (Decl
n "restart"
t "std_uLogic"
o 5
suid 6,0
o 6
suid 13,0
)
)
uid 96,0
uid 363,0
)
*20 (LogPort
port (LogicalPort
@ -135,11 +135,11 @@ lang 11
decl (Decl
n "unlock"
t "std_ulogic"
o 6
suid 7,0
o 7
suid 14,0
)
)
uid 98,0
uid 365,0
)
]
)
@ -195,43 +195,43 @@ uid 120,0
litem &14
pos 0
dimension 20
uid 87,0
uid 354,0
)
*27 (MRCItem
litem &15
pos 6
pos 1
dimension 20
uid 89,0
uid 356,0
)
*28 (MRCItem
litem &16
pos 1
pos 2
dimension 20
uid 91,0
uid 358,0
)
*29 (MRCItem
litem &17
pos 2
pos 3
dimension 20
uid 93,0
uid 360,0
)
*30 (MRCItem
litem &18
pos 3
pos 4
dimension 20
uid 95,0
uid 362,0
)
*31 (MRCItem
litem &19
pos 4
pos 5
dimension 20
uid 97,0
uid 364,0
)
*32 (MRCItem
litem &20
pos 5
pos 6
dimension 20
uid 99,0
uid 366,0
)
]
)
@ -506,19 +506,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "07.12.2021"
value "15.12.2021"
)
(vvPair
variable "day"
value "mar."
value "mer."
)
(vvPair
variable "day_long"
value "mardi"
value "mercredi"
)
(vvPair
variable "dd"
value "07"
value "15"
)
(vvPair
variable "entity_name"
@ -546,7 +546,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "07.12.2021"
value "15.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -558,7 +558,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "09:34:57"
value "20:42:30"
)
(vvPair
variable "group"
@ -630,7 +630,7 @@ value "interface"
)
(vvPair
variable "time"
value "09:34:57"
value "20:42:30"
)
(vvPair
variable "unit"
@ -665,10 +665,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*66 (CptPort
uid 51,0
uid 318,0
ps "OnEdgeStrategy"
shape (Triangle
uid 52,0
uid 319,0
ro 90
va (VaSet
vasetType 1
@ -677,11 +677,11 @@ fg "0,65535,0"
xt "14250,19625,15000,20375"
)
tg (CPTG
uid 53,0
uid 320,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 54,0
uid 321,0
va (VaSet
font "Verdana,12,0"
)
@ -692,27 +692,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 55,0
uid 322,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,60500,3200"
st "clock : IN std_ulogic ;"
st "clock : IN std_ulogic ;
"
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 1
suid 1,0
o 2
suid 8,0
)
)
)
*67 (CptPort
uid 56,0
uid 323,0
ps "OnEdgeStrategy"
shape (Triangle
uid 57,0
uid 324,0
ro 90
va (VaSet
vasetType 1
@ -721,11 +722,11 @@ fg "0,65535,0"
xt "23000,10625,23750,11375"
)
tg (CPTG
uid 58,0
uid 325,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 59,0
uid 326,0
va (VaSet
font "Verdana,12,0"
)
@ -737,12 +738,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 60,0
uid 327,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,64500,8000"
st "dbus0 : OUT unsigned (2 DOWNTO 0)"
st "dbus0 : OUT unsigned (2 DOWNTO 0)
"
)
thePort (LogicalPort
lang 11
@ -751,16 +753,16 @@ decl (Decl
n "dbus0"
t "unsigned"
b "(2 DOWNTO 0)"
o 7
suid 2,0
o 9
suid 9,0
)
)
)
*68 (CptPort
uid 61,0
uid 328,0
ps "OnEdgeStrategy"
shape (Triangle
uid 62,0
uid 329,0
ro 90
va (VaSet
vasetType 1
@ -769,11 +771,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 63,0
uid 330,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 64,0
uid 331,0
va (VaSet
font "Verdana,12,0"
)
@ -784,27 +786,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 65,0
uid 332,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,60500,4000"
st "go1 : IN std_uLogic ;"
st "go1 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "go1"
t "std_uLogic"
o 2
suid 3,0
o 3
suid 10,0
)
)
)
*69 (CptPort
uid 66,0
uid 333,0
ps "OnEdgeStrategy"
shape (Triangle
uid 67,0
uid 334,0
ro 90
va (VaSet
vasetType 1
@ -813,11 +816,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 68,0
uid 335,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 69,0
uid 336,0
va (VaSet
font "Verdana,12,0"
)
@ -828,27 +831,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 70,0
uid 337,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,60500,4800"
st "go2 : IN std_uLogic ;"
st "go2 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "go2"
t "std_uLogic"
o 3
suid 4,0
o 4
suid 11,0
)
)
)
*70 (CptPort
uid 71,0
uid 338,0
ps "OnEdgeStrategy"
shape (Triangle
uid 72,0
uid 339,0
ro 90
va (VaSet
vasetType 1
@ -857,11 +861,11 @@ fg "0,65535,0"
xt "14250,21625,15000,22375"
)
tg (CPTG
uid 73,0
uid 340,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 74,0
uid 341,0
va (VaSet
font "Verdana,12,0"
)
@ -872,27 +876,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 75,0
uid 342,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,60500,5600"
st "reset : IN std_ulogic ;"
st "reset : IN std_ulogic ;
"
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 5,0
o 9
suid 12,0
)
)
)
*71 (CptPort
uid 76,0
uid 343,0
ps "OnEdgeStrategy"
shape (Triangle
uid 77,0
uid 344,0
ro 90
va (VaSet
vasetType 1
@ -901,11 +906,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 78,0
uid 345,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 79,0
uid 346,0
va (VaSet
font "Verdana,12,0"
)
@ -916,27 +921,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 80,0
uid 347,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,60500,6400"
st "restart : IN std_uLogic ;"
st "restart : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "restart"
t "std_uLogic"
o 5
suid 6,0
o 6
suid 13,0
)
)
)
*72 (CptPort
uid 81,0
uid 348,0
ps "OnEdgeStrategy"
shape (Triangle
uid 82,0
uid 349,0
ro 90
va (VaSet
vasetType 1
@ -945,11 +951,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 83,0
uid 350,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 84,0
uid 351,0
va (VaSet
font "Verdana,12,0"
)
@ -960,20 +966,21 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 85,0
uid 352,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,60500,7200"
st "unlock : IN std_ulogic ;"
st "unlock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "unlock"
t "std_ulogic"
o 6
suid 7,0
o 7
suid 14,0
)
)
)
@ -1684,6 +1691,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 294,0
lastUid 366,0
activeModelName "Symbol:CDM"
)

View File

@ -66,23 +66,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -102,27 +102,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit"
)
(vvPair
variable "date"
value "14.12.2021"
value "15.12.2021"
)
(vvPair
variable "day"
value "mar."
value "mer."
)
(vvPair
variable "day_long"
value "mardi"
value "mercredi"
)
(vvPair
variable "dd"
value "14"
value "15"
)
(vvPair
variable "designName"
@ -150,11 +150,11 @@ value "student@version"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "15.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -162,11 +162,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:18:34"
value "20:42:35"
)
(vvPair
variable "group"
@ -174,7 +174,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -222,11 +222,11 @@ value "d
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\student@version.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit\\studentVersion.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit\\studentVersion.bd"
)
(vvPair
variable "package_name"
@ -302,7 +302,7 @@ value "studentVersion"
)
(vvPair
variable "time"
value "14:18:34"
value "20:42:35"
)
(vvPair
variable "unit"
@ -310,7 +310,7 @@ value "cursorCircuit"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -347,8 +347,7 @@ va (VaSet
isHidden 1
)
xt "26000,1000,37800,2200"
st "reset : std_ulogic
"
st "reset : std_ulogic"
)
)
*2 (Net
@ -365,8 +364,7 @@ va (VaSet
isHidden 1
)
xt "26000,-2600,37900,-1400"
st "clock : std_ulogic
"
st "clock : std_ulogic"
)
)
*3 (Grouping
@ -754,8 +752,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "-17000,5800,-7400,6800"
st "restart : std_uLogic
"
st "restart : std_uLogic"
)
)
*16 (PortIoIn
@ -828,8 +825,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "-17000,5800,-6600,6800"
st "testMode : std_uLogic
"
st "testMode : std_uLogic"
)
)
*18 (PortIoOut
@ -901,8 +897,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,20600,1800"
st "testOut : std_uLogic_vector(1 TO testLineNb)
"
st "testOut : std_uLogic_vector(1 TO testLineNb)"
)
)
*20 (PortIoIn
@ -975,8 +970,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,10100,1800"
st "sensor1 : std_uLogic
"
st "sensor1 : std_uLogic"
)
)
*22 (PortIoIn
@ -1049,8 +1043,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,10100,1800"
st "sensor2 : std_uLogic
"
st "sensor2 : std_uLogic"
)
)
*24 (PortIoOut
@ -1121,8 +1114,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,10500,1800"
st "motorOn : std_uLogic
"
st "motorOn : std_uLogic"
)
)
*26 (PortIoOut
@ -1193,8 +1185,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,9700,1800"
st "side1 : std_uLogic
"
st "side1 : std_uLogic"
)
)
*28 (PortIoOut
@ -1265,8 +1256,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,9700,1800"
st "side2 : std_uLogic
"
st "side2 : std_uLogic"
)
)
*30 (PortIoIn
@ -1339,8 +1329,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,10400,1800"
st "encoderA : std_uLogic
"
st "encoderA : std_uLogic"
)
)
*32 (PortIoIn
@ -1413,8 +1402,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,10400,1800"
st "encoderB : std_uLogic
"
st "encoderB : std_uLogic"
)
)
*34 (PortIoIn
@ -1487,8 +1475,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,10200,1800"
st "encoderI : std_uLogic
"
st "encoderI : std_uLogic"
)
)
*36 (PortIoIn
@ -1561,8 +1548,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,9700,1800"
st "go1 : std_uLogic
"
st "go1 : std_uLogic"
)
)
*38 (PortIoIn
@ -1635,8 +1621,7 @@ isHidden 1
font "Verdana,8,0"
)
xt "0,800,9700,1800"
st "go2 : std_uLogic
"
st "go2 : std_uLogic"
)
)
*40 (PortIoIn
@ -1708,8 +1693,7 @@ va (VaSet
isHidden 1
)
xt "0,-23800,12800,-22600"
st "button4 : std_uLogic
"
st "button4 : std_uLogic"
)
)
*42 (PortIoIn
@ -1836,8 +1820,7 @@ va (VaSet
isHidden 1
)
xt "0,400,12600,1600"
st "CS1_n : std_ulogic
"
st "CS1_n : std_ulogic"
)
)
*45 (Net
@ -1854,8 +1837,7 @@ va (VaSet
isHidden 1
)
xt "0,400,11900,1600"
st "SCL : std_ulogic
"
st "SCL : std_ulogic"
)
)
*46 (Net
@ -1872,8 +1854,7 @@ va (VaSet
isHidden 1
)
xt "0,400,11300,1600"
st "SI : std_ulogic
"
st "SI : std_ulogic"
)
)
*47 (Net
@ -1890,8 +1871,7 @@ va (VaSet
isHidden 1
)
xt "0,400,11600,1600"
st "A0 : std_ulogic
"
st "A0 : std_ulogic"
)
)
*48 (Net
@ -1908,8 +1888,7 @@ va (VaSet
isHidden 1
)
xt "0,400,12500,1600"
st "RST_n : std_ulogic
"
st "RST_n : std_ulogic"
)
)
*49 (PortIoOut
@ -2444,8 +2423,7 @@ va (VaSet
isHidden 1
)
xt "0,0,16300,1200"
st "SIGNAL RaZ : std_ulogic
"
st "SIGNAL RaZ : std_ulogic"
)
)
*71 (Net
@ -2464,8 +2442,7 @@ va (VaSet
isHidden 1
)
xt "0,0,24700,1200"
st "SIGNAL Position : unsigned(15 DOWNTO 0)
"
st "SIGNAL Position : unsigned(15 DOWNTO 0)"
)
)
*72 (Net
@ -2484,8 +2461,7 @@ va (VaSet
isHidden 1
)
xt "0,0,23700,1200"
st "SIGNAL button : unsigned(3 DOWNTO 0)
"
st "SIGNAL button : unsigned(3 DOWNTO 0)"
)
)
*73 (Net
@ -2503,8 +2479,7 @@ va (VaSet
isHidden 1
)
xt "0,0,16700,1200"
st "SIGNAL unlock : std_ulogic
"
st "SIGNAL unlock : std_ulogic"
)
)
*74 (Net
@ -2522,8 +2497,7 @@ va (VaSet
isHidden 1
)
xt "0,0,16500,1200"
st "SIGNAL SideL : std_ulogic
"
st "SIGNAL SideL : std_ulogic"
)
)
*75 (Net
@ -2542,8 +2516,7 @@ va (VaSet
isHidden 1
)
xt "0,0,23800,1200"
st "SIGNAL Power : unsigned(7 DOWNTO 0)
"
st "SIGNAL Power : unsigned(7 DOWNTO 0)"
)
)
*76 (Net
@ -2561,8 +2534,7 @@ va (VaSet
isHidden 1
)
xt "0,0,15100,1200"
st "SIGNAL clk : unsigned
"
st "SIGNAL clk : unsigned"
)
)
*77 (Net
@ -2580,8 +2552,7 @@ va (VaSet
isHidden 1
)
xt "0,0,15000,1200"
st "SIGNAL rst : unsigned
"
st "SIGNAL rst : unsigned"
)
)
*78 (Wire
@ -4094,8 +4065,8 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "-8,-8,1722,1111"
viewArea "26645,-770,154315,83465"
windowSize "0,0,1537,960"
viewArea "26600,-800,154882,80736"
cachedDiagramExtent "-17000,-23800,171000,152000"
pageSetupInfo (PageSetupInfo
ptrCmd "\\\\ipp://ippsion.hevs.ch\\PREA309_HPLJ3005DN,winspool,"
@ -4122,7 +4093,7 @@ boundaryWidth 0
)
hasePageBreakOrigin 1
pageBreakOrigin "24000,-12000"
lastUid 12067,0
lastUid 12196,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -5548,7 +5519,7 @@ font "Tahoma,10,0"
)
emptyMRCItem *189 (MRCItem
litem &146
pos 27
pos 29
dimension 20
)
uid 5729,0

View File

@ -78,23 +78,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "appl"
@ -114,27 +114,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
)
(vvPair
variable "d_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
)
(vvPair
variable "date"
value "11.11.2019"
value "15.12.2021"
)
(vvPair
variable "day"
value "Mon"
value "mer."
)
(vvPair
variable "day_long"
value "Monday"
value "mercredi"
)
(vvPair
variable "dd"
value "11"
value "15"
)
(vvPair
variable "designName"
@ -162,11 +162,11 @@ value "struct"
)
(vvPair
variable "graphical_source_author"
value "silvan.zahno"
value "remi"
)
(vvPair
variable "graphical_source_date"
value "11.11.2019"
value "15.12.2021"
)
(vvPair
variable "graphical_source_group"
@ -174,11 +174,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "WE6996"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "08:13:23"
value "20:42:42"
)
(vvPair
variable "group"
@ -186,7 +186,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "WE6996"
value "MARVIN"
)
(vvPair
variable "language"
@ -206,7 +206,7 @@ value "$SCRATCH_DIR/Cursor_test/work"
)
(vvPair
variable "mm"
value "11"
value "12"
)
(vvPair
variable "module_name"
@ -214,19 +214,19 @@ value "cursor_tb"
)
(vvPair
variable "month"
value "Nov"
value "déc."
)
(vvPair
variable "month_long"
value "November"
value "décembre"
)
(vvPair
variable "p"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
)
(vvPair
variable "p_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
)
(vvPair
variable "package_name"
@ -302,7 +302,7 @@ value "struct"
)
(vvPair
variable "time"
value "08:13:23"
value "20:42:42"
)
(vvPair
variable "unit"
@ -310,7 +310,7 @@ value "cursor_tb"
)
(vvPair
variable "user"
value "silvan.zahno"
value "remi"
)
(vvPair
variable "version"
@ -322,11 +322,11 @@ value "struct"
)
(vvPair
variable "year"
value "2019"
value "2021"
)
(vvPair
variable "yy"
value "19"
value "21"
)
]
)
@ -2531,8 +2531,8 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "74,46,1330,909"
viewArea "-8608,17960,105743,94895"
windowSize "-8,-8,1544,928"
viewArea "-8600,18000,138511,107778"
cachedDiagramExtent "-7000,-1400,102000,93000"
pageSetupInfo (PageSetupInfo
ptrCmd "\\\\ipp://ipp.hevs.ch\\PREA309_HPLJP3005DN,winspool,"
@ -2559,7 +2559,7 @@ boundaryWidth 0
)
hasePageBreakOrigin 1
pageBreakOrigin "-7000,19000"
lastUid 4859,0
lastUid 4912,0
defaultCommentText (CommentText
shape (Rectangle
layer 0

View File

@ -1290,262 +1290,111 @@ exportedDirectories [
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
printerName "PR_FOLLOWME"
printerName "CX417de"
pageSizes [
(PageSizeInfo
name "12\" x 18\""
type 512
width 1106
height 1658
name "Lettre US (215,9 x 279,4 mm)"
width 783
height 1013
)
(PageSizeInfo
name "11\" x 17\""
type 17
width 1013
height 1566
)
(PageSizeInfo
name "Legal (8,5\" x 14\")"
name "Legal US"
type 5
width 783
height 1290
)
(PageSizeInfo
name "Letter (8,5\" x 11\")"
width 783
height 1013
)
(PageSizeInfo
name "Executive (7,25\"x10,5\")"
type 7
width 667
height 967
)
(PageSizeInfo
name "5,5\" x 8,5\""
name "Statement US"
type 6
width 506
height 783
)
(PageSizeInfo
name "A3 (297 x 420 mm)"
type 8
width 1077
height 1523
name "Exécutif US (18,42 x 26,67 cm)"
type 7
width 667
height 967
)
(PageSizeInfo
name "A4 (210 x 297 mm)"
name "A4"
type 9
width 761
height 1077
)
(PageSizeInfo
name "A5 (148 x 210 mm)"
name "A5"
type 11
width 538
width 536
height 761
)
(PageSizeInfo
name "A6 (105 x 148 mm)"
type 70
width 380
height 538
)
(PageSizeInfo
name "B4 JIS (257 x 364 mm)"
type 12
width 932
height 1320
)
(PageSizeInfo
name "B5 JIS (182 x 257 mm)"
name "B5 (JIS)"
type 13
width 660
height 932
)
(PageSizeInfo
name "B6 JIS (128 x 182 mm)"
type 88
width 464
height 660
)
(PageSizeInfo
name "8\" x 13\""
type 518
width 737
height 1198
)
(PageSizeInfo
name "8,25\" x 13\""
type 519
width 760
height 1198
)
(PageSizeInfo
name "8,5\" x 13\""
name "Folio US (215,9 x 330,2 mm)"
type 14
width 783
height 1198
)
(PageSizeInfo
name "Com10 Env.(4,125\"x9,5\")"
type 20
name "A6"
type 70
width 380
height 875
height 536
)
(PageSizeInfo
name "Env.Monar.(3,875\"x7,5\")"
type 37
width 357
name "Oficio(Mexico)(8,5 x 13,4 po.)"
type 119
width 783
height 1234
)
(PageSizeInfo
name "Universel"
type 120
width 783
height 1305
)
(PageSizeInfo
name "Env. 7 3/4 (3 7/8 x 7 1/2 po)"
type 121
width 356
height 691
)
(PageSizeInfo
name "Env. DL (110 x 220 mm)"
type 27
width 399
height 798
name "Env. 9 (3 7/8 x 8 7/8 po)"
type 122
width 356
height 817
)
(PageSizeInfo
name "Env. C6 (114 x 162 mm)"
type 31
width 413
height 587
name "Env. 10 (4 1/8 x 9 1/2 po)"
type 123
width 379
height 875
)
(PageSizeInfo
name "Env. C5 (162 x 229 mm)"
type 28
name "Enveloppe DL (110 x 220 mm)"
type 124
width 398
height 797
)
(PageSizeInfo
name "Enveloppe C5 (162 x 229 mm)"
type 125
width 587
height 830
)
(PageSizeInfo
name "8K (267 x 390 mm)"
type 520
width 968
height 1415
name "Enveloppe B5 (176 x 250 mm)"
type 126
width 638
height 907
)
(PageSizeInfo
name "16K (195 x 267 mm)"
type 521
width 707
height 968
)
(PageSizeInfo
name "100 x 148 mm"
type 43
width 362
height 536
)
(PageSizeInfo
name "148 x 200 mm"
type 82
width 536
height 725
)
(PageSizeInfo
name "JPN Env. #3(120 x 235 mm)"
type 73
width 435
height 852
)
(PageSizeInfo
name "JPN Env. #4(90 x 205 mm)"
type 74
width 326
height 743
)
(PageSizeInfo
name "Yoh Chou #3 E.(120x235mm)"
type 540
width 435
height 852
)
(PageSizeInfo
name "Yoh #4 Env. (105 x 235 mm)"
type 91
width 380
height 852
)
(PageSizeInfo
name "Kaku #2 Env. (240 x 332 mm)"
type 71
width 870
height 1204
)
(PageSizeInfo
name "SRA3 (320 x 450 mm)"
type 530
width 1161
height 1632
)
(PageSizeInfo
name "SRA4 (225 x 320 mm)"
type 531
width 816
height 1161
)
(PageSizeInfo
name "Format papier personnalisé"
type 256
width 783
height 1013
)
(PageSizeInfo
name "Format papier personnalisé1(210,0 x 297,0 mm)"
type 257
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé2(210,0 x 297,0 mm)"
type 258
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé3(210,0 x 297,0 mm)"
type 259
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé4(210,0 x 297,0 mm)"
type 260
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé5(210,0 x 297,0 mm)"
type 261
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé6(210,0 x 297,0 mm)"
type 262
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé7(210,0 x 297,0 mm)"
type 263
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé8(210,0 x 297,0 mm)"
type 264
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé9(210,0 x 297,0 mm)"
type 265
width 761
height 1077
)
(PageSizeInfo
name "Format papier personnalisé10(210,0 x 297,0 mm)"
type 266
width 761
height 1077
)