feat: added PicoW_Sensor code template

Credits to @ext-erich.styger that provided the template
This commit is contained in:
SylvanArnold
2025-04-22 11:30:45 +02:00
committed by Sylvan Arnold
parent b2e9eab44e
commit 6cd510e749
985 changed files with 606823 additions and 0 deletions

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __C11_CONFIG_H
#define __C11_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_C11_PIN)
#define C11_CONFIG_PIN_NUMBER BOARD_INITPINS_C11_PIN
#endif
#if defined(BOARD_INITPINS_C11_GPIO)
#define C11_CONFIG_GPIO_NAME BOARD_INITPINS_C11_GPIO
#endif
#if defined(BOARD_INITPINS_C11_PORT)
#define C11_CONFIG_PORT_NAME BOARD_INITPINS_C11_PORT
#endif
#endif
#ifndef C11_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define C11_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define C11_CONFIG_PORT_NAME 0
#else /* name from properties */
#define C11_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef C11_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define C11_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define C11_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define C11_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define C11_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define C11_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef C11_CONFIG_PIN_NUMBER
#define C11_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef C11_CONFIG_PIN_SYMBOL
#define C11_CONFIG_PIN_SYMBOL LED_RED
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef C11_CONFIG_INIT_PIN_VALUE
#define C11_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define C11_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define C11_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define C11_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef C11_CONFIG_INIT_PIN_DIRECTION
#define C11_CONFIG_INIT_PIN_DIRECTION C11_CONFIG_INIT_PIN_DIRECTION_OUTPUT
#endif
#ifndef C11_CONFIG_DO_PIN_MUXING
#define C11_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef C11_CONFIG_PULL_RESISTOR
#define C11_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __C11_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __C21_CONFIG_H
#define __C21_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_C21_PIN)
#define C21_CONFIG_PIN_NUMBER BOARD_INITPINS_C21_PIN
#endif
#if defined(BOARD_INITPINS_C21_GPIO)
#define C21_CONFIG_GPIO_NAME BOARD_INITPINS_C21_GPIO
#endif
#if defined(BOARD_INITPINS_C21_PORT)
#define C21_CONFIG_PORT_NAME BOARD_INITPINS_C21_PORT
#endif
#endif
#ifndef C21_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define C21_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define C21_CONFIG_PORT_NAME 0
#else /* name from properties */
#define C21_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef C21_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define C21_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define C21_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define C21_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define C21_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define C21_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef C21_CONFIG_PIN_NUMBER
#define C21_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef C21_CONFIG_PIN_SYMBOL
#define C21_CONFIG_PIN_SYMBOL LED_RED
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef C21_CONFIG_INIT_PIN_VALUE
#define C21_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define C21_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define C21_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define C21_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef C21_CONFIG_INIT_PIN_DIRECTION
#define C21_CONFIG_INIT_PIN_DIRECTION C21_CONFIG_INIT_PIN_DIRECTION_OUTPUT
#endif
#ifndef C21_CONFIG_DO_PIN_MUXING
#define C21_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef C21_CONFIG_PULL_RESISTOR
#define C21_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __C21_CONFIG_H */

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/**
* \file
* \brief Configuration header file for USB CDC
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the USB CDC module.
*/
#ifndef __CDC1_CONFIG_H
#define __CDC1_CONFIG_H
#ifndef CDC1_CONFIG_USE_TIMEOUT
#define CDC1_CONFIG_USE_TIMEOUT 1
/*!< 1: Use timeout; 0: do not use timeout */
#endif
#ifndef CDC1_CONFIG_APP_TASK_TIMEOUT_MS
#define CDC1_CONFIG_APP_TASK_TIMEOUT_MS 20
/*!< App Task timeout in milliseconds, 0 to disable timeout */
#endif
#endif /* __CDC1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __Clock1_CONFIG_H
#define __Clock1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_Clock1_PIN)
#define Clock1_CONFIG_PIN_NUMBER BOARD_INITPINS_Clock1_PIN
#endif
#if defined(BOARD_INITPINS_Clock1_GPIO)
#define Clock1_CONFIG_GPIO_NAME BOARD_INITPINS_Clock1_GPIO
#endif
#if defined(BOARD_INITPINS_Clock1_PORT)
#define Clock1_CONFIG_PORT_NAME BOARD_INITPINS_Clock1_PORT
#endif
#endif
#ifndef Clock1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define Clock1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define Clock1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define Clock1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef Clock1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define Clock1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define Clock1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define Clock1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define Clock1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define Clock1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef Clock1_CONFIG_PIN_NUMBER
#define Clock1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef Clock1_CONFIG_PIN_SYMBOL
#define Clock1_CONFIG_PIN_SYMBOL LED_RED
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef Clock1_CONFIG_INIT_PIN_VALUE
#define Clock1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define Clock1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define Clock1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define Clock1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef Clock1_CONFIG_INIT_PIN_DIRECTION
#define Clock1_CONFIG_INIT_PIN_DIRECTION Clock1_CONFIG_INIT_PIN_DIRECTION_OUTPUT
#endif
#ifndef Clock1_CONFIG_DO_PIN_MUXING
#define Clock1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef Clock1_CONFIG_PULL_RESISTOR
#define Clock1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __Clock1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __DQ1_CONFIG_H
#define __DQ1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_DQ1_PIN)
#define DQ1_CONFIG_PIN_NUMBER BOARD_INITPINS_DQ1_PIN
#endif
#if defined(BOARD_INITPINS_DQ1_GPIO)
#define DQ1_CONFIG_GPIO_NAME BOARD_INITPINS_DQ1_GPIO
#endif
#if defined(BOARD_INITPINS_DQ1_PORT)
#define DQ1_CONFIG_PORT_NAME BOARD_INITPINS_DQ1_PORT
#endif
#endif
#ifndef DQ1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define DQ1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define DQ1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define DQ1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef DQ1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define DQ1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define DQ1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define DQ1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define DQ1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define DQ1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef DQ1_CONFIG_PIN_NUMBER
#define DQ1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef DQ1_CONFIG_PIN_SYMBOL
#define DQ1_CONFIG_PIN_SYMBOL OneWireData
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef DQ1_CONFIG_INIT_PIN_VALUE
#define DQ1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define DQ1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define DQ1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define DQ1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef DQ1_CONFIG_INIT_PIN_DIRECTION
#define DQ1_CONFIG_INIT_PIN_DIRECTION DQ1_CONFIG_INIT_PIN_DIRECTION_INPUT
#endif
#ifndef DQ1_CONFIG_DO_PIN_MUXING
#define DQ1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef DQ1_CONFIG_PULL_RESISTOR
#define DQ1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __DQ1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __DbgRd1_CONFIG_H
#define __DbgRd1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_DbgRd1_PIN)
#define DbgRd1_CONFIG_PIN_NUMBER BOARD_INITPINS_DbgRd1_PIN
#endif
#if defined(BOARD_INITPINS_DbgRd1_GPIO)
#define DbgRd1_CONFIG_GPIO_NAME BOARD_INITPINS_DbgRd1_GPIO
#endif
#if defined(BOARD_INITPINS_DbgRd1_PORT)
#define DbgRd1_CONFIG_PORT_NAME BOARD_INITPINS_DbgRd1_PORT
#endif
#endif
#ifndef DbgRd1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define DbgRd1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define DbgRd1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define DbgRd1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef DbgRd1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define DbgRd1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define DbgRd1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define DbgRd1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define DbgRd1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define DbgRd1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef DbgRd1_CONFIG_PIN_NUMBER
#define DbgRd1_CONFIG_PIN_NUMBER 1u
/*!< number of pin, type unsigned integer */
#endif
#ifndef DbgRd1_CONFIG_PIN_SYMBOL
#define DbgRd1_CONFIG_PIN_SYMBOL OneWireDbgRead
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef DbgRd1_CONFIG_INIT_PIN_VALUE
#define DbgRd1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define DbgRd1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define DbgRd1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define DbgRd1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef DbgRd1_CONFIG_INIT_PIN_DIRECTION
#define DbgRd1_CONFIG_INIT_PIN_DIRECTION DbgRd1_CONFIG_INIT_PIN_DIRECTION_OUTPUT
#endif
#ifndef DbgRd1_CONFIG_DO_PIN_MUXING
#define DbgRd1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef DbgRd1_CONFIG_PULL_RESISTOR
#define DbgRd1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __DbgRd1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __Input1_CONFIG_H
#define __Input1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_Input1_PIN)
#define Input1_CONFIG_PIN_NUMBER BOARD_INITPINS_Input1_PIN
#endif
#if defined(BOARD_INITPINS_Input1_GPIO)
#define Input1_CONFIG_GPIO_NAME BOARD_INITPINS_Input1_GPIO
#endif
#if defined(BOARD_INITPINS_Input1_PORT)
#define Input1_CONFIG_PORT_NAME BOARD_INITPINS_Input1_PORT
#endif
#endif
#ifndef Input1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define Input1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define Input1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define Input1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef Input1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define Input1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define Input1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define Input1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define Input1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define Input1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef Input1_CONFIG_PIN_NUMBER
#define Input1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef Input1_CONFIG_PIN_SYMBOL
#define Input1_CONFIG_PIN_SYMBOL LED_RED
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef Input1_CONFIG_INIT_PIN_VALUE
#define Input1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define Input1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define Input1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define Input1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef Input1_CONFIG_INIT_PIN_DIRECTION
#define Input1_CONFIG_INIT_PIN_DIRECTION Input1_CONFIG_INIT_PIN_DIRECTION_INPUT
#endif
#ifndef Input1_CONFIG_DO_PIN_MUXING
#define Input1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef Input1_CONFIG_PULL_RESISTOR
#define Input1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __Input1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for RingBuffer.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Ring Buffer module.
*/
#ifndef __InputRB1_CONFIG_H
#define __InputRB1_CONFIG_H
#ifndef InputRB1_CONFIG_REENTRANT
#define InputRB1_CONFIG_REENTRANT 1 /* 1: reentrant implementation; 0: non-reentrant implementation */
#endif
#ifndef InputRB1_CONFIG_BUF_SIZE
#define InputRB1_CONFIG_BUF_SIZE 10 /* number of elements in the buffer */
#endif
#ifndef InputRB1_CONFIG_ELEM_SIZE
#define InputRB1_CONFIG_ELEM_SIZE 1 /* size of a single element in bytes */
#endif
#endif /* __InputRB1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for Kinetis Tools (or ARM in general)
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the ARM Tools module.
*/
#ifndef __McuArmTools_CONFIG_H
#define __McuArmTools_CONFIG_H
#if !defined(McuArmTools_CONFIG_PARSE_COMMAND_ENABLED)
#define McuArmTools_CONFIG_PARSE_COMMAND_ENABLED (1)
/*!< 1: shell support enabled, 0: otherwise */
#endif
#if McuLib_CONFIG_NXP_SDK_2_0_USED
/* will include system header file in the implementation file */
#elif McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_KINETIS_1_3
/* will include system header file in the implementation file */
#elif McuLib_CONFIG_CPU_IS_ARM_CORTEX_M
/* include here the low level CMSIS header files, e.g. with */
#if McuLib_CONFIG_CPU_IS_STM32
#include "stm32f3xx_hal.h" /* header file for STM32F303K8 */
#elif McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_NORDIC_NRF5
#include "nrf.h"
#endif
#endif
#ifndef McuArmTools_CONFIG_STACK_CHECK_PATTERN
#define McuArmTools_CONFIG_STACK_CHECK_PATTERN (0xdeadbeef)
/*!< Byte pattern on stack, to mark it is 'unused' */
#endif
/* The two symbols below shall be set by the linker script file to mark top and bottom of stack. Note that the two addresses need to be 32bit aligned! */
#ifndef McuArmTools_CONFIG_LINKER_SYMBOL_STACK_TOP
#define McuArmTools_CONFIG_LINKER_SYMBOL_STACK_TOP _vStackTop
#endif
#ifndef McuArmTools_CONFIG_LINKER_SYMBOL_STACK_BASE
#define McuArmTools_CONFIG_LINKER_SYMBOL_STACK_BASE _vStackBase
#endif
#endif /* __McuArmTools_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GenericBitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Generic Bit I/O module.
*/
#ifndef __McuBitIO_CONFIG_H
#define __McuBitIO_CONFIG_H
/* no configuration supported yet */
#endif /* __McuBitIO_CONFIG_H */

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/*!
* Copyright (c) 2019, Erich Styger
* All rights reserved.
*
* Configuration header file for McuButton
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuButton module.
*/
#ifndef MCUBUTTON_CONFIG_H_
#define MCUBUTTON_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "McuLibconfig.h"
#ifndef MCUBUTTON_CONFIG_USE_FREERTOS_HEAP
#define MCUBUTTON_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS Heap (default), 0: use stdlib malloc() and free() */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUBUTTON_CONFIG_H_ */

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/*!
* Copyright (c) 2024, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
*
* \brief Configuration header file for the McuCoverage module.
*/
#ifndef MCUCOVERAGECONFIG_H_
#define MCUCOVERAGECONFIG_H_
#ifndef McuCoverage_CONFIG_IS_ENABLED
#define McuCoverage_CONFIG_IS_ENABLED (0)
/*!< 1: Module is enabled; 0: Module is disabled, not adding anything to the application code */
#endif
#ifndef McuCoverage_CONFIG_USE_FREESTANDING
#define McuCoverage_CONFIG_USE_FREESTANDING (0 && McuCoverage_CONFIG_IS_ENABLED)
/*!< 1: Implementation using a freestanding environment; 0: No freestanding environment */
#endif
#endif /* MCUCOVERAGECONFIG_H_ */

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/**
* \file
* \brief Configuration header file for CriticalSection
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the CriticalSection module.
*/
#ifndef __McuCriticalSection_CONFIG_H
#define __McuCriticalSection_CONFIG_H
/* select ONE of the following implementation methods: */
#ifndef McuCriticalSection_CONFIG_USE_RTOS_CRITICAL_SECTION
#define McuCriticalSection_CONFIG_USE_RTOS_CRITICAL_SECTION 0 /* 1: use FreeRTOS critical section; 0: don't use FreeRTOS critical sections */
#endif
#ifndef McuCriticalSection_CONFIG_USE_CUSTOM_CRITICAL_SECTION
#define McuCriticalSection_CONFIG_USE_CUSTOM_CRITICAL_SECTION 1 /* 1: Custom implementation (supported for GNU and ARM!); 0: don't use custom implementation */
#endif
#ifndef McuCriticalSection_CONFIG_USE_PEX_DEFAULT
#define McuCriticalSection_CONFIG_USE_PEX_DEFAULT 0 /* 1: use Processor Expert default; 0: use alternative implementation */
#endif
#endif /* __McuCriticalSection_CONFIG_H */

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/**
* \file
* \brief Configuration header file for DS18B20
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the DS128B20 1-Wire temperature sensor.
*/
#ifndef __McuDS18B20_CONFIG_H
#define __McuDS18B20_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#define McuDS18B20_CONFIG_NUMBER_OF_SENSORS (1)
/*!< Number of devices (1-n) */
#define McuDS18B20_CONFIG_MULTIPLE_BUS_DEVICES (0)
/*!< 1: there are multiple devices on the bus, need to use ROM code to address them; 0: single device on the 1-Wire bus */
#ifndef McuDS18B20_CONFIG_READ_AUTO
#define McuDS18B20_CONFIG_READ_AUTO (1)
/*!< 1: automatic mode, temperature is read from sensor during StartConversion(). 0: Call ReadTemperature() after starting a conversion */
#endif
#if !defined(McuDS18B20_CONFIG_PARSE_COMMAND_ENABLED)
#define McuDS18B20_CONFIG_PARSE_COMMAND_ENABLED (1)
/*!< 1: shell support enabled, 0: otherwise */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* __McuDS18B20_CONFIG_H */

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/*!
* Copyright (c) 2019, Erich Styger
* All rights reserved.
*
* Configuration header file for McuDebounce
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuDebounce module.
*/
#ifndef MCUDEBOUNCE_CONFIG_H_
#define MCUDEBOUNCE_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
/* no configuration settings yet */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUDEBOUNCE_CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for 24AA_EEPROM
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings the External I2C EEPROM module.
*/
#ifndef __McuEE24_CONFIG_H
#define __McuEE24_CONFIG_H
/* actual device */
#ifndef McuEE24_CONFIG_DEVICE_ID
#define McuEE24_CONFIG_DEVICE_ID 8
/*!< Supported Device IDs: 8 (24AA08, 24LC08), 16 (24AA16, 24LC16), 32 (24AA32, 24LC32), 256 (24AA256, 24LC256, 24FC256), 512 (24AA512, 24LC512, 24FC256) or 1025 (24AA1025, 24LC1025, 24FC1025) */
#endif
#ifndef McuEE24_CONFIG_HAS_WP_PIN
#define McuEE24_CONFIG_HAS_WP_PIN (1)
/*!<< 1: Write Protect Pin available. 0: no Write Protect pin */
#endif
#ifndef McuEE24_CONFIG_DEVICE_I2C_ADDRESS_BITS
#define McuEE24_CONFIG_DEVICE_I2C_ADDRESS_BITS (0)
/* Address bits for I2C address, usually formed by the A0, A1 and A3 pins. Admissible range: 0..7 */
#endif
#ifndef McuEE24_CONFIG_BLOCK_BUF_SIZE
#define McuEE24_CONFIG_BLOCK_BUF_SIZE (32)
/*!< buffer used for block read/write. Max is 128. Keep it small to reduce stack consumption. */
#endif
#ifndef McuEE24_CONFIG_DO_ACKNOWLEDGE_POLLING
#define McuEE24_CONFIG_DO_ACKNOWLEDGE_POLLING (1)
/*!< 1: Perform acknowledge polling in the driver. 0: no acknowledge polling */
#endif
#ifndef McuEE24_CONFIG_PAGE_WRITE_TIME_MS
#define McuEE24_CONFIG_PAGE_WRITE_TIME_MS (5)
/*!< Page Write Time as per data sheet, used with McuEE24_CONFIG_DO_ACKNOWLEDGE_POLLING */
#endif
#ifndef McuEE24_CONFIG_ACK_POLLING_TIME_US
#define McuEE24_CONFIG_ACK_POLLING_TIME_US (100)
/*!< Acknowledge polling time in the I2C driver, used with McuEE24_CONFIG_DO_ACKNOWLEDGE_POLLING */
#endif
#ifndef McuEE24_CONFIG_USE_TIMEOUT
#define McuEE24_CONFIG_USE_TIMEOUT (1)
/*!< 1: use timeout, 0: do not use timeout */
#endif
#ifndef McuEE24_CONFIG_TIMEOUT_BYTE_MS
#define McuEE24_CONFIG_TIMEOUT_BYTE_MS (10)
/*!< number of milli seconds for timeout using byte write */
#endif
#ifndef McuEE24_CONFIG_TIMEOUT_BLOCK_MS
#define McuEE24_CONFIG_TIMEOUT_BLOCK_MS (60)
/*!< number of milliseconds for timeout using for block write */
#endif
#ifndef McuEE24_CONFIG_USE_SHELL
#define McuEE24_CONFIG_USE_SHELL (1)
/*!< 1: use shell, 0: do not use shell */
#endif
#ifndef McuEE24_CONFIG_USE_UTILITY
#define McuEE24_CONFIG_USE_UTILITY (1)
/*!< 1: use utility module, 0: do not use utility module */
#endif
#endif /* __McuEE24_CONFIG_H */

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/*!
* Copyright (c) 2021, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuESP32 module.
*/
#ifndef MCUESP32CONFIG_H_
#define MCUESP32CONFIG_H_
#ifndef McuESP32_CONFIG_USE_USB_CDC
#define McuESP32_CONFIG_USE_USB_CDC (0)
/*!< 1: using USB CDC gateway for programming; 0: do not use USB CDC */
#endif
#ifndef McuESP32_CONFIG_USE_CTRL_PINS
#define McuESP32_CONFIG_USE_CTRL_PINS (0)
/*!< 1: Using RST and BL signals to load software; 0: only using the UART */
#endif
#ifndef McuESP32_CONFIG_VERBOSE_CONTROL_SIGNALS
#define McuESP32_CONFIG_VERBOSE_CONTROL_SIGNALS (0 && McuESP32_CONFIG_USE_CTRL_PINS)
/* if status of control signals shall be printed on McuLog channel */
#endif
#if McuESP32_CONFIG_USE_CTRL_PINS
/* control signal pin definition */
#ifndef McuESP32_CONFIG_EN_GPIO
#define McuESP32_CONFIG_EN_GPIO GPIOA
#endif
#ifndef McuESP32_CONFIG_EN_PORT
#define McuESP32_CONFIG_EN_PORT PORTA
#endif
#ifndef McuESP32_CONFIG_EN_PIN
#define McuESP32_CONFIG_EN_PIN 12
#endif
#ifndef McuESP32_CONFIG_RST_GPIO
#define McuESP32_CONFIG_RST_GPIO GPIOA
#endif
#ifndef McuESP32_CONFIG_RST_PORT
#define McuESP32_CONFIG_RST_PORT PORTA
#endif
#ifndef McuESP32_CONFIG_RST_PIN
#define McuESP32_CONFIG_RST_PIN 5
#endif
#endif
#include "McuShellUartconfig.h"
/* UART used with ESP32: assign one of the McuShell UART to enable it */
#ifndef McuESP32_CONFIG_SHELL_UART
#define McuESP32_CONFIG_SHELL_UART McuShellUart_CONFIG_UART_NONE
#endif
/* UART connection to the ESP32 */
#if (McuESP32_CONFIG_SHELL_UART==McuShellUart_CONFIG_UART_K22FX512_UART1_E1_E0) \
|| (McuESP32_CONFIG_SHELL_UART==McuShellUart_CONFIG_UART_K22FN512_UART1_E1_E0)
#include "fsl_uart.h"
#define McuESP32_CONFIG_UART_DEVICE UART1
#define McuESP32_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuESP32_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuESP32_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuESP32_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuESP32_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuESP32_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuESP32_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuESP32_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuESP32_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable)
#define McuESP32_CONFIG_UART_IRQ_NUMBER UART1_RX_TX_IRQn
#define McuESP32_CONFIG_UART_INIT UART_Init
#define McuESP32_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_CoreSysClk
#define McuESP32_CONFIG_UART_IRQ_HANDLER UART1_RX_TX_IRQHandler
#define McuESP32_CONFIG_UART_BAUDRATE 115200
#endif
#endif /* MCUESP32CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for SimpleEvents
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SimpleEvents module.
*/
#ifndef __McuEvents_CONFIG_H
#define __McuEvents_CONFIG_H
#ifndef McuEvents_CONFIG_USE_EVENT_HANDLER
#define McuEvents_CONFIG_USE_EVENT_HANDLER (1)
/*!< 1: Use Event handler; 0: Do not use Event Handler */
#endif
#ifndef McuEvents_CONFIG_EVENT_HANDLER_NAME
#define McuEvents_CONFIG_EVENT_HANDLER_NAME McuEvents_AppHandleEvent
/*!< Name of event handler, of type 'void FunctionName(uint8_t event)' */
#endif
/*! List of events */
#define McuEvents_INIT /* Example event */ 0
#ifndef McuEvents_CONFIG_NOF_EVENTS
#define McuEvents_CONFIG_NOF_EVENTS 1
/*!< Number of events supported */
#endif
#endif /* __McuEvents_CONFIG_H */

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/**
* \file
* \brief Configuration header file for external I2C RTC devices
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings the External I2C RTC module.
*/
#ifndef __McuExtRTC_CONFIG_H
#define __McuExtRTC_CONFIG_H
#ifndef McuExtRTC_CONFIG_DEVICE
#define McuExtRTC_CONFIG_DEVICE 3232 /* DS1307, DS3231, DS3232 or DS1342 */
#endif
/* I2C address of the device on the bus: */
#ifndef McuExtRTC_CONFIG_DEVICE_ADDRESS
#if McuExtRTC_CONFIG_DEVICE==3231
#define McuExtRTC_CONFIG_DEVICE_ADDRESS 0x68 /* I2C DS3232 device address */
#elif McuExtRTC_CONFIG_DEVICE==3232
#define McuExtRTC_CONFIG_DEVICE_ADDRESS 0x68 /* I2C DS3232 device address */
#elif McuExtRTC_CONFIG_DEVICE==1307
#define McuExtRTC_CONFIG_DEVICE_ADDRESS 0x68 /* I2C DS1307 device address */
#elif McuExtRTC_CONFIG_DEVICE==1342
#define McuExtRTC_CONFIG_DEVICE_ADDRESS 0x68 /* I2C DS1342 device address */
#else
#error "Unknown device"
#endif
#endif
#endif /* __McuExtRTC_CONFIG_H */

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/**
* \file
* \brief Configuration header file for FXOS8700CQ accelerometer
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the FXOS8700CQ module.
*/
#ifndef __McuFXOS8700_CONFIG_H
#define __McuFXOS8700_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(McuFXOS8700_CONFIG_I2C_DEVICE_ADDRESS)
#define McuFXOS8700_CONFIG_I2C_DEVICE_ADDRESS (0x1E)
/*!< I2C 7bit device address */
/* SDA0 SDA1
0x1E low low
0x1D high low
0x1C low high
0x1F high high
*/
#endif
#if !defined(McuFXOS8700_CONFIG_TEMP_OFFSET)
#define McuFXOS8700_CONFIG_TEMP_OFFSET (24)
/*!< die temperature offset for real temperature calculation */
#endif
#if !defined(McuFXOS8700_CONFIG_PARSE_COMMAND_ENABLED)
#define McuFXOS8700_CONFIG_PARSE_COMMAND_ENABLED 1
/*!< 1: shell support enabled, 0: otherwise */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* __McuFXOS8700_CONFIG_H */

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/*!
* Copyright (c) 2021, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuFlash module.
*/
#ifndef MCUFLASHCONFIG_H_
#define MCUFLASHCONFIG_H_
#include "McuLib.h"
#ifndef McuFlash_CONFIG_IS_ENABLED
#define McuFlash_CONFIG_IS_ENABLED (0)
/*!< if the module MucFlash is enabled or not: 1: enabled; 0: disabled */
#endif
#ifndef McuFlash_CONFIG_LOGGING_TRACE
#define McuFlash_CONFIG_LOGGING_TRACE (0)
/*!< 1: extra trace logging: 0: no extra trace logging */
#endif
#ifndef McuFlash_CONFIG_FLASH_BLOCK_SIZE
#if McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC845
#define McuFlash_CONFIG_FLASH_BLOCK_SIZE (0x400)
#elif McuLib_CONFIG_CPU_IS_LPC55xx
#define McuFlash_CONFIG_FLASH_BLOCK_SIZE (0x200)
#elif McuLib_CONFIG_CPU_IS_KINETIS
#define McuFlash_CONFIG_FLASH_BLOCK_SIZE (0x800)
#elif McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_RP2040
#include "hardware/flash.h"
#define McuFlash_CONFIG_FLASH_BLOCK_SIZE (0x1000) /* size of block which can be erased, 4K on RP2040 */
#else /* default */
#define McuFlash_CONFIG_FLASH_BLOCK_SIZE (0x400)
#endif
/*!< size of a flash page, FLASH_GetProperty(&s_flashDriver, kFLASH_PropertyPflash0SectorSize, &pflashSectorSize) */
#endif
#endif /* MCUFLASHCONFIG_H_ */

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/**
* \file
* \brief Configuration header file for FontDisplay
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Font Display module.
*/
#ifndef __McuFontDisplay_CONFIG_H
#define __McuFontDisplay_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontDisplay_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GDisplay
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the GDisplay module.
*/
#ifndef __McuGDisplaySSD1306_CONFIG_H
#define __McuGDisplaySSD1306_CONFIG_H
#ifndef McuGDisplaySSD1306_CONFIG_DISPLAY_MODULE_NAME
#define McuGDisplaySSD1306_CONFIG_DISPLAY_MODULE_NAME McuSSD1306
/*!< Symbol name used for module */
#endif
#ifndef McuGDisplaySSD1306_CONFIG_DISPLAY_HEADER_FILE
#define McuGDisplaySSD1306_CONFIG_DISPLAY_HEADER_FILE "McuSSD1306.h"
/*!< Header file to be included as interface to the display */
#endif
#include McuGDisplaySSD1306_CONFIG_DISPLAY_HEADER_FILE /* include LCD interface */
#ifndef McuGDisplaySSD1306_CONFIG_USE_WINDOW_CAPABILITY
#define McuGDisplaySSD1306_CONFIG_USE_WINDOW_CAPABILITY (0)
/*!< 1: Use display window capability; 0: No display window capability */
#endif
#ifndef McuGDisplaySSD1306_CONFIG_USE_DOUBLE_BUFFER
#define McuGDisplaySSD1306_CONFIG_USE_DOUBLE_BUFFER (1)
/*!< 1: Use double-buffering for display memory in RAM; 0: No display double-buffering */
#endif
#if McuGDisplaySSD1306_CONFIG_USE_WINDOW_CAPABILITY
#define McuGDisplaySSD1306_CONFIG_FCT_NAME_OPENWINDOW McuSSD1306_OpenWindow
#define McuGDisplaySSD1306_CONFIG_FCT_NAME_WRITEPIXEL McuSSD1306_WritePixel
#define McuGDisplaySSD1306_CONFIG_FCT_NAME_CLOSEWINDOW McuSSD1306_CloseWindow
#else
#define McuGDisplaySSD1306_CONFIG_FCT_NAME_PUTPIXEL McuSSD1306_PutPixel
#endif
#if McuGDisplaySSD1306_CONFIG_USE_DOUBLE_BUFFER
#define McuGDisplaySSD1306_CONFIG_FCT_NAME_CLEAR_BUFFER McuSSD1306_ClearBuffer
#endif
#ifndef McuGDisplaySSD1306_CONFIG_USE_DISPLAY_MEMORY_WRITE
#define McuGDisplaySSD1306_CONFIG_USE_DISPLAY_MEMORY_WRITE (0)
/*!< 1: Use display memory write; 0: Do not use display memory write */
#endif
#ifndef McuGDisplaySSD1306_CONFIG_INVERTED_PIXEL_COLOR
#define McuGDisplaySSD1306_CONFIG_INVERTED_PIXEL_COLOR (0)
/*!< 1: Invert pixel color; 0: Do not invert pixel color */
#endif
#ifndef McuGDisplaySSD1306_CONFIG_NOF_BITS_PER_PIXEL
#define McuGDisplaySSD1306_CONFIG_NOF_BITS_PER_PIXEL (1)
/*!< Number of bits per pixel */
#endif
#ifndef McuGDisplaySSD1306_CONFIG_CLEAR_DISPLAY_IN_INIT
#define McuGDisplaySSD1306_CONFIG_CLEAR_DISPLAY_IN_INIT (0)
/*!< 1: clear display during Init(); 0: do not clear display. */
#endif
#ifndef McuGDisplaySSD1306_CONFIG_USE_DISPLAY_SHARING
#define McuGDisplaySSD1306_CONFIG_USE_DISPLAY_SHARING (0)
#define McuGDisplaySSD1306_CONFIG_USE_DISPLAY_SHARING_OnGet OnGetDisplay
#define McuGDisplaySSD1306_CONFIG_USE_DISPLAY_SHARING_OnGive OnGiveDisplay
/*!< 1: Share display and generate OnGetDisplay() and OnGiveDisplay() events. 0: do not share display */
#endif
/* prototypes */
extern void McuGDisplaySSD1306_CONFIG_USE_DISPLAY_SHARING_OnGet(void); /* called at the start of display critical section */
extern void McuGDisplaySSD1306_CONFIG_USE_DISPLAY_SHARING_OnGive(void); /* called at the end of the display critical section */
#ifndef McuGDisplaySSD1306_CONFIG_USE_MUTEX
#define McuGDisplaySSD1306_CONFIG_USE_MUTEX (0)
/*!< 1: use RTOS mutex for mutual access to display. 0: do not use mutex */
#endif
#endif /* __McuGDisplaySSD1306_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuGFont_CONFIG_H
#define __McuGFont_CONFIG_H
/* no configuration supported yet */
#endif /* __McuGFont_CONFIG_H */

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/*!
* Copyright (c) 2019, Erich Styger
* All rights reserved.
*
* \file
* \brief Configuration header file for McuGPIO
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MCUGPIO_CONFIG_H_
#define MCUGPIO_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "McuLibconfig.h"
#ifndef MCUGPIO_CONFIG_USE_FREERTOS_HEAP
#define MCUGPIO_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS Heap (default), 0: use stdlib malloc() and free() */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUGPIOCONFIG_H_ */

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/**
* \file
* \brief Configuration header file for GenericI2C
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Generic I2C module.
*/
#ifndef __McuGenericI2C_CONFIG_H
#define __McuGenericI2C_CONFIG_H
#include "McuLibconfig.h"
#if !defined(McuGenericI2C_CONFIG_USE_ON_REQUEST_BUS_EVENT)
#define McuGenericI2C_CONFIG_USE_ON_REQUEST_BUS_EVENT (0)
/*!< 1: generate user events for requesting bus; 0: no user events */
#define McuGenericI2C_CONFIG_ON_REQUEST_BUS_EVENT McuGenericI2C_OnRequestBus
void McuGenericI2C_CONFIG_ON_REQUEST_BUS_EVENT(void); /* prototype */
#endif
#if !defined(McuGenericI2C_CONFIG_USE_ON_RELEASE_BUS_EVENT)
#define McuGenericI2C_CONFIG_USE_ON_RELEASE_BUS_EVENT (0)
/*!< 1: generate user events for releasing bus; 0: no user events */
#define McuGenericI2C_CONFIG_ON_RELEASE_BUS_EVENT McuGenericI2C_OnReleaseBus
void McuGenericI2C_CONFIG_ON_RELEASE_BUS_EVENT(void); /* prototype */
#endif
#if !defined(McuGenericI2C_CONFIG_USE_ON_ERROR_EVENT)
#define McuGenericI2C_CONFIG_USE_ON_ERROR_EVENT (0)
/*!< 1: generate user events for errors; 0: no error events */
#define McuGenericI2C_CONFIG_ON_ERROR_EVENT McuGenericI2C_OnError
void McuGenericI2C_CONFIG_ON_ERROR_EVENT(void); /* prototype */
#endif
#if !defined(McuGenericI2C_CONFIG_USE_MUTEX)
#define McuGenericI2C_CONFIG_USE_MUTEX (0 && McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: Use a mutex to protect access to the bus; 0: no mutex used */
#endif
#if !defined(McuGenericI2C_CONFIG_USE_TIMEOUT)
#define McuGenericI2C_CONFIG_USE_TIMEOUT (0)
/*!< 1: Use a timeout in case problems; 0: do not use a timeout */
#endif
#if !defined(McuGenericI2C_CONFIG_TIMEOUT_US)
#define McuGenericI2C_CONFIG_TIMEOUT_US ((uint32_t)500) /* number of microseconds as specified in properties used for timeout */
#endif
#if !defined(McuGenericI2C_CONFIG_WRITE_BUFFER_SIZE)
#define McuGenericI2C_CONFIG_WRITE_BUFFER_SIZE (32)
/*!< Size of the write buffer size which defines the maximum block size which can be sent */
#endif
#if !defined(McuGenericI2C_CONFIG_SUPPORT_STOP_NO_START)
#define McuGenericI2C_CONFIG_SUPPORT_STOP_NO_START (0)
/*!< 1: send a STOP condition without sending a new START condition. Currently only supported for the GenericSWI2C component. 0: send a STOP for every START */
#endif
/* configuration of function names used for low level I2C functions */
#ifndef McuGenericI2C_CONFIG_INTERFACE_HEADER_FILE
#define McuGenericI2C_CONFIG_INTERFACE_HEADER_FILE "McuGenericSWI2C.h"
#endif
#include McuGenericI2C_CONFIG_INTERFACE_HEADER_FILE /* interface of low level I2C driver */
#ifndef McuGenericI2C_CONFIG_RECV_BLOCK
#define McuGenericI2C_CONFIG_RECV_BLOCK McuGenericSWI2C_RecvBlock
#endif
#ifndef McuGenericI2C_CONFIG_SEND_BLOCK
#define McuGenericI2C_CONFIG_SEND_BLOCK McuGenericSWI2C_SendBlock
#endif
#if McuGenericI2C_CONFIG_SUPPORT_STOP_NO_START
#ifndef McuGenericI2C_CONFIG_SEND_BLOCK_CONTINUE
#define McuGenericI2C_CONFIG_SEND_BLOCK_CONTINUE McuGenericSWI2C_SendBlockContinue
#endif
#endif
#ifndef McuGenericI2C_CONFIG_SEND_STOP
#define McuGenericI2C_CONFIG_SEND_STOP McuGenericSWI2C_SendStop
#endif
#ifndef McuGenericI2C_CONFIG_SELECT_SLAVE
#define McuGenericI2C_CONFIG_SELECT_SLAVE McuGenericSWI2C_SelectSlave
#endif
#ifndef McuGenericI2C_CONFIG_RECV_BLOCK_CUSTOM
#define McuGenericI2C_CONFIG_RECV_BLOCK_CUSTOM McuGenericSWI2C_RecvBlockCustom
#endif
#ifndef McuGenericI2C_CONFIG_RECV_BLOCK_CUSTOM_AVAILABLE
#define McuGenericI2C_CONFIG_RECV_BLOCK_CUSTOM_AVAILABLE (defined(McuGenericSWI2C_RECVBLOCKCUSTOM_AVAILABLE) && (McuGenericSWI2C_RECVBLOCKCUSTOM_AVAILABLE))
#endif
#endif /* __McuGenericI2C_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GenericSWI2C
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the software (bit-banging) I2C module.
*/
#ifndef __McuGenericSWI2C_CONFIG_H
#define __McuGenericSWI2C_CONFIG_H
#ifndef McuGenericSWI2C_CONFIG_TIMEOUT_COUNTER_VALUE
#define McuGenericSWI2C_CONFIG_TIMEOUT_COUNTER_VALUE (65535)
/*!< Timeout counter value waiting for a SDA or CLK line change. The higher the value, the longer the timeout */
#endif
#ifndef McuGenericSWI2C_CONFIG_DELAY_NS
#define McuGenericSWI2C_CONFIG_DELAY_NS (1250)
/*!< delay time in ns */
#endif
#ifndef McuGenericSWI2C_CONFIG_NOF_TRIALS
#define McuGenericSWI2C_CONFIG_NOF_TRIALS (256)
/*!< number of trials */
#endif
#ifndef McuGenericSWI2C_CONFIG_DO_YIELD
#define McuGenericSWI2C_CONFIG_DO_YIELD (0)
/*!< 1: if RTOS present, do a yield. 0: do not yield during waiting */
#endif
#endif /* __McuGenericSWI2C_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GenericSWSPI
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the software (bit-banging) SPI module.
*/
#ifndef __McuGenericSWSPI_CONFIG_H
#define __McuGenericSWSPI_CONFIG_H
#ifndef McuGenericSWSPI_CONFIG_CLOCK_POLARITY
#define McuGenericSWSPI_CONFIG_CLOCK_POLARITY 0
/*!< 0: clock is low if idle; 1: clock is high if idle */
#endif
#ifndef McuGenericSWSPI_CONFIG_CLOCK_EDGE
#define McuGenericSWSPI_CONFIG_CLOCK_EDGE 0
/*!< 0: data is shifted on falling clock edge; 1: data is shifted on rising clock edge */
#endif
#endif /* __McuGenericSWSPI_CONFIG_H */

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/**
* \file
* \brief Configuration header file for HardFault
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the HardFault module.
*/
#ifndef __McuHardFault_CONFIG_H
#define __McuHardFault_CONFIG_H
#include "McuLib.h" /* SDK and API used */
#define McuHardFault_CONFIG_SETTING_HAS_ACTLR (1 || (McuLib_CPU_IS_ARM_CORTEX_M && McuLib_CONFIG_CORTEX_M>=3))
/*!< 1: Cortex-M3, M4 have Auxiliary Control Register, ACTLR register */
#ifndef McuHardFault_CONFIG_SETTING_DISABLE_WRITE_BUFFER
#define McuHardFault_CONFIG_SETTING_DISABLE_WRITE_BUFFER (0 && McuHardFault_CONFIG_SETTING_HAS_ACTLR)
/*!< 1: disable write buffer in ACTLR register */
#endif
#ifndef McuHardFault_CONFIG_SETTING_SEMIHOSTING
#define McuHardFault_CONFIG_SETTING_SEMIHOSTING (1)
/*!< 1: do not stop in handler with semihosting and no debugger attached. 0: semihosting hardfault will stop target */
#endif
#endif /* __McuHardFault_CONFIG_H */

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/**
* \file
* \brief Configuration header file for I2CSpy.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the I2CSpy module.
*/
#ifndef __McuI2CSpy_CONFIG_H
#define __McuI2CSpy_CONFIG_H
#endif /* __McuI2CSpy_CONFIG_H */

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/*!
* Copyright (c) 2020-2022, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuI2cLib module.
*/
#ifndef I2CLIBCONFIG_H_
#define I2CLIBCONFIG_H_
#include "McuLib.h"
#ifndef McuLib_CONFIG_MCUI2CLIB_ENABLED
#define McuLib_CONFIG_MCUI2CLIB_ENABLED (0)
/*!< 1: enable module, 0: disable module */
#endif
#if McuLib_CONFIG_MCUI2CLIB_ENABLED
#define MCUI2CLIB_CONFIG_HW_TEMPLATE_NONE (0) /* default, initialization value */
#define MCUI2CLIB_CONFIG_HW_TEMPLATE_LPC55S69_I2C_FC1 (1) /* LPC55S69 with I2C bus on FC1 */
#define MCUI2CLIB_CONFIG_HW_TEMPLATE_LPC55S69_I2C_FC4 (2) /* LPC55S69 with I2C bus on FC4 */
/* other configurations are by CPU */
#ifndef MCUI2CLIB_CONFIG_HW_TEMPLATE_USED
#define MCUI2CLIB_CONFIG_HW_TEMPLATE_USED MCUI2CLIB_CONFIG_HW_TEMPLATE_NONE
#endif
#if McuLib_CONFIG_CPU_IS_LPC
#if McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC845 /* LPC845-BRK */
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIO
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT 0
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 10
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIO
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT 0
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 11
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C0
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_FREQ 12000000 /* using kI2C0_Clk_From_MainClk */
#ifndef MCUI2CLIB_CONFIG_MUX_I2C_PINS
#define MCUI2CLIB_CONFIG_MUX_I2C_PINS() \
CLOCK_EnableClock(kCLOCK_Swm); \
SWM_SetFixedPinSelect(SWM0, kSWM_I2C0_SDA, true); /* I2C0_SDA connect to P0_11 */ \
SWM_SetFixedPinSelect(SWM0, kSWM_I2C0_SCL, true); /* I2C0_SCL connect to P0_10 */ \
CLOCK_DisableClock(kCLOCK_Swm);
#endif
#ifndef MCUI2CLIB_CONFIG_CLOCK_SELECT
#define MCUI2CLIB_CONFIG_CLOCK_SELECT() CLOCK_Select(kI2C0_Clk_From_MainClk); /* Select the main clock as source clock of I2C0. */
#endif
#elif McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S16
/* using SCL/SDA on J18 connector
* SCL: FC1_RTS_SCL_SSEL1, MCU pin 72, PIO0_14
* SDA: FC1_CTS_SDA_SSEL0, MCU pin 71, PIO0_13
*/
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIO
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT 0
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 14u
#define MCUI2CLIB_CONFIG_SCL_IOCON_PIO_FUNC PIO0_14_FUNC_ALT1
#define MCUI2CLIB_CONFIG_SCL_IOCON_PIO_DIGIMODE PIO0_14_DIGIMODE_DIGITAL
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIO
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT 0
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 13u
#define MCUI2CLIB_CONFIG_SDA_IOCON_PIO_FUNC PIO0_13_FUNC_ALT1
#define MCUI2CLIB_CONFIG_SDA_IOCON_PIO_DIGIMODE PIO0_13_DIGIMODE_DIGITAL
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C1 /* matching the used FLEXCOM1 */
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_FREQ 12000000
#ifndef MCUI2CLIB_CONFIG_MUX_I2C_PINS
#define MCUI2CLIB_CONFIG_MUX_I2C_PINS() \
CLOCK_EnableClock(kCLOCK_Iocon); \
IOCON->PIO[MCUI2CLIB_CONFIG_SCL_GPIO_PORT][MCUI2CLIB_CONFIG_SCL_GPIO_PIN] = ((IOCON->PIO[MCUI2CLIB_CONFIG_SCL_GPIO_PORT][MCUI2CLIB_CONFIG_SCL_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) \
/* Selects pin function. */ \
| IOCON_PIO_FUNC(MCUI2CLIB_CONFIG_SCL_IOCON_PIO_FUNC) \
/* Select Digital mode. */ \
| IOCON_PIO_DIGIMODE(MCUI2CLIB_CONFIG_SCL_IOCON_PIO_DIGIMODE)); \
IOCON->PIO[MCUI2CLIB_CONFIG_SDA_GPIO_PORT][MCUI2CLIB_CONFIG_SDA_GPIO_PIN] = ((IOCON->PIO[MCUI2CLIB_CONFIG_SDA_GPIO_PORT][MCUI2CLIB_CONFIG_SDA_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) \
/* Selects pin function. */ \
| IOCON_PIO_FUNC(MCUI2CLIB_CONFIG_SDA_IOCON_PIO_FUNC) \
/* Select Digital mode. */ \
| IOCON_PIO_DIGIMODE(MCUI2CLIB_CONFIG_SDA_IOCON_PIO_DIGIMODE));
#endif
#ifndef MCUI2CLIB_CONFIG_CLOCK_SELECT
#define MCUI2CLIB_CONFIG_CLOCK_SELECT() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1); /* attach 12 MHz clock to FLEXCOMM1 (I2C master) */
#endif
#elif McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S69
#if MCUI2CLIB_CONFIG_HW_TEMPLATE_USED==MCUI2CLIB_CONFIG_HW_TEMPLATE_NONE
#error "please select hardware used"
#elif MCUI2CLIB_CONFIG_HW_TEMPLATE_USED==MCUI2CLIB_CONFIG_HW_TEMPLATE_LPC55S69_I2C_FC1
/* using SCL/SDA on the Arduino header
* SDA: FC1_I2C_SDA, MCU pin 71, PIO0_13
* SCL: FC1_I2C_SCL, MCU pin 72, PIO0_14
*/
/* following values are copied from pin_mux.h */
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define MCUI2CLIB_PIO0_13_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 1. */
#define MCUI2CLIB_PIO0_13_FUNC_ALT1 0x01u
/*!
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
#define MCUI2CLIB_PIO0_14_DIGIMODE_DIGITAL 0x01u
/*!
* @brief Selects pin function.: Alternative connection 1. */
#define MCUI2CLIB_PIO0_14_FUNC_ALT1 0x01u
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIO
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT 0
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 14u
#define MCUI2CLIB_CONFIG_SCL_IOCON_PIO_FUNC MCUI2CLIB_PIO0_14_FUNC_ALT1
#define MCUI2CLIB_CONFIG_SCL_IOCON_PIO_DIGIMODE MCUI2CLIB_PIO0_14_DIGIMODE_DIGITAL
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIO
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT 0
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 13u
#define MCUI2CLIB_CONFIG_SDA_IOCON_PIO_FUNC MCUI2CLIB_PIO0_13_FUNC_ALT1
#define MCUI2CLIB_CONFIG_SDA_IOCON_PIO_DIGIMODE MCUI2CLIB_PIO0_13_DIGIMODE_DIGITAL
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C1 /* matching the used FLEXCOM1 */
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_FREQ 12000000
#ifndef MCUI2CLIB_CONFIG_MUX_I2C_PINS
#define MCUI2CLIB_CONFIG_MUX_I2C_PINS() \
CLOCK_EnableClock(kCLOCK_Iocon); \
IOCON->PIO[MCUI2CLIB_CONFIG_SCL_GPIO_PORT][MCUI2CLIB_CONFIG_SCL_GPIO_PIN] = ((IOCON->PIO[MCUI2CLIB_CONFIG_SCL_GPIO_PORT][MCUI2CLIB_CONFIG_SCL_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) \
/* Selects pin function. */ \
| IOCON_PIO_FUNC(MCUI2CLIB_CONFIG_SCL_IOCON_PIO_FUNC) \
/* Select Digital mode. */ \
| IOCON_PIO_DIGIMODE(MCUI2CLIB_CONFIG_SCL_IOCON_PIO_DIGIMODE)); \
IOCON->PIO[MCUI2CLIB_CONFIG_SDA_GPIO_PORT][MCUI2CLIB_CONFIG_SDA_GPIO_PIN] = ((IOCON->PIO[MCUI2CLIB_CONFIG_SDA_GPIO_PORT][MCUI2CLIB_CONFIG_SDA_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) \
/* Selects pin function. */ \
| IOCON_PIO_FUNC(MCUI2CLIB_CONFIG_SDA_IOCON_PIO_FUNC) \
/* Select Digital mode. */ \
| IOCON_PIO_DIGIMODE(MCUI2CLIB_CONFIG_SDA_IOCON_PIO_DIGIMODE));
#endif
#ifndef MCUI2CLIB_CONFIG_CLOCK_SELECT
#define MCUI2CLIB_CONFIG_CLOCK_SELECT() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1); /* attach 12 MHz clock to FLEXCOMM1 (I2C master) */
#endif
#elif MCUI2CLIB_CONFIG_HW_TEMPLATE_USED==MCUI2CLIB_CONFIG_HW_TEMPLATE_LPC55S69_I2C_FC4
/* using SCL/SDA on the Mikro Bus connector
* SDA: FC4_I2C_SDA_ARD, MCU pin 30, PIO1_21
* SCL: FC4_I2C_SCL_ARD, MCU pin 4, PIO1_20
*/
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIO
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT 1
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 20u
#define MCUI2CLIB_CONFIG_SCL_IOCON_PIO_FUNC PIO1_20_FUNC_ALT5
#define MCUI2CLIB_CONFIG_SCL_IOCON_PIO_DIGIMODE PIO1_20_DIGIMODE_DIGITAL
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIO
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT 1
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 21u
#define MCUI2CLIB_CONFIG_SDA_IOCON_PIO_FUNC PIO1_21_FUNC_ALT5
#define MCUI2CLIB_CONFIG_SDA_IOCON_PIO_DIGIMODE PIO1_21_DIGIMODE_DIGITAL
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C4 /* matching the used FLEXCOM4 */
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_FREQ 12000000
#ifndef MCUI2CLIB_CONFIG_MUX_I2C_PINS
#define MCUI2CLIB_CONFIG_MUX_I2C_PINS() \
CLOCK_EnableClock(kCLOCK_Iocon); \
IOCON->PIO[MCUI2CLIB_CONFIG_SCL_GPIO_PORT][MCUI2CLIB_CONFIG_SCL_GPIO_PIN] = ((IOCON->PIO[MCUI2CLIB_CONFIG_SCL_GPIO_PORT][MCUI2CLIB_CONFIG_SCL_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) \
/* Selects pin function. */ \
| IOCON_PIO_FUNC(MCUI2CLIB_CONFIG_SCL_IOCON_PIO_FUNC) \
/* Select Digital mode. */ \
| IOCON_PIO_DIGIMODE(MCUI2CLIB_CONFIG_SCL_IOCON_PIO_DIGIMODE)); \
IOCON->PIO[MCUI2CLIB_CONFIG_SDA_GPIO_PORT][MCUI2CLIB_CONFIG_SDA_GPIO_PIN] = ((IOCON->PIO[MCUI2CLIB_CONFIG_SDA_GPIO_PORT][MCUI2CLIB_CONFIG_SDA_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK))) \
/* Selects pin function. */ \
| IOCON_PIO_FUNC(MCUI2CLIB_CONFIG_SDA_IOCON_PIO_FUNC) \
/* Select Digital mode. */ \
| IOCON_PIO_DIGIMODE(MCUI2CLIB_CONFIG_SDA_IOCON_PIO_DIGIMODE));
#endif
#ifndef MCUI2CLIB_CONFIG_CLOCK_SELECT
#define MCUI2CLIB_CONFIG_CLOCK_SELECT() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4); /* attach 12 MHz clock to FLEXCOMM4 (I2C master) */
#endif
#endif /* MCUI2CLIB_CONFIG_HW_TEMPLATE_USED */
#endif /* LPC variants */
#elif McuLib_CONFIG_CPU_IS_RPxxxx
#ifndef MCUI2CLIB_CONFIG_I2C_DEVICE
#define MCUI2CLIB_CONFIG_I2C_DEVICE i2c0
#endif
#ifndef MCUI2CLIB_CONFIG_SDA_GPIO_PIN
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 16u
#endif
#ifndef MCUI2CLIB_CONFIG_SCL_GPIO_PIN
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 17u
#endif
#ifndef MCUI2CLIB_CONFIG_TIMEOUT_BYTE_US
#define MCUI2CLIB_CONFIG_TIMEOUT_BYTE_US (10000)
#endif
#elif McuLib_CONFIG_CPU_IS_ESP32
#ifndef MCUI2CLIB_CONFIG_I2C_DEVICE
#define MCUI2CLIB_CONFIG_I2C_DEVICE I2C_NUM_0
#endif
#ifndef MCUI2CLIB_CONFIG_SDA_GPIO_PIN
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 18u
#endif
#ifndef MCUI2CLIB_CONFIG_SCL_GPIO_PIN
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 19u
#endif
#ifndef MCUI2CLIB_CONFIG_TIMEOUT_BYTE_US
#define MCUI2CLIB_CONFIG_TIMEOUT_BYTE_US (10000)
#endif
#ifndef MCUI2CLIB_I2C_MASTER_TX_BUF_DISABLE
#define MCUI2CLIB_I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master doesn't need buffer */
#endif
#ifndef MCUI2CLIB_I2C_MASTER_RX_BUF_DISABLE
#define MCUI2CLIB_I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master doesn't need buffer */
#endif
#ifndef MCUI2CLIB_I2C_MASTER_TIMEOUT_MS
#define MCUI2CLIB_I2C_MASTER_TIMEOUT_MS 1000
#endif
#elif McuLib_CONFIG_CPU_IS_KINETIS /* K22FN512 and K22FX512 */
/* set of predefined pin configurations for Kinetis devices: only one can be active! */
#ifndef MCUI2CLIB_CONFIG_USE_PORTB_B0_B1
#define MCUI2CLIB_CONFIG_USE_PORTB_B0_B1 (0)
/*!< 1: using SCL PTB0, SDA PTB1 */
#endif
#ifndef MCUI2CLIB_CONFIG_USE_PORTB_B2_B3
#define MCUI2CLIB_CONFIG_USE_PORTB_B2_B3 (0)
/*!< 1: using SCL PTB2, SDA PTB3 */
#endif
#ifndef MCUI2CLIB_CONFIG_USE_PORTD_D2_D3
#define MCUI2CLIB_CONFIG_USE_PORTD_D2_D3 (0)
/*!< 1: SCL PTD2, SDA PTD3 */
#endif
#ifndef MCUI2CLIB_CONFIG_USE_PORTE_E0_E1
#define MCUI2CLIB_CONFIG_USE_PORTE_E0_E1 (0)
/*!< 1: SDA PTE0, SCL PTE1 */
#endif
#if MCUI2CLIB_CONFIG_USE_PORTE_E0_E1
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIOE
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT PORTE
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 1u
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIOE
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT PORTE
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 0u
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C1
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_SRC I2C1_CLK_SRC
#define MCUI2CLIB_CONFIG_SCL_GPIO_MUXING kPORT_MuxAlt6
#define MCUI2CLIB_CONFIG_SDA_GPIO_MUXING kPORT_MuxAlt6
#elif MCUI2CLIB_CONFIG_USE_PORTD_D2_D3
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIOD
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT PORTD
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 2u
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIOD
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT PORTD
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 3u
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C0
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_SRC I2C0_CLK_SRC
#define MCUI2CLIB_CONFIG_SCL_GPIO_MUXING kPORT_MuxAlt7
#define MCUI2CLIB_CONFIG_SDA_GPIO_MUXING kPORT_MuxAlt7
#elif MCUI2CLIB_CONFIG_USE_PORTB_B0_B1
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIOB
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT PORTB
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 0u
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIOB
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT PORTB
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 1u
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C0
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_SRC I2C0_CLK_SRC
#define MCUI2CLIB_CONFIG_SCL_GPIO_MUXING kPORT_MuxAlt2
#define MCUI2CLIB_CONFIG_SDA_GPIO_MUXING kPORT_MuxAlt2
#elif MCUI2CLIB_CONFIG_USE_PORTB_B2_B3
#define MCUI2CLIB_CONFIG_SCL_GPIO GPIOB
#define MCUI2CLIB_CONFIG_SCL_GPIO_PORT PORTB
#define MCUI2CLIB_CONFIG_SCL_GPIO_PIN 2u
#define MCUI2CLIB_CONFIG_SDA_GPIO GPIOB
#define MCUI2CLIB_CONFIG_SDA_GPIO_PORT PORTB
#define MCUI2CLIB_CONFIG_SDA_GPIO_PIN 3u
#define MCUI2CLIB_CONFIG_I2C_MASTER_BASEADDR I2C0
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_SRC I2C0_CLK_SRC
#define MCUI2CLIB_CONFIG_SCL_GPIO_MUXING kPORT_MuxAlt2
#define MCUI2CLIB_CONFIG_SDA_GPIO_MUXING kPORT_MuxAlt2
#endif
#define MCUI2CLIB_CONFIG_I2C_MASTER_CLK_FREQ CLOCK_GetFreq(MCUI2CLIB_CONFIG_I2C_MASTER_CLK_SRC)
#ifndef MCUI2CLIB_CONFIG_MUX_I2C_PINS
#define MCUI2CLIB_CONFIG_MUX_I2C_PINS() \
/* clock enable has to be done outside (e.g. in Pins tool or in platform.c) */ \
/* I2C SCL Pin */ \
PORT_SetPinMux(MCUI2CLIB_CONFIG_SCL_GPIO_PORT, MCUI2CLIB_CONFIG_SCL_GPIO_PIN, MCUI2CLIB_CONFIG_SCL_GPIO_MUXING); \
MCUI2CLIB_CONFIG_SCL_GPIO_PORT->PCR[MCUI2CLIB_CONFIG_SCL_GPIO_PIN] = ((MCUI2CLIB_CONFIG_SCL_GPIO_PORT->PCR[MCUI2CLIB_CONFIG_SCL_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(PORT_PCR_PE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_ISF_MASK))) \
/* Pull Enable: Internal pullup or pulldown resistor is enabled on the corresponding pin. */ \
| (uint32_t)(PORT_PCR_PE_MASK) \
/* Open Drain Enable: Open drain output is enabled on the corresponding pin, if the pin is \
* configured as a digital output. */ \
| PORT_PCR_ODE(kPORT_OpenDrainEnable)); \
/* I2C SDA Pin */ \
PORT_SetPinMux(MCUI2CLIB_CONFIG_SDA_GPIO_PORT, MCUI2CLIB_CONFIG_SDA_GPIO_PIN, MCUI2CLIB_CONFIG_SDA_GPIO_MUXING); \
MCUI2CLIB_CONFIG_SDA_GPIO_PORT->PCR[MCUI2CLIB_CONFIG_SDA_GPIO_PIN] = ((MCUI2CLIB_CONFIG_SDA_GPIO_PORT->PCR[MCUI2CLIB_CONFIG_SDA_GPIO_PIN] & \
/* Mask bits to zero which are setting */ \
(~(PORT_PCR_PE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_ISF_MASK))) \
/* Pull Enable: Internal pullup or pulldown resistor is enabled on the corresponding pin. */ \
| (uint32_t)(PORT_PCR_PE_MASK) \
/* Open Drain Enable: Open drain output is enabled on the corresponding pin, if the pin is \
* configured as a digital output. */ \
| PORT_PCR_ODE(kPORT_OpenDrainEnable));
#endif
#ifndef MCUI2CLIB_CONFIG_CLOCK_SELECT
#define MCUI2CLIB_CONFIG_CLOCK_SELECT() /* NOTE: needs to be done in clocks tool or outside in the platform code */
#endif
#endif /* which CPU used */
#ifndef MCUI2CLIB_CONFIG_I2C_RELEASE_BUS
#define MCUI2CLIB_CONFIG_I2C_RELEASE_BUS (1 && !McuLib_CONFIG_CPU_IS_ESP32)
/*!< if I2C Bus release shall be implemented and done at bus initialization. Not yet implemented for ESP32 */
#endif
#ifndef MCUI2CLIB_CONFIG_I2C_BAUDRATE
#define MCUI2CLIB_CONFIG_I2C_BAUDRATE 400000U /* the desired I2C SCL clock frequency */
#endif
#ifndef MCUI2CLIB_CONFIG_ADD_DELAY
#define MCUI2CLIB_CONFIG_ADD_DELAY (1) /* needed for FXOS sensor? As well for RTC: otherwise the address is not on the bus? */
#endif
#ifndef MCUI2CLIB_CONFIG_ADD_DELAY_US
#define MCUI2CLIB_CONFIG_ADD_DELAY_US (10) /* added delay in microseconds */
#endif
#endif /* McuLib_CONFIG_MCUI2CLIB_ENABLED */
#endif /* I2CLIBCONFIG_H_ */

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/*
* Copyright (c) 2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef McuINA260_CONFIG_H_
#define McuINA260_CONFIG_H_
#ifndef McuINA260_CONFIG_PARSE_COMMAND_ENABLED
#define McuINA260_CONFIG_PARSE_COMMAND_ENABLED (1)
/*!< If shell parser is enabled (1) or not (0). */
#endif
#ifndef McuINA260_CONFIG_I2C_ADDRESS
#define McuINA260_CONFIG_I2C_ADDRESS (0x40)
/*! I2C address of the sensor, default 0x40 */
#endif
#endif /* McuINA260_CONFIG_H_ */

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/*!
* Copyright (c) 2024, Erich Styger
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration header file for the McuIO module.
*/
#ifndef __MCU_IO_CONFIG_H__
#define __MCU_IO_CONFIG_H__
#ifdef __cplusplus
extern "C" {
#endif
#ifndef MCUIO_CONFIG_USE_FREERTOS_HEAP
#define MCUIO_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS heap for memory allocation (default); 0: using normal malloc() and free() */
#endif
#ifndef MCUIO_CONFIG_USE_FREERTOS_QUEUE
#define MCUIO_CONFIG_USE_FREERTOS_QUEUE (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS queue for buffer management allocation (default); 0: using bare-metal ring buffer */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* __MCU_IO_CONFIG_H__ */

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/*!
* Copyright (c) 2019, Erich Styger
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration header file for the LC709203 battery gauge I2C sensor.
*/
#ifndef SOURCES_MCULC709203FCONFIG_H_
#define SOURCES_MCULC709203FCONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef MCULC709203F_CONFIG_USE_THERMISTOR
#define MCULC709203F_CONFIG_USE_THERMISTOR (0)
/*!< 1: using Thermistor in battery. 0: using I2C mode */
#endif
#ifndef MCULC_CONFIG_BLOCK_ON_I2C_ERROR
#define MCULC_CONFIG_BLOCK_ON_I2C_ERROR (1)
/*!< if it should block on error and wait for the watchdog */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* SOURCES_MCULC709203FCONFIG_H_ */

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/*!
* Copyright (c) 2019, Erich Styger
* All rights reserved.
* \file
* \brief Configuration header file for McuLED.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MCULED_CONFIG_H_
#define MCULED_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "McuLibconfig.h"
#ifndef MCULED_CONFIG_USE_FREERTOS_HEAP
#define MCULED_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS Heap (default), 0: use stdlib malloc() and free() */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCULEDCONFIG_H_ */

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/*!
* \file
* \brief Configuration header file for McuLibConfig.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the McuLibConfig module.
*/
#ifndef __McuLib_CONFIG_H
#define __McuLib_CONFIG_H
/* identification of CPU/core used. __CORTEX_M is defined in CMSIS-Core.
Otherwise CPU Family is set automatically by Processor Expert: detected: Kinetis (supported: "Kinetis", "S32K", "HCS08")
*/
#if defined(__CORTEX_M)
#define McuLib_CPU_IS_ARM_CORTEX_M (1)
#else
#define McuLib_CPU_IS_ARM_CORTEX_M (0)
#endif
#ifndef McuLib_CONFIG_CPU_IS_ARM_CORTEX_M
#define McuLib_CONFIG_CPU_IS_ARM_CORTEX_M (1 || McuLib_CPU_IS_ARM_CORTEX_M)
/*!< 1: ARM Cortex-M family, 0 otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_S32K
#define McuLib_CONFIG_CPU_IS_S32K (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: NXP S32K CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_LPC
#define McuLib_CONFIG_CPU_IS_LPC (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: NXP LPC CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_LPC55xx
#define McuLib_CONFIG_CPU_IS_LP55Cxx (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M && McuLib_CONFIG_CPU_IS_LPC)
/*!< 1: NXP LPC55xx CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_MCXA
#define McuLib_CONFIG_CPU_IS_MCXA (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: NXP MCXA CPU family (Cortex M33 without FPU and DSP instructions), 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_MCXC
#define McuLib_CONFIG_CPU_IS_MCXC (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: NXP MCXC CPU family (Cortex M33), 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_MCXN
#define McuLib_CONFIG_CPU_IS_MCXN (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: NXP MCXN CPU family (Dual-Core Cortex M33 with FPU and DSP instructions), 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_MCX
#define McuLib_CONFIG_CPU_IS_MCX (1 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M && (McuLib_CONFIG_CPU_IS_MCXA || McuLib_CONFIG_CPU_IS_MCXC || McuLib_CONFIG_CPU_IS_MCXN))
/*!< 1: NXP MCX CPU family (Cortex M33 for A, N, W and L, Cortex M0+ on C), 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_STM32
#define McuLib_CONFIG_CPU_IS_STM32 (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: STM32 ARM Cortex CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_IMXRT
#define McuLib_CONFIG_CPU_IS_IMXRT (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: NXP i.Mx RT CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_NORDIC_NRF
#define McuLib_CONFIG_CPU_IS_NORDIC_NRF (0 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: Nordic nRF, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_HCS08
#define McuLib_CONFIG_CPU_IS_HCS08 (0 && !McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: HCS08 CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_RISC_V
#define McuLib_CONFIG_CPU_IS_RISC_V (0 && !McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/*!< 1: RISC-V CPU family, 0: otherwise */
#endif
#ifndef McuLib_CONFIG_CPU_IS_RISC_V_RV32M1_RI5CY
#define McuLib_CONFIG_CPU_IS_RISC_V_RV32M1_RI5CY (1 && McuLib_CONFIG_CPU_IS_RISC_V)
/*!< 1: VEGA Board: RISC-V RV32M1 RI5CY, 0: other core */
#endif
#if !defined(McuLib_CONFIG_CPU_IS_ESP32) && !defined(McuLib_CONFIG_CPU_IS_IMXRT) /* i.MX could check on __XTENSA__ in fsl_common.h */
#ifndef __XTENSA__
#define __XTENSA__ 0
#endif
#define McuLib_CONFIG_CPU_IS_ESP32 (__XTENSA__)
/*!< 1: ESP32 CPU family, 0: otherwise. The ESP32 compiler defines __XTENSA__ with a value of 1 */
#endif
#ifndef McuLib_CONFIG_CPU_IS_RPxxxx
#define McuLib_CONFIG_CPU_IS_RPxxxx (0) /* Raspberry Pi RP, e.g. RP2040 */
#endif
#ifndef McuLib_CONFIG_CPU_IS_KINETIS
#define McuLib_CONFIG_CPU_IS_KINETIS (1 && McuLib_CONFIG_CPU_IS_ARM_CORTEX_M \
&& !(McuLib_CONFIG_CPU_IS_LPC) \
&& !(McuLib_CONFIG_CPU_IS_LPC55xx) \
&& !(McuLib_CONFIG_CPU_IS_IMXRT) \
&& !(McuLib_CONFIG_CPU_IS_STM32) \
&& !(McuLib_CONFIG_CPU_IS_NORDIC_NRF) \
&& !(McuLib_CONFIG_CPU_IS_S32K))
/*!< 1: NXP Kinetis CPU family, 0: otherwise */
#endif
/* define to identify the CPU variant better */
#define McuLib_CONFIG_CPU_VARIANT_DEFAULT (0)
#define McuLib_CONFIG_CPU_VARIANT_NXP_K02FN (1)
#define McuLib_CONFIG_CPU_VARIANT_NXP_K22FN (2)
#define McuLib_CONFIG_CPU_VARIANT_NXP_K22FX (3)
#define McuLib_CONFIG_CPU_VARIANT_NXP_KE02 (4)
#define McuLib_CONFIG_CPU_VARIANT_NXP_LPC804 (5)
#define McuLib_CONFIG_CPU_VARIANT_NXP_LPC845 (6)
#define McuLib_CONFIG_CPU_VARIANT_NXP_LPC54608 (7)
#define McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S16 (8)
#define McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S69 (9)
#define McuLib_CONFIG_CPU_VARIANT_NXP_IMXRT1064 (10)
#define McuLib_CONFIG_CPU_VARIANT_RP2040 (11)
#define McuLib_CONFIG_CPU_VARIANT_NXP_K64FN (12)
#ifndef McuLib_CONFIG_CPU_VARIANT
#define McuLib_CONFIG_CPU_VARIANT McuLib_CONFIG_CPU_VARIANT_DEFAULT
#endif
#if McuLib_CONFIG_CPU_IS_LPC && McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_DEFAULT
#error "Please specify the LPC CPU variant used"
#endif
#ifndef McuLib_CONFIG_IS_KINETIS_KE
#define McuLib_CONFIG_IS_KINETIS_KE (McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_KE02)
#endif
/* identification of Cortex-M core. __FPU_USED can be defined in CMSIS-Core */
#ifndef McuLib_CONFIG_CORTEX_M
#define McuLib_CONFIG_CORTEX_M (4)
/*!< 0: Cortex-M0, 3: M3, 4: M4, 7: M7, 33: M33, -1 otherwise */
#endif
#if (1 && !defined(McuLib_CONFIG_FPU_PRESENT) && McuLib_CONFIG_CORTEX_M!=0) || (defined(__FPU_PRESENT) && (__FPU_PRESENT==1)) /* __FPU_PRESENT can be defined in CMSIS-Core */
#define McuLib_CONFIG_FPU_PRESENT (1)
#else
#define McuLib_CONFIG_FPU_PRESENT (0)
#endif
/*!< 1: floating point unit present, 0: otherwise */
#if (1 && !defined(McuLib_CONFIG_FPU_USED) && McuLib_CONFIG_CORTEX_M!=0) || (defined(__FPU_USED) && (__FPU_USED==1)) /* __FPU_USED can be defined in CMSIS-Core */
#define McuLib_CONFIG_FPU_USED (1)
#else
#define McuLib_CONFIG_FPU_USED (0)
#endif
/*!< 1: using floating point unit, 0: otherwise */
/* macro for little and big endianess. ARM is little endian */
#define McuLib_CONFIG_CPU_IS_LITTLE_ENDIAN (McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/* Identifiers used to identify the SDK */
#define McuLib_CONFIG_SDK_GENERIC (0)
/*!< using a generic API/SDK */
#define McuLib_CONFIG_SDK_PROCESSOR_EXPERT (1)
/*!< using Processor Expert SDK */
#define McuLib_CONFIG_SDK_KINETIS_1_3 (2)
/*!< using NXP Kinetis SDK V1.3 */
#define McuLib_CONFIG_SDK_KINETIS_2_0 (3)
/*!< using NXP Kinetis SDK V2.0 */
#define McuLib_CONFIG_SDK_MCUXPRESSO_2_0 (4)
/*!< using NXP MCUXpresso SDK V2.x, same as Kinetis SDK v2.0 */
#define McuLib_CONFIG_SDK_S32K (5)
/*!< SDK for S32K */
#define McuLib_CONFIG_SDK_NORDIC_NRF5 (6)
/*!< Nordic nRF5 SDK */
#define McuLib_CONFIG_SDK_RPI_PICO (7)
/*!< Raspberry Pi Pico SDK */
#define McuLib_CONFIG_SDK_LINUX (8)
/*!< Linux SDK, e.g. Raspberry Pi */
#ifndef McuLib_CONFIG_SDK_VERSION_MAJOR
#define McuLib_CONFIG_SDK_VERSION_MAJOR (2)
/*!< SDK major version number */
#endif
#ifndef McuLib_CONFIG_SDK_VERSION_MINOR
#define McuLib_CONFIG_SDK_VERSION_MINOR (5)
/*!< SDK minor version number */
#endif
#ifndef McuLib_CONFIG_SDK_VERSION_BUILD
#define McuLib_CONFIG_SDK_VERSION_BUILD (0)
/*!< SDK build version number */
#endif
#ifndef McuLib_CONFIG_SDK_VERSION
#define McuLib_CONFIG_SDK_VERSION (McuLib_CONFIG_SDK_VERSION_MAJOR*100)+(McuLib_CONFIG_SDK_VERSION_MINOR*10)+McuLib_CONFIG_SDK_VERSION_BUILD
/*!< Builds a single number with the SDK version (major, minor, build), e.g. 250 for 2.5.0 */
#endif
/* specify the SDK and API used */
#ifndef McuLib_CONFIG_SDK_VERSION_USED
#if McuLib_CONFIG_CPU_IS_ESP32
#define McuLib_CONFIG_SDK_VERSION_USED McuLib_CONFIG_SDK_GENERIC
/*!< identify the version of SDK/API used. For ESP32 we are using a generic SDK (actually the IDF one) */
#elif McuLib_CONFIG_CPU_IS_STM32
#define McuLib_CONFIG_SDK_VERSION_USED McuLib_CONFIG_SDK_GENERIC
/*!< identify the version of SDK/API used. For STM32 we are using a generic SDK (actually the CubeMX one) */
#else
#define McuLib_CONFIG_SDK_VERSION_USED McuLib_CONFIG_SDK_PROCESSOR_EXPERT
/*!< identify the version of SDK/API used */
#endif
#endif
/* ***************** Middleware Configuration *******************/
/* Configuration macro if FreeRTOS is used */
#ifndef McuLib_CONFIG_SDK_USE_FREERTOS
#define McuLib_CONFIG_SDK_USE_FREERTOS (1)
/*!< 1: Use FreeRTOS; 0: no FreeRTOS used */
#endif
/* FatFS */
#ifndef McuLib_CONFIG_SDK_USE_FAT_FS
#define McuLib_CONFIG_SDK_USE_FAT_FS (0)
/*!< 1: Use FatFS; 0: no FatFS used */
#endif
/* ***************************************************************/
/* special macro to identify a set of SDKs used */
#define McuLib_CONFIG_NXP_SDK_USED ( (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_KINETIS_1_3) \
|| (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_KINETIS_2_0) \
|| (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_MCUXPRESSO_2_0) \
|| (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_S32K) \
)
/*!< Using one of the Freescale/NXP SDKs */
#define McuLib_CONFIG_NXP_SDK_2_0_USED ( (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_KINETIS_2_0) \
|| (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_MCUXPRESSO_2_0) \
)
/*!< Using Freescale/NXP SDK V2.0 */
#define McuLib_CONFIG_PEX_SDK_USED (McuLib_CONFIG_SDK_VERSION_USED==McuLib_CONFIG_SDK_PROCESSOR_EXPERT)
/*!< Using Processor Expert API */
/* Compiler identification: */
#define McuLib_CONFIG_COMPILER_GNU (0)
#define McuLib_CONFIG_COMPILER_IAR (1)
#define McuLib_CONFIG_COMPILER_KEIL (2)
#define McuLib_CONFIG_COMPILER_HIWARE (3)
#define McuLib_CONFIG_COMPILER_METROWERKS (4)
#ifndef McuLib_CONFIG_COMPILER
#if defined(__GNUC__)
#define McuLib_CONFIG_COMPILER McuLib_CONFIG_COMPILER_GNU
#elif defined(__HIWARE__)
#define McuLib_CONFIG_COMPILER McuLib_CONFIG_COMPILER_HIWARE
#elif defined(__IAR_SYSTEMS_ICC__)
#define McuLib_CONFIG_COMPILER McuLib_CONFIG_COMPILER_IAR
#elif defined(__CC_ARM)
#define McuLib_CONFIG_COMPILER McuLib_CONFIG_COMPILER_KEIL
#elif defined(__MWERKS__)
#define McuLib_CONFIG_COMPILER McuLib_CONFIG_COMPILER_METROWERKS
#else
#warning "a compiler needs to be defined!"
#endif
#endif
#endif /* __McuLib_CONFIG_H */

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/*!
* Copyright (c) 2020, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration header file for the McuLog module.
*/
#ifndef MCULOGCONFIG_H_
#define MCULOGCONFIG_H_
#include "McuLib.h"
#ifndef McuLog_CONFIG_IS_ENABLED
#define McuLog_CONFIG_IS_ENABLED (1)
/*!< 1: Logging is enabled; 0: Logging is disabled, not adding anything to the application code */
#endif
#ifndef McuLog_CONFIG_DEFAULT_LEVEL
#define McuLog_CONFIG_DEFAULT_LEVEL (McuLog_TRACE)
/*!< one of McuLog_Levels_e */
#endif
#ifndef McuLog_CONFIG_USE_MUTEX
#define McuLog_CONFIG_USE_MUTEX (1 && McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use a RTOS mutex for the logging module; 0: do not use a mutex */
#endif
#ifndef McuLog_CONFIG_USE_COLOR
#define McuLog_CONFIG_USE_COLOR (1)
/*!< 1: use use ANSI color for terminal, 0: do not use color */
#endif
#ifndef McuLog_CONFIG_USE_PRINTF_STYLE
#define McuLog_CONFIG_USE_PRINTF_STYLE (1)
/*!< 1: use printf open argument list for printing */
#endif
#ifndef McuLog_CONFIG_USE_FILE
#define McuLog_CONFIG_USE_FILE (0)
/*!< 1: use use file for logging, 0: do not use file */
#endif
#ifndef McuLog_CONFIG_NOF_CONSOLE_LOGGER
#define McuLog_CONFIG_NOF_CONSOLE_LOGGER (1)
/*!< Number of console loggers */
#endif
#ifndef McuLog_CONFIG_LOG_TIMESTAMP_DATE
#define McuLog_CONFIG_LOG_TIMESTAMP_DATE (1)
/*!< 1: add date to time stamp, 0: do not date for time stamp */
#endif
#ifndef McuLog_CONFIG_LOG_TIMESTAMP_TIME
#define McuLog_CONFIG_LOG_TIMESTAMP_TIME (1)
/*!< 1: add time to time stamp, 0: do not time for time stamp */
#endif
#ifndef McuLog_CONFIG_LOG_STRIP_FILENAME_PATH
#define McuLog_CONFIG_LOG_STRIP_FILENAME_PATH (1)
/*!< 1: strip path from file name, 0: keep file name untouched */
#endif
#ifndef McuLog_CONFIG_USE_RTT_CONSOLE
#define McuLog_CONFIG_USE_RTT_CONSOLE (0)
/*!< 1: use SEGGER RTT console output, 0: do not use SEGGER RTT */
#endif
#ifndef McuLog_CONFIG_USE_RTT_DATA_LOGGER
#define McuLog_CONFIG_USE_RTT_DATA_LOGGER (0)
/*!< 1: use SEGGER RTT Logger (Channel 1), 0: do not use SEGGER RTT Logger */
#endif
#ifndef McuLog_CONFIG_RTT_DATA_LOGGER_BUFFER_SIZE
#define McuLog_CONFIG_RTT_DATA_LOGGER_BUFFER_SIZE (256)
/*!< Buffer size in bytes for the RTT data logger channel */
#endif
#ifndef McuLog_CONFIG_RTT_DATA_LOGGER_CHANNEL_MODE
#define McuLog_CONFIG_RTT_DATA_LOGGER_CHANNEL_MODE (SEGGER_RTT_MODE_NO_BLOCK_SKIP)
/*!< RTT channel mode to be used */
#endif
#ifndef McuLog_CONFIG_PARSE_COMMAND_ENABLED
#define McuLog_CONFIG_PARSE_COMMAND_ENABLED (1 && McuLog_CONFIG_IS_ENABLED)
/*! < 1: shell command line parser enabled; 0: not enabled */
#endif
#endif /* MCULOGCONFIG_H_ */

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/**
* \file
* \brief Configuration header file for 1-Wire.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the 1-Wire module.
*/
#ifndef __McuOneWire_CONFIG_H
#define __McuOneWire_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
/* protocol timing in micro seconds */
/* write */
#define McuOneWire_CONFIG_A_WRITE_1_LOW_TIME 6 /* A: standard 6 us, low time to write one bit */
#define McuOneWire_CONFIG_B_WRITE_1_HIGH_TIME 64 /* B: standard 64 us, high time after writing one bit (A) */
#define McuOneWire_CONFIG_C_WRITE_0_LOW_TIME 60 /* C: standard 60 us, Low time writing zero bit */
#define McuOneWire_CONFIG_D_WRITE_0_HIGH_TIME 10 /* D: standard 10 us, High time after writing zero bit (C) */
/* read */
#define McuOneWire_CONFIG_A_READ_LOW_TIME 6 /* Low time to start read */
#define McuOneWire_CONFIG_E_BEFORE_READ_DELAY_TIME 3 /* E: standard 9 us, wait time after starting read (when to read bit) */
#define McuOneWire_CONFIG_F_AFTER_READ_DELAY_TIME 55 /* F: standard 55 us, wait time after reading bit (E) */
/* reset */
#define McuOneWire_CONFIG_H_RESET_TIME 480 /* H: standard 480 us, reset low time */
#define McuOneWire_CONFIG_I_RESET_RESPONSE_TIME 70 /* I: standard 70 us, wait time after reset low time (H) until read response */
#define McuOneWire_CONFIG_J_RESET_WAIT_TIME 410 /* J: standard 410 us, wait time after reading presence (I) */
#define McuOneWire_CONFIG_SLOT_TIME 100
#define McuOneWire_CONFIG_DEBUG_READ_PIN_ENABLED (1)
/*!< 1: Toggle extra GPIO pin during 1-wire read access; 0: no debug */
#if McuOneWire_CONFIG_DEBUG_READ_PIN_ENABLED
#include "DbgRd1.h" /* SDK and API used */
#define McuOneWire_CONFIG_DEBUG_READ_PIN_INIT DbgRd1_Init()
#define McuOneWire_CONFIG_DEBUG_READ_PIN_DEINIT DbgRd1_Deinit()
#define McuOneWire_CONFIG_DEBUG_READ_PIN_TOGGLE DbgRd1_NegVal()
#endif
#ifndef McuOneWire_CONFIG_WRITE_PIN
#define McuOneWire_CONFIG_WRITE_PIN (0)
/*!< 1: using dedicated write pin; 0: using single pin for read/write */
#endif
#if McuOneWire_CONFIG_WRITE_PIN
#include "WritePin.h"
#define McuOneWire_CONFIG_WRITE_PIN_INIT WritePin_Init()
#define McuOneWire_CONFIG_WRITE_PIN_DEINIT WritePin_Deinit()
#define McuOneWire_CONFIG_WRITE_PIN_LOW WritePin_ClrVal()
#define McuOneWire_CONFIG_WRITE_PIN_HIGH WritePin_SetVal()
#define McuOneWire_CONFIG_WRITE_PIN_SET_OUTPUT WritePin_SetOutput()
#endif
#if !defined(McuOneWire_CONFIG_PARSE_COMMAND_ENABLED)
#define McuOneWire_CONFIG_PARSE_COMMAND_ENABLED (1)
/*!< 1: shell support enabled, 0: otherwise */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* __McuOneWire_CONFIG_H */

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/*!
* Copyright (c) 2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration header file for the PCF85063A realtime clock.
*/
#ifndef MCUPCF85063A_CONFIG_H_
#define MCUPCF85063A_CONFIG_H_
#endif /* MCUPCF85063A_CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for a PID component with floats.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the PID_Float module.
*/
#ifndef __McuPidFloat_CONFIG_H
#define __McuPidFloat_CONFIG_H
/* no configuration supported yet */
#endif /* __McuPidFloat_CONFIG_H */

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/**
* \file
* \brief Configuration header file for PID_Int component.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the PID for integer module.
*/
#ifndef __McuPidInt_CONFIG_H
#define __McuPidInt_CONFIG_H
/* no configuration supported yet */
#endif /* __McuPidInt_CONFIG_H */

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/**
* \file
* \brief Configuration header file for QuadCounter component.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the quadrature counter module.
*/
#ifndef __McuQuadCounter_CONFIG_H
#define __McuQuadCounter_CONFIG_H
#ifndef McuQuadCounter_CONFIG_USE_ERROR_CORRECTION
#define McuQuadCounter_CONFIG_USE_ERROR_CORRECTION (0)
/*!< 1: Use error correction, 0: not using error correction */
#endif
#ifndef McuQuadCounter_CONFIG_COUNT_ERRORS
#define McuQuadCounter_CONFIG_COUNT_ERRORS (1)
/*!< 1: count errors, 0: do not count errors */
#endif
#endif /* __McuQuadCounter_CONFIG_H */

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/**
* \file
* \brief Configuration header file for a RingBuffer.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the ring buffer module.
*/
#ifndef MCURBCONFIG_H_
#define MCURBCONFIG_H_
#include "McuLibconfig.h"
#ifndef MCURB_CONFIG_USE_FREERTOS_HEAP
#define MCURB_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS Heap (default), 0: use stdlib malloc() and free() */
#endif
#endif /* MCURBCONFIG_H_ */

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/**
* \file
* \brief Configuration header file for FreeRTOS component.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the FreeRTOS module.
*/
#ifndef __McuRTOS_CONFIG_H
#define __McuRTOS_CONFIG_H
#include "McuLib.h" /* SDK and API used */
/* -------------------------------------------------------------------- */
/* Macros to identify the compiler used: */
#define configCOMPILER_ARM_GCC 1 /* GNU ARM gcc compiler */
#define configCOMPILER_ARM_IAR 2 /* IAR ARM compiler */
#define configCOMPILER_ARM_FSL 3 /* Legacy Freescale ARM compiler */
#define configCOMPILER_ARM_KEIL 4 /* ARM/Keil compiler */
#define configCOMPILER_S08_FSL 5 /* Freescale HCS08 compiler */
#define configCOMPILER_S12_FSL 6 /* Freescale HCS12(X) compiler */
#define configCOMPILER_CF1_FSL 7 /* Freescale ColdFire V1 compiler */
#define configCOMPILER_CF2_FSL 8 /* Freescale ColdFire V2 compiler */
#define configCOMPILER_DSC_FSL 9 /* Freescale DSC compiler */
#define configCOMPILER configCOMPILER_ARM_GCC
/* -------------------------------------------------------------------- */
/* CPU family identification */
#define configCPU_FAMILY_S08 1 /* S08 core */
#define configCPU_FAMILY_S12 2 /* S12(X) core */
#define configCPU_FAMILY_CF1 3 /* ColdFire V1 core */
#define configCPU_FAMILY_CF2 4 /* ColdFire V2 core */
#define configCPU_FAMILY_DSC 5 /* 56800/DSC */
#define configCPU_FAMILY_ARM_M0P 6 /* ARM Cortex-M0+ */
#define configCPU_FAMILY_ARM_M3 7 /* ARM Cortex-M3 */
#define configCPU_FAMILY_ARM_M4 8 /* ARM Cortex-M4 */
#define configCPU_FAMILY_ARM_M4F 9 /* ARM Cortex-M4F (with floating point unit) */
#define configCPU_FAMILY_ARM_M7 10 /* ARM Cortex-M7 */
#define configCPU_FAMILY_ARM_M7F 11 /* ARM Cortex-M7F (with floating point unit) */
#define configCPU_FAMILY_ARM_M33 12 /* ARM Cortex-M33 */
#define configCPU_FAMILY_ARM_M33F 13 /* ARM Cortex-M33F (with floating point unit) */
#define configCPU_FAMILY_RISC_V 14 /* RISC-V */
/* Macros to identify set of core families */
#define configCPU_FAMILY_IS_ARM_M0(fam) ((fam)==configCPU_FAMILY_ARM_M0P)
#define configCPU_FAMILY_IS_ARM_M3(fam) ((fam)==configCPU_FAMILY_ARM_M3)
#define configCPU_FAMILY_IS_ARM_M4(fam) (((fam)==configCPU_FAMILY_ARM_M4) || ((fam)==configCPU_FAMILY_ARM_M4F))
#define configCPU_FAMILY_IS_ARM_M7(fam) (((fam)==configCPU_FAMILY_ARM_M7) || ((fam)==configCPU_FAMILY_ARM_M7F))
#define configCPU_FAMILY_IS_ARM_M4_M7(fam) (configCPU_FAMILY_IS_ARM_M4(fam) || configCPU_FAMILY_IS_ARM_M7(fam))
#define configCPU_FAMILY_IS_ARM_M33(fam) (((fam)==configCPU_FAMILY_ARM_M33) || ((fam)==configCPU_FAMILY_ARM_M33F))
#define configCPU_FAMILY_IS_ARM_FPU(fam) (((fam)==configCPU_FAMILY_ARM_M4F) || ((fam)==configCPU_FAMILY_ARM_M7F) || ((fam)==configCPU_FAMILY_ARM_M33F))
#define configCPU_FAMILY_IS_ARM(fam) (configCPU_FAMILY_IS_ARM_M0(fam) || configCPU_FAMILY_IS_ARM_M4(fam) || configCPU_FAMILY_IS_ARM_M7(fam) || configCPU_FAMILY_IS_ARM_M33(fam))
#if McuLib_CONFIG_CPU_IS_ARM_CORTEX_M
/* determine core based on library configuration */
#if McuLib_CONFIG_CORTEX_M==0
#define configCPU_FAMILY configCPU_FAMILY_ARM_M0P
#elif McuLib_CONFIG_CORTEX_M==3
#define configCPU_FAMILY configCPU_FAMILY_ARM_M3
#elif McuLib_CONFIG_CORTEX_M==4 && McuLib_CONFIG_FPU_PRESENT
#define configCPU_FAMILY configCPU_FAMILY_ARM_M4F
#elif McuLib_CONFIG_CORTEX_M==4
#define configCPU_FAMILY configCPU_FAMILY_ARM_M4
#elif McuLib_CONFIG_CORTEX_M==7 && McuLib_CONFIG_FPU_PRESENT
#define configCPU_FAMILY configCPU_FAMILY_ARM_M7F
#elif McuLib_CONFIG_CORTEX_M==7
#define configCPU_FAMILY configCPU_FAMILY_ARM_M7
#elif McuLib_CONFIG_CORTEX_M==33 && McuLib_CONFIG_FPU_PRESENT
#define configCPU_FAMILY configCPU_FAMILY_ARM_M33F
#elif McuLib_CONFIG_CORTEX_M==33
#define configCPU_FAMILY configCPU_FAMILY_ARM_M33
#else
#error "unsupported configuaration!"
#endif
#elif McuLib_CONFIG_CPU_IS_RISC_V
#define configCPU_FAMILY configCPU_FAMILY_RISC_V
#else /* default CPU family */
#define configCPU_FAMILY configCPU_FAMILY_ARM_M4F
#endif
#ifndef configENABLE_MPU
#define configENABLE_MPU (0 && (configCPU_FAMILY_IS_ARM_M4(configCPU_FAMILY)||configCPU_FAMILY_IS_ARM_M33(configCPU_FAMILY)))
/*!< 1: enable MPU support; 0: MPU support is disabled */
#endif
#ifndef configENABLE_FPU
#define configENABLE_FPU (1 && McuLib_CONFIG_FPU_PRESENT)
/*!< 1: enable FPU support; 0: FPU support is disabled */
#endif
#ifndef configENABLE_TRUSTZONE
#define configENABLE_TRUSTZONE (0 && configCPU_FAMILY_IS_ARM_M33(configCPU_FAMILY))
/*!< 1: enable ARM TrustZone support; 0: TrustZone support is disabled */
#endif
/*-----------------------------------------------------------
* GDB backtrace handler support
* See http://interactive.freertos.org/entries/23468301-Tasks-backtrace-switcher-viewer-snippet-for-debugger-gcc-gdb-ARM-Cortex-M3-MPU-port-Eclipse-support-
*----------------------------------------------------------*/
#ifndef configGDB_HELPER
#define configGDB_HELPER (0 && configCPU_FAMILY_IS_ARM(configCPU_FAMILY) && (configCOMPILER==configCOMPILER_ARM_GCC))
/*!< 1: enable special GDB stack backtrace debug helper; 0: disabled */
#endif
#ifndef configLTO_HELPER
#define configLTO_HELPER (1 && configCPU_FAMILY_IS_ARM(configCPU_FAMILY) && (configCOMPILER==configCOMPILER_ARM_GCC))
/*!< 1: enable special GNU Link Time Optimizer (-lto) debug helper code; 0: disabled */
#endif
#ifndef configHEAP_SCHEME_IDENTIFICATION
#define configHEAP_SCHEME_IDENTIFICATION (1 && configCPU_FAMILY_IS_ARM(configCPU_FAMILY))
/*!< 1: use constant freeRTOSMemoryScheme to identify memory scheme; 0: no constant used */
#endif
#ifndef configUSE_TOP_USED_PRIORITY
#define configUSE_TOP_USED_PRIORITY (1 && configCPU_FAMILY_IS_ARM(configCPU_FAMILY))
/*!< 1: Makes sure uxTopUsedPriority is present (needed for SEGGER and OpenOCD thread aware debugging); 0: no special reference to uxTopUsedPriority */
#endif
#ifndef configLINKER_HEAP_BASE_SYMBOL
#if McuLib_CONFIG_NXP_SDK_USED
#define configLINKER_HEAP_BASE_SYMBOL _pvHeapStart
#else
#define configLINKER_HEAP_BASE_SYMBOL __HeapBase
#endif
/*!< Linker symbol used to denote the base address of the heap, used for heap memory scheme 6 (newlib). (KDS: __HeapBase, MCUXpresso: _pvHeapStart) */
#endif
#ifndef configLINKER_HEAP_LIMIT_SYMBOL
#if McuLib_CONFIG_NXP_SDK_USED
#define configLINKER_HEAP_LIMIT_SYMBOL _pvHeapLimit
#else
#define configLINKER_HEAP_LIMIT_SYMBOL __HeapLimit
#endif
/*!< Linker symbol used to denote the limit address of the heap, used for heap memory scheme 6 (newlib). (KDS: __HeapLimit, MCUXpresso: _pvHeapLimit) */
#endif
#ifndef configLINKER_HEAP_SIZE_SYMBOL
#if McuLib_CONFIG_NXP_SDK_USED
#define configLINKER_HEAP_SIZE_SYMBOL _HeapSize
#else
#define configLINKER_HEAP_SIZE_SYMBOL __heap_size
#endif
/*!< Linker symbol used to denote the size of the heap, used for heap memory scheme 6 (newlib). (KDS: __heap_size, MCUXpresso: _HeapSize) */
#endif
#ifndef configUSE_SHELL
#define configUSE_SHELL (1)
/*!< 1: enable Shell and command line support; 0: disabled */
#endif
#ifndef configRESET_MSP
#define configRESET_MSP (1)
/*!< 1: reset MSP at scheduler start (Cortex M3/M4/M7 only); 0: do not reset MSP */
#endif
/*-----------------------------------------------------------
* FreeRTOS Trace hook support
*----------------------------------------------------------- */
#ifndef configUSE_PERCEPIO_TRACE_HOOKS
#define configUSE_PERCEPIO_TRACE_HOOKS 0 /* 1: Percepio Trace hooks, 0: not using Percepio Trace hooks */
#endif
#define configUSE_TRACE_HOOKS configUSE_PERCEPIO_TRACE_HOOKS /* legacy configUSE_TRACE_HOOKS should not be used any more */
#ifndef configUSE_SEGGER_SYSTEM_VIEWER_HOOKS
#define configUSE_SEGGER_SYSTEM_VIEWER_HOOKS 0 /* 1: Segger System Viewer hooks, 0: not using Segger System Viewer hooks */
#endif
#ifndef configUSE_SEGGER_SYSTEM_VIEWER_HEAP_EVENTS
#define configUSE_SEGGER_SYSTEM_VIEWER_HEAP_EVENTS (1 && configUSE_SEGGER_SYSTEM_VIEWER_HOOKS)
/*!< 1: Generate heap events for Segger SystemView, 0: not generate heap events */
#endif
#if configUSE_SEGGER_SYSTEM_VIEWER_HOOKS && configUSE_PERCEPIO_TRACE_HOOKS
#error "only one trace method can be active!"
#endif
/*----------------------------------------------------------- */
#endif /* __McuRTOS_CONFIG_H */

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/**
* \file
* \brief Configuration header file for Segger RTT.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Segger RTT Module.
*/
#ifndef __McuRTT_CONFIG_H
#define __McuRTT_CONFIG_H
#include "McuLib.h" /* SDK and API used */
#ifndef RTT_USE_ASM
#define RTT_USE_ASM (0)
/*!< 1: use assembly version of low level buffer routines; 0: use C version */
#endif
#ifndef McuRTT_CONFIG_PROVIDE_SYSCALLS
#define McuRTT_CONFIG_PROVIDE_SYSCALLS (0)
/*!< 1: RTT library implements SysCalls; 0: no Syscalls implemented */
#endif
#ifndef McuRTT_CONFIG_BLOCKING_SEND
#define McuRTT_CONFIG_BLOCKING_SEND (0)
/*!< 1: using blocking call for stdio calls; 0: do not using blocking calls */
#endif
#ifndef McuRTT_CONFIG_BLOCKING_SEND_TIMEOUT_MS
#define McuRTT_CONFIG_BLOCKING_SEND_TIMEOUT_MS (0)
/*!< Timeout value for blocking calls for sending. Use zero for no timeout */
#endif
#ifndef McuRTT_CONFIG_BLOCKING_SEND_WAIT_MS
#define McuRTT_CONFIG_BLOCKING_SEND_WAIT_MS (0)
/*!< Waiting time during blocking send. Use zero for no waiting time */
#endif
#ifndef McuRTT_CONFIG_RTT_BUFFER_SIZE_UP
#define McuRTT_CONFIG_RTT_BUFFER_SIZE_UP (512)
/*!< Size of the up (Tx on the target side) buffer in bytes */
#endif
#ifndef McuRTT_CONFIG_RTT_BUFFER_SIZE_DOWN
#define McuRTT_CONFIG_RTT_BUFFER_SIZE_DOWN (64)
/*!< Size of the down (Rx on the target side) buffer in bytes */
#endif
#ifndef McuRTT_CONFIG_RTT_BUFFER_SIZE_PRINTF
#define McuRTT_CONFIG_RTT_BUFFER_SIZE_PRINTF (64)
/*!< Size of the buffer for RTT printf() in bytes */
#endif
#ifndef McuRTT_CONFIG_RTT_UP_BUFFER_MODE
#define McuRTT_CONFIG_RTT_UP_BUFFER_MODE (SEGGER_RTT_MODE_NO_BLOCK_SKIP)
/*!< Up buffer mode: SEGGER_RTT_MODE_NO_BLOCK_SKIP, SEGGER_RTT_MODE_NO_BLOCK_TRIM or SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL */
#endif
#ifndef McuRTT_CONFIG_RTT_DOWN_BUFFER_MODE
#define McuRTT_CONFIG_RTT_DOWN_BUFFER_MODE (SEGGER_RTT_MODE_NO_BLOCK_SKIP)
/*!< Up buffer mode: SEGGER_RTT_MODE_NO_BLOCK_SKIP, SEGGER_RTT_MODE_NO_BLOCK_TRIM or SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL */
#endif
#ifndef McuRTT_CONFIG_RTT_MAX_NUM_UP_BUFFERS
#define McuRTT_CONFIG_RTT_MAX_NUM_UP_BUFFERS (3)
/*!< Max. number of up-buffers (T->H) available on this target (Default: 3) */
#endif
#ifndef McuRTT_CONFIG_RTT_MAX_NUM_DOWN_BUFFERS
#define McuRTT_CONFIG_RTT_MAX_NUM_DOWN_BUFFERS (3)
/*!< Max. number of down-buffers (H->T) available on this target (Default: 3) */
#endif
#if McuLib_CONFIG_SDK_USE_FREERTOS
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY configMAX_SYSCALL_INTERRUPT_PRIORITY /* Interrupts at this level and below will be blocked (valid values 1-15) */
#else
#define SEGGER_RTT_LOCK_INTERRUPT_LEVEL (3) /* Interrupts at this level and below will be blocked (valid values 1-15 for Kinetis) */
#define SEGGER_RTT_PRIO_BITS 4 /* NXP Kinetis M4(F) has 4 interrupt priority bits */
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (SEGGER_RTT_LOCK_INTERRUPT_LEVEL<<(8-SEGGER_RTT_PRIO_BITS))
#endif
/* channel0 settings */
#define SEGGER_RTT_CHANNEL_0_ENABLED (1) /* 1: initialize channel; 0: do not initialize channel */
#define SEGGER_RTT_CHANNEL_0_NAME "Terminal"
#define SEGGER_RTT_CHANNEL_0_BUFFER_SIZE_UP (McuRTT_CONFIG_RTT_BUFFER_SIZE_UP)
#define SEGGER_RTT_CHANNEL_0_BUFFER_SIZE_DOWN (McuRTT_CONFIG_RTT_BUFFER_SIZE_DOWN)
#define SEGGER_RTT_CHANNEL_0_MODE_UP SEGGER_RTT_MODE_NO_BLOCK_SKIP
#define SEGGER_RTT_CHANNEL_0_MODE_DOWN SEGGER_RTT_MODE_NO_BLOCK_SKIP
#endif /* __McuRTT_CONFIG_H */

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/**
* \file
* \brief Configuration header file for RingBuffer.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Ring Buffer module.
*/
#ifndef __McuRingbuffer_CONFIG_H
#define __McuRingbuffer_CONFIG_H
#ifndef McuRingbuffer_CONFIG_REENTRANT
#define McuRingbuffer_CONFIG_REENTRANT 1 /* 1: reentrant implementation; 0: non-reentrant implementation */
#endif
#ifndef McuRingbuffer_CONFIG_BUF_SIZE
#define McuRingbuffer_CONFIG_BUF_SIZE 64 /* number of elements in the buffer */
#endif
#ifndef McuRingbuffer_CONFIG_ELEM_SIZE
#define McuRingbuffer_CONFIG_ELEM_SIZE 1 /* size of a single element in bytes */
#endif
#endif /* __McuRingbuffer_CONFIG_H */

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/*!
* Copyright (c) 2024, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief \brief Configuration items for the McuSDEP module.
*/
#ifndef MCUDEPCONFIG_H_
#define MCUDEPCONFIG_H_
#include "McuLib.h"
#ifndef McuSDEP_CONFIG_IS_ENABLED
#define McuSDEP_CONFIG_IS_ENABLED (0 && McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< If the SDEP module is enabled or not. */
#endif
#ifndef McuSDEP_CONFIG_USE_FRAMING
#define McuSDEP_CONFIG_USE_FRAMING (0)
/* if using SDEP messages with a framing, useful for shared SDEP and SDEP communication */
#endif
#ifndef McuSDEP_CONFIG_MSG_FRAMING_START
#define McuSDEP_CONFIG_MSG_FRAMING_START '@' /* marker to start an SDEP message */
/*!< used if McuSDEP_CONFIG_USE_FRAMING is enabled, used as starting frame */
#endif
#ifndef McuSDEP_CONFIG_MSG_FRAMING_END
#define McuSDEP_CONFIG_MSG_FRAMING_END '\n' /* marker to end a SDEP message */
/*!< used if McuSDEP_CONFIG_USE_FRAMING is enabled, used as ending frame */
#endif
#ifndef McuSDEP_CONFIG_RX_BUFFER_SIZE
#define McuSDEP_CONFIG_RX_BUFFER_SIZE (64)
/* size of the buffer for the incoming SDEP data */
#endif
#ifndef McuSDEP_CONFIG_SHELL_TO_SDEP_QUEUE_LENGTH
#define McuSDEP_CONFIG_SHELL_TO_SDEP_QUEUE_LENGTH (128)
/*!< Size of buffer of data sent by shell to SDEP */
#endif
#ifndef McuSDEP_CONFIG_USE_FREERTOS
#define McuSDEP_CONFIG_USE_FREERTOS (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< If FreeRTOS (Queues) shall be used or not */
#endif
#endif /* MCUDEPCONFIG_H_ */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __McuSDKBitIO_CONFIG_H
#define __McuSDKBitIO_CONFIG_H
#ifndef McuSDKBitIO_CONFIG_DO_PIN_MUXING
#define McuSDKBitIO_CONFIG_DO_PIN_MUXING 0 /* 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#endif /* __McuSDKBitIO_CONFIG_H */

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/*!
* Copyright (c) 2019, Erich Styger
* All rights reserved.
* \file
* \brief Configuration header file for McuSHT31 sensor from Sensirion.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MCUSHT31_CONFIG_H_
#define MCUSHT31_CONFIG_H_
#ifndef MCUSHT31_CONFIG_PARSE_COMMAND_ENABLED
#define MCUSHT31_CONFIG_PARSE_COMMAND_ENABLED (1)
#endif
#ifndef McuSHT31_CONFIG_I2C_ADDR
#define McuSHT31_CONFIG_I2C_ADDR (0x44) /* default I2C address with ADDR pin pulled LOW (default on Adafruit board) */
//#define McuSHT31_I2C_ADDR (0x45) /* I2C address with ADDR pin pulled HIGH: pull ADR pin to VIN */
#endif
#ifndef McuSHT31_CONFIG_READ_WAIT_MS
#define McuSHT31_CONFIG_READ_WAIT_MS (25)
/*!< SHT31 needs a wait time for sampling the data */
#endif
#endif /* MCUSHT31_CONFIG_H_ */

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/*!
* Copyright (c) 2019, 2022 Erich Styger
* All rights reserved.
* \file
* \brief Configuration header file for McuSHT40 (Sensirion SHT40 sensor).
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MCUSHT40_CONFIG_H_
#define MCUSHT40_CONFIG_H_
/*
SHT40-AD1B base RH&T accur., 0x44 I2C addr.
SHT40-BD1B base RH&T accur., 0x45 I2C addr.
SHT41-AD1B Intermed. RH&T accur., 0x44 I2C addr.
SHT45-AD1B ±1.5 %RH, ±0.1°C accur., 0x44 I2C addr.
*/
#ifndef McuSHT40_CONFIG_I2C_ADDR
#define McuSHT40_CONFIG_I2C_ADDR (0x44) /* I2C address of the sensor */
#endif
#ifndef MCUSHT40_CONFIG_PARSE_COMMAND_ENABLED
#define MCUSHT40_CONFIG_PARSE_COMMAND_ENABLED (1)
#endif
#endif /* MCUSHT40_CONFIG_H_ */

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/*!
* Copyright (c) 2022, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuSPI module.
*/
#ifndef MCUSPICONFIG_H_
#define MCUSPICONFIG_H_
/* different hardware pre-configurations */
#define MCUSPI_CONFIG_HW_TEMPLATE_NONE 0
#define MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI0 1
#define MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI1 2
#define MCUSPI_CONFIG_HW_TEMPLATE_LPC55S16_FC3 3
#define MCUSPI_CONFIG_HW_TEMPLATE_LPC55S59_FC8 4
#define MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI0 5
#define MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI1 6
#define MCUSPI_CONFIG_HW_TEMPLATE_ESP32_SPI3 7
/* NOTE: Pin muxing for the MISO/MOSI/CLK has to be done in the pins tool! */
#ifndef MCUSPI_CONFIG_USE_CS
#define MCUSPI_CONFIG_USE_CS (1)
/*!< 1: use and initialize CS pin; 0: CS pin is handled by the application */
#endif
#ifndef MCUSPI_CONFIG_HW_TEMPLATE
#define MCUSPI_CONFIG_HW_TEMPLATE MCUSPI_CONFIG_HW_TEMPLATE_NONE
#endif
#if MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI0
#define MCUSPI_CONFIG_HW_SPI_MASTER SPI0
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC DSPI0_CLK_SRC
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFreq(DSPI0_CLK_SRC)
#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_INIT kDSPI_Pcs1
#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_TRANSFER kDSPI_MasterPcs1 /* note that this is actually not used: the CS pin below is used instead */
#define MCUSPI_CONFIG_HW_CS_GPIO GPIOD
#define MCUSPI_CONFIG_HW_CS_PORT PORTD
#define MCUSPI_CONFIG_HW_CS_PIN 4
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() \
CLOCK_EnableClock(kCLOCK_PortD);
#endif
#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI1
#define MCUSPI_CONFIG_HW_SPI_MASTER SPI1
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC DSPI1_CLK_SRC
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFreq(DSPI1_CLK_SRC)
#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_INIT kDSPI_Pcs1
#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_TRANSFER kDSPI_MasterPcs1 /* note that this is actually not used: the CS pin below is used instead */
#define MCUSPI_CONFIG_HW_CS_GPIO GPIOB
#define MCUSPI_CONFIG_HW_CS_PORT PORTB
#define MCUSPI_CONFIG_HW_CS_PIN 18
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() \
CLOCK_EnableClock(kCLOCK_PortB);
#endif
#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_LPC55S16_FC3
/* FC3_SPI_SCK, P0_6
* FC3_SPI_SSEL0, P0_4
* FC3_SPI_MOSI, P0_3
* FC3_SPI_MISO, P0_2
*/
#define MCUSPI_CONFIG_HW_SPI_MASTER SPI3
#define MCUSPI_CONFIG_HW_SPI_MASTER_IRQ FLEXCOMM3_IRQn
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC kCLOCK_Flexcomm3
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFlexCommClkFreq(3U)
#define MCUSPI_CONFIG_HW_SPI_SSEL 1
#define MCUSPI_CONFIG_HW_SPI_SPOL kSPI_SpolActiveAllLow
#define MCUSPI_CONFIG_HW_SPI_INIT() \
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7); /* attach 12 MHz clock to SPI3 */ \
RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn); /* reset FLEXCOMM for SPI */
#define MCUSPI_CONFIG_HW_CS_GPIO GPIO
#define MCUSPI_CONFIG_HW_CS_PORT 0
#define MCUSPI_CONFIG_HW_CS_PIN 4
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
#endif
#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_LPC55S59_FC8
#define MCUSPI_CONFIG_HW_SPI_MASTER SPI8
#define MCUSPI_CONFIG_HW_SPI_MASTER_IRQ FLEXCOMM8_IRQn
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC kCLOCK_Flexcomm8
#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFlexCommClkFreq(8U)
#define MCUSPI_CONFIG_HW_SPI_SSEL 1
#define MCUSPI_CONFIG_HW_SPI_SPOL kSPI_SpolActiveAllLow
#define MCUSPI_CONFIG_HW_SPI_INIT() \
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8); /* attach 12 MHz clock to SPI8 */ \
RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn); /* reset FLEXCOMM for SPI */
#define MCUSPI_CONFIG_HW_CS_GPIO GPIO
#define MCUSPI_CONFIG_HW_CS_PORT 0
#define MCUSPI_CONFIG_HW_CS_PIN 4
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
#endif
#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI0
#ifndef MCUSPI_CONFIG_HW_SCLK_PIN
#define MCUSPI_CONFIG_HW_SCLK_PIN (18) /* SPI0_SCK */
#endif
#ifndef MCUSPI_CONFIG_HW_MOSI_PIN
#define MCUSPI_CONFIG_HW_MOSI_PIN (19) /* SPI0_TX */
#endif
#ifndef MCUSPI_CONFIG_HW_MISO_PIN
#define MCUSPI_CONFIG_HW_MISO_PIN (16) /* SPI0_RX */
#endif
#ifndef MCUSPI_CONFIG_HW_CS_PIN
#define MCUSPI_CONFIG_HW_CS_PIN (17) /* SPI0_CSn */
#endif
#ifndef MCUSPI_CONFIG_HW_SPI_INIT
#define MCUSPI_CONFIG_HW_SPI_INIT() /* nothing */
#endif
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
#endif
#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI1
#ifndef MCUSPI_CONFIG_HW_SCLK_PIN
#define MCUSPI_CONFIG_HW_SCLK_PIN (10) /* SPI1_SCK */
#endif
#ifndef MCUSPI_CONFIG_HW_MOSI_PIN
#define MCUSPI_CONFIG_HW_MOSI_PIN (11) /* SPI1_TX */
#endif
#ifndef MCUSPI_CONFIG_HW_MISO_PIN
#define MCUSPI_CONFIG_HW_MISO_PIN (12) /* SPI1_RX */
#endif
#ifndef MCUSPI_CONFIG_HW_CS_PIN
#define MCUSPI_CONFIG_HW_CS_PIN (13) /* SPI1_CSn */
#endif
#ifndef MCUSPI_CONFIG_HW_SPI_INIT
#define MCUSPI_CONFIG_HW_SPI_INIT() /* nothing */
#endif
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
#endif
#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_ESP32_SPI3
/* SPI3, commonly referred as VSPI */
#ifndef MCUSPI_CONFIG_HW_SCLK_PIN
#define MCUSPI_CONFIG_HW_SCLK_PIN (GPIO_NUM_18) /* VSPI, IO18 */
#endif
#ifndef MCUSPI_CONFIG_HW_MOSI_PIN
#define MCUSPI_CONFIG_HW_MOSI_PIN (GPIO_NUM_23) /* VSPI, IO23 */
#endif
#ifndef MCUSPI_CONFIG_HW_MISO_PIN
#define MCUSPI_CONFIG_HW_MISO_PIN (GPIO_NUM_19) /* VSPI, IO19 */
#endif
#ifndef MCUSPI_CONFIG_HW_CS_PIN
#define MCUSPI_CONFIG_HW_CS_PIN (GPIO_NUM_5) /* VSPI, IO5 */
#endif
#ifndef MCUSPI_CONFIG_HW_SPI_INIT
#define MCUSPI_CONFIG_HW_SPI_INIT() /* nothing */
#endif
#ifndef MCUSPI_CONFIG_HW_CS_INIT
#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
#endif
#endif /* MCUSPI_CONFIG_HW_TEMPLATE */
#ifndef MCUSPI_CONFIG_TRANSFER_BAUDRATE
#define MCUSPI_CONFIG_TRANSFER_BAUDRATE 500000U /*! Transfer baudrate - 500k */
#endif
#endif /* MCUSPICONFIG_H_ */

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/**
* \file
* \brief Application configuration file for SSD1306 display driver
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is a configuration header file to configure the module McuSSD1306 (SSD1306).
* You can configure the defines directly in this file or with the compiler -D option.
*/
#ifndef __McuSSD1306_CONFIG_H
#define __McuSSD1306_CONFIG_H
#ifndef McuSSD1306_CONFIG_I2C_HEADER_FILE
#define McuSSD1306_CONFIG_I2C_HEADER_FILE "McuGenericI2C.h"
/*!< Header file to be included for the SPI driver */
#endif
/* Which display is used: only one of the two options below can be enabled: */
#define McuSSD1306_CONFIG_SSD1306_SIZE_TYPE (12864)
/*!< either 12864 (128x64) or 12832 (128x32) */
#ifndef McuSSD1306_CONFIG_SSD1306_HAS_RST
#define McuSSD1306_CONFIG_SSD1306_HAS_RST (0)
#define McuSSD1306_CONFIG_SSD1306_RESET_LOW() Reset_ClrVal() /* RESET signal low (reset is low active) */
#define McuSSD1306_CONFIG_SSD1306_RESET_HIGH() Reset_SetVal() /* RESET signal high */
#define McuSSD1306_CONFIG_RESET_HEADER_FILE "ResetPin.h"
#endif
#if McuSSD1306_CONFIG_SSD1306_HAS_RST
#include McuSSD1306_CONFIG_RESET_HEADER_FILE /* reset pin interface */
#endif
#ifndef McuSSD1306_CONFIG_SSD1306_EXTERNAL
#define McuSSD1306_CONFIG_SSD1306_EXTERNAL (0)
/*!< set to 1 if external vcc is connected, otherwise 0 if internal dc/dc converter is used */
#endif
#ifndef McuSSD1306_CONFIG_SSD1306_I2C_ADDR
#define McuSSD1306_CONFIG_SSD1306_I2C_ADDR (60)
/*!< I2C 7bit (unshifted) device address, usually 0x3C (60) (0b11'1100) or 0x3D (61) (0b11'1101) */
#endif
#ifndef McuSSD1306_CONFIG_SSD1306_DRIVER_TYPE
#define McuSSD1306_CONFIG_SSD1306_DRIVER_TYPE (1306)
/*!< Either 1306 for SSD1306 or 1106 for SH1106 */
#endif
#ifndef McuSSD1306_CONFIG_SSD1306_START_COLUMN_OFFSET
#define McuSSD1306_CONFIG_SSD1306_START_COLUMN_OFFSET (0)
/*!< Some SH1106 displays need a start column of 2 instead of the default 0 */
#endif
#ifndef McuSSD1306_CONFIG_SSD1306_I2C_DELAY_US
#define McuSSD1306_CONFIG_SSD1306_I2C_DELAY_US (0)
/*!< I2C transaction delay in us */
#endif
#ifndef McuSSD1306_CONFIG_DYNAMIC_DISPLAY_ORIENTATION
#define McuSSD1306_CONFIG_DYNAMIC_DISPLAY_ORIENTATION (0)
/*!< 1: Use SetDisplayOrientation() to change display orientation at runtime; 0: fixed display orientation */
#endif
/* display orientation types used in macro below: */
#define McuSSD1306_CONFIG_ORIENTATION_PORTRAIT 0
#define McuSSD1306_CONFIG_ORIENTATION_PORTRAIT180 1
#define McuSSD1306_CONFIG_ORIENTATION_LANDSCAPE 2
#define McuSSD1306_CONFIG_ORIENTATION_LANDSCAPE180 3
#ifndef McuSSD1306_CONFIG_FIXED_DISPLAY_ORIENTATION
#define McuSSD1306_CONFIG_FIXED_DISPLAY_ORIENTATION McuSSD1306_CONFIG_ORIENTATION_LANDSCAPE
/*!< Fixed display orientation setting, one of:
McuSSD1306_CONFIG_ORIENTATION_PORTRAIT
McuSSD1306_CONFIG_ORIENTATION_PORTRAIT180
McuSSD1306_CONFIG_ORIENTATION_LANDSCAPE
McuSSD1306_CONFIG_ORIENTATION_LANDSCAPE180
*/
#endif
#ifndef McuSSD1306_CONFIG_INITIALIZE_IN_INIT
#define McuSSD1306_CONFIG_INITIALIZE_IN_INIT (1)
/*!< 1: Initialize LCD during PE_low_level_init(); 0: Do not initialize during PE_low_level_init() */
#endif
#ifndef McuSSD1306_CONFIG_CLEAR_DISPLAY_IN_INIT
#define McuSSD1306_CONFIG_CLEAR_DISPLAY_IN_INIT (0)
/*!< 1: Clear display at the end of Init(); 0: Do not clear display at the end of Init() */
#endif
#ifndef McuSSD1306_CONFIG_INIT_DELAY_MS
#define McuSSD1306_CONFIG_INIT_DELAY_MS (100)
/*!< Additional delay (milliseconds) in Init(). Use zero for no delay. */
#endif
#ifndef McuSSD1306_CONFIG_USE_I2C_BLOCK_TRANSFER
#define McuSSD1306_CONFIG_USE_I2C_BLOCK_TRANSFER (1)
/*!< 1: use I2C Block transfer for better performance. 0: disabled, e.g. for slower displays */
#endif
#ifndef McuSSD1306_CONFIG_USE_RAM_BUFFER
#define McuSSD1306_CONFIG_USE_RAM_BUFFER (1)
/*!< 1: Use RAM Buffer for display memory; 0: Do not use RAM buffer (write directly to display) */
#endif
#endif /* __McuSSD1306_CONFIG_H */

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/*!
* Copyright (c) 2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the ST7735 display driver.
*/
#ifndef MCUST7735_CONFIG_H_
#define MCUST7735_CONFIG_H_
/* different display types supported */
#define MCUST7735_TYPE_128X128 (1)
#define MCUST7735_TYPE_160X80 (2)
#define MCUST7735_TYPE_160X128 (3)
#ifndef McuST7735_CONFIG_DISPLAY_TYPE
#define McuST7735_CONFIG_DISPLAY_TYPE MCUST7735_TYPE_128X128
#endif
#ifndef McuST7735_CONFIG_IS_ENABLED
#define McuST7735_CONFIG_IS_ENABLED (0)
/*!< 1: driver is enabled. 0: driver is not enabled */
#endif
/* CS pin */
#ifndef McuST7735_CONFIG_CS_PIN_GPIO
#define McuST7735_CONFIG_CS_PIN_GPIO GPIOB
/*!< GPIO for CS Pin */
#endif
#ifndef McuST7735_CONFIG_CS_PIN_PORT
#define McuST7735_CONFIG_CS_PIN_PORT PORTB
/*!< PORT for CS Pin */
#endif
#ifndef McuST7735_CONFIG_CS_PIN_NUMBER
#define McuST7735_CONFIG_CS_PIN_NUMBER 0
/*!< Pin number of the CS Pin */
#endif
/* DC pin */
#ifndef McuST7735_CONFIG_DC_PIN_GPIO
#define McuST7735_CONFIG_DC_PIN_GPIO GPIOB
/*!< GPIO for DC Pin */
#endif
#ifndef McuST7735_CONFIG_DC_PIN_PORT
#define McuST7735_CONFIG_DC_PIN_PORT PORTB
/*!< PORT for DC Pin */
#endif
#ifndef McuST7735_CONFIG_DC_PIN_NUMBER
#define McuST7735_CONFIG_DC_PIN_NUMBER 1
/*!< Pin number of the DC Pin */
#endif
/* RESET pin */
#ifndef McuST7735_CONFIG_RESET_PIN_GPIO
#define McuST7735_CONFIG_RESET_PIN_GPIO GPIOB
/*!< GPIO for CS Pin */
#endif
#ifndef McuST7735_CONFIG_RESET_PIN_PORT
#define McuST7735_CONFIG_RESET_PIN_PORT PORTB
/*!< PORT for CS Pin */
#endif
#ifndef McuST7735_CONFIG_RESET_PIN_NUMBER
#define McuST7735_CONFIG_RESET_PIN_NUMBER 2
/*!< Pin number of the CSN Pin */
#endif
#endif /* MCUST7735_CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for STM32CubeI2C.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the software (bit-banging) I2C module.
*/
#ifndef __McuSTM32HALI2C_CONFIG_H
#define __McuSTM32HALI2C_CONFIG_H
/* specify HAL header file for your device: */
#include "stm32f3xx_hal.h"
#include "stm32f3xx_hal_i2c.h"
#endif /* __McuSTM32HALI2C_CONFIG_H */

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/*!
* Copyright (c) 2021-2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuSWO module.
*/
#ifndef MCUSWOCONFIG_H_
#define MCUSWOCONFIG_H_
#ifndef McuSWO_CONFIG_HAS_SWO
#define McuSWO_CONFIG_HAS_SWO (0)
/*!< 1: MCU has SWO; 0: MCUS does not have SWO */
#endif
#ifndef McuSWO_CONFIG_SPEED_BAUD
#define McuSWO_CONFIG_SPEED_BAUD (96000000)
/*!< baud of SWO data. Note that the J-Link can consume up to 400 kHz. */
#endif
#ifndef McuSWO_CONFIG_TERMINAL_CHANNEL
#define McuSWO_CONFIG_TERMINAL_CHANNEL (0)
/*!< default SWO channel/stimulus for terminal */
#endif
#ifndef McuSWO_CONFIG_DO_MUXING
#define McuSWO_CONFIG_DO_MUXING (1)
/*! if SWO pin muxing shall be done inside McuSWO_Init(). Otherwise pin muxing is responsible of the application */
#endif
#ifndef McuSWO_CONFIG_DO_CLOCKING
#define McuSWO_CONFIG_DO_CLOCKING (1)
/*! if SWO clocking shall be configured inside McuSWO_Init(). Otherwise pin muxing is responsible of the application */
#endif
#ifndef McuSWO_CONFIG_DO_SWO_INIT
#define McuSWO_CONFIG_DO_SWO_INIT (1)
/*! if SWO/ITM device shall be initialized inside McuSWO_Init(). Otherwise it needs to be done in the application or in the debugger. */
#endif
#ifndef McuSWO_CONFIG_RETARGET_STDIO
#define McuSWO_CONFIG_RETARGET_STDIO (0)
/*! 1: implement hooks to re-target stdin (e.g. scanf()) input and stdout (printf()) output. */
#endif
#ifndef McuSWO_CONFIG_PC_SAMPLING
#define McuSWO_CONFIG_PC_SAMPLING (0)
/*!< if SWO PC sampling is turned on */
#endif
#ifndef McuSWO_CONFIG_SHELL_ENABLED
#define McuSWO_CONFIG_SHELL_ENABLED (1)
/*!< 1: Shell support enabled; 0: no command line shell */
#endif
#endif /* MCUSWOCONFIG_H_ */

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/*!
* Copyright (c) 2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuSemihost module.
*/
#ifndef MCUSEMIHOST_CONFIG_H_
#define MCUSEMIHOST_CONFIG_H_
#include "McuLib.h"
#ifndef McuSemihost_CONFIG_IS_ENABLED
#define McuSemihost_CONFIG_IS_ENABLED (McuLib_CONFIG_CPU_IS_ARM_CORTEX_M)
/* 1 if module is enabled, only for ARM Cortex-M; 0 otherwise */
#endif
#define McuSemihost_DEBUG_CONNECTION_GENERIC (0) /*!< generic debug probe */
#define McuSemihost_DEBUG_CONNECTION_LINKSERVER (1) /*!< NXP Linkserver debug probe */
#define McuSemihost_DEBUG_CONNECTION_SEGGER (2) /*!< SEGGER J-Link debug probe */
#define McuSemihost_DEBUG_CONNECTION_PEMICRO (3) /*!< P&E Multilink debug probe */
#define McuSemihost_DEBUG_CONNECTION_PYOCD (4) /*!< PyOCD debug probe */
#ifndef McuSemihost_CONFIG_DEBUG_CONNECTION
#define McuSemihost_CONFIG_DEBUG_CONNECTION McuSemihost_DEBUG_CONNECTION_GENERIC
#endif
#ifndef McuSemihost_CONFIG_INIT_STDIO_HANDLES
#define McuSemihost_CONFIG_INIT_STDIO_HANDLES (0)
/*!< if standard I/O handles (stdin, stdout, stderr) shall be initialized (1) or not (0): Note that McuRdiMon initializes the handles too! */
#endif
/* certain functionality is not implemented depending on the debug connection */
#ifndef McuSemihost_CONFIG_HAS_SYS_RENAME
/* SEGGER does not allow it for security reason, PyOCD reports 'unimplemented request' */
#define McuSemihost_CONFIG_HAS_SYS_RENAME (!( McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_SEGGER \
|| McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_LINKSERVER \
|| McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_PYOC \
) \
)
#endif
#ifndef McuSemihost_CONFIG_HAS_SYS_REMOVE
/* SEGGER does not allow it for security reason, PyOCD reports 'unimplemented request' */
#define McuSemihost_CONFIG_HAS_SYS_REMOVE (!(McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_SEGGER || McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_PYOCD))
#endif
#ifndef McuSemihost_CONFIG_HAS_SYS_TMPNAME
/* SEGGER does not allow it for security reason, PyOCD reports 'unimplemented request' */
#define McuSemihost_CONFIG_HAS_SYS_TMPNAME (!(McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_SEGGER || McuSemihost_CONFIG_DEBUG_CONNECTION==McuSemihost_DEBUG_CONNECTION_PYOCD))
#endif
#ifndef McuSemihost_CONFIG_USE_BUFFERED_IO
#define McuSemihost_CONFIG_USE_BUFFERED_IO (1)
/*!< if std I/O shall use a buffer and only write on buffer end or after a '\n' or based on McuSemihost_CONFIG_BUFFER_IO_FLUSH */
#endif
#ifndef McuSemihost_CONFIG_BUFFER_IO_SIZE
#define McuSemihost_CONFIG_BUFFER_IO_SIZE (64)
/*!< size in bytes for I/O buffer */
#endif
#ifndef McuSemihost_CONFIG_BUFFER_IO_FLUSH
#define McuSemihost_CONFIG_BUFFER_IO_FLUSH (0)
/*!< 1: I/O buffer is written buffer is full or with McuSemihost_StdIOFlush(); 0: I/O buffer is written after a '\n' */
#endif
#ifndef McuSemihost_CONFIG_LOG_ENABLED
#define McuSemihost_CONFIG_LOG_ENABLED (0)
/*!< 1: Logging semihost activities with McuLog; 0: Logging disabled */
#endif
#ifndef McuSemihost_CONFIG_RETARGET_STDLIB
#define McuSemihost_CONFIG_RETARGET_STDLIB (0)
/*!< 1: stdlib retargeting for; 0: no retargeting */
#endif
#ifndef McuSemihost_CONFIG_CUT_FILENAME_PREFIX
#define McuSemihost_CONFIG_CUT_FILENAME_PREFIX (0)
/*!< 1: cut file name previx specified in McuSemihost_CONFIG_CUT_FILENAME_PREFIX_STR; 0: prefix cutting with */
#endif
#ifndef McuSemihost_CONFIG_CUT_FILENAME_PREFIX_STR
#define McuSemihost_CONFIG_CUT_FILENAME_PREFIX_STR ""
/*!< String to be removed as prefix (start) of the file name used. Useful for semihosting in DevContainers */
#endif
#endif /* MCUSEMIHOST_CONFIG_H_ */

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/*!
* Copyright (c) 2024, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief \brief Configuration items for the McuShellCdcDevice module.
*/
#ifndef MCUSHELLCDCDEVICECONFIG_H_
#define MCUSHELLCDCDEVICECONFIG_H_
#include "McuLib.h"
#ifndef McuShellCdcDevice_CONFIG_IS_ENABLED
#define McuShellCdcDevice_CONFIG_IS_ENABLED (0)
/*!< if module is enabled or not */
#endif
#ifndef McuShellCdcDevice_CONFIG_RX_BUFFER_SIZE
#define McuShellCdcDevice_CONFIG_RX_BUFFER_SIZE (McuShell_CONFIG_DEFAULT_SHELL_BUFFER_SIZE)
/*!< default receiving buffer size */
#endif
#ifndef McuShellCdcDevice_CONFIG_USE_FREERTOS
#define McuShellCdcDevice_CONFIG_USE_FREERTOS (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< If FreeRTOS (Queues) shall be used or not */
#endif
#ifndef McuShellCdcDevice_CONFIG_PROCESS_WAIT_TIME_MS
#define McuShellCdcDevice_CONFIG_PROCESS_WAIT_TIME_MS (5)
/*!< Processing wait time for the USB CDC device task, in milli-seconds */
#endif
#ifndef McuShellCdcDevice_CONFIG_PROCESS_PRIORITY
#define McuShellCdcDevice_CONFIG_PROCESS_PRIORITY (configMAX_PRIORITIES-1)
/*!< FreeRTOS task priority for processing task */
#endif
#endif

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/*!
* Copyright (c) 2020-2024, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief \brief Configuration items for the McuShellUart module.
*/
#ifndef MCUSHELLUARTCONFIG_H_
#define MCUSHELLUARTCONFIG_H_
/* supported UART implementation: */
#define McuShellUart_CONFIG_UART_NONE (0)
/* LPC845 */
#define McuShellUart_CONFIG_UART_LPC845_USART0 (1) /* Rx on pin 20 (PIO0_24), Tx on pin 19 (PIO0_25) */
/* Kinetis K22FX */
#define McuShellUart_CONFIG_UART_K22FX512_UART0_A1_A2 (2) /* Rx on PTA1 (pin 27), Tx on PTA2 (pin 28) */
#define McuShellUart_CONFIG_UART_K22FX512_UART1_E1_E0 (3) /* Rx on PTE1 (pin 2), Tx on PTE2 (pin 1) */
/* Kinetis K22FN */
#define McuShellUart_CONFIG_UART_K22FN512_LPUART0_C3_C4 (4) /* PTC3: Rx, (pin 46), PTC4: Tx (pin 49) (OpenSDA UART on tinyK22) */
#define McuShellUart_CONFIG_UART_K22FN512_UART0_B16_B17 (5) /* PTB16 (Rx), PTB17 (Tx) */
#define McuShellUart_CONFIG_UART_K22FN512_UART1_E1_E0 (6) /* PTE1 (Rx), PTE0 (Tx) (OpenSDA UART on FRDM-K22F) */
/* Kinetis K64FN1M */
#define McuShellUart_CONFIG_UART_K64FN1M_UART0_B16_B17 (7) /* PTB16 (Rx), PTB17 (Tx) */
/* LPC55S16 */
#define McuShellUart_CONFIG_UART_LPC55S16_USART0 (8) /* FlexComm0, pin 92 (Rx) and pin 94 (Tx) */
#define McuShellUart_CONFIG_UART_LPC55S16_USART2 (9) /* FlexComm2, pin 3 (Rx) and pin 27 (Tx) */
/* LPC55S69 */
#define McuShellUart_CONFIG_UART_LPC55S69_USART0 (10) /* FlexComm0, P0_29, pin92 (Rx) and P0_30, pin94 (Tx) */
/* RP2040 */
#define McuShellUart_CONFIG_UART_RP2040_UART1_GPIO4_GPIO5 (11) /* UART1 with Tx on GPIO4 and Rx on GPIO5 */
/* default UART used */
#ifndef McuShellUart_CONFIG_UART
#define McuShellUart_CONFIG_UART McuShellUart_CONFIG_UART_NONE
#endif
#ifndef McuShellUart_CONFIG_DO_MUXING
#define McuShellUart_CONFIG_DO_PIN_MUXING (1)
/*!< 1: Do the pin muxing in the Init(); 0: no pin muxing is done in the Init() */
#endif
/* UART configuration items */
#if McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_NONE
/* no UART used */
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_LPC845_USART0
#include "fsl_usart.h"
#include "fsl_swm.h"
#define McuShellUart_CONFIG_UART_DEVICE USART0
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() CLOCK_Select(kUART0_Clk_From_MainClk) /* Select the main clock as source clock of USART0. */
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING USART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS USART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUSART_RxReady|kUSART_HardwareOverrunFlag)
#define McuShellUart_CONFIG_UART_READ_BYTE USART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT usart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG USART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS USART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUSART_RxReadyInterruptEnable | kUSART_HardwareOverRunInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER USART0_IRQn
#define McuShellUart_CONFIG_UART_INIT USART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_MainClk
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER USART0_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS USART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (0) /* no extra flags to clear */
#define McuShellUart_CONFIG_HAS_FIFO (0)
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_LPC55S16_USART0
#include "fsl_usart.h"
#include "fsl_iocon.h"
#define McuShellUart_CONFIG_UART_DEVICE USART0
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0)
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING USART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS USART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUSART_RxFifoNotEmptyFlag | kUSART_RxError)
#define McuShellUart_CONFIG_UART_READ_BYTE USART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT usart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG USART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS USART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER FLEXCOMM0_IRQn
#define McuShellUart_CONFIG_UART_INIT USART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_Fro12M
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER FLEXCOMM0_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS USART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (0) /* no extra flags to clear */
#define McuShellUart_CONFIG_HAS_FIFO (0) /* not sure? */
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_LPC55S16_USART2
#include "fsl_usart.h"
#include "fsl_iocon.h"
#define McuShellUart_CONFIG_UART_DEVICE USART2
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2)
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING USART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS USART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUSART_RxFifoNotEmptyFlag | kUSART_RxError)
#define McuShellUart_CONFIG_UART_READ_BYTE USART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT usart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG USART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS USART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER FLEXCOMM2_IRQn
#define McuShellUart_CONFIG_UART_INIT USART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_Fro12M
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER FLEXCOMM2_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS USART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (0) /* no extra flags to clear */
#define McuShellUart_CONFIG_HAS_FIFO (0) /* not sure? */
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_LPC55S69_USART0
#include "fsl_usart.h"
#include "fsl_iocon.h"
#define McuShellUart_CONFIG_UART_DEVICE USART0
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0)
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING USART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS USART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUSART_RxFifoNotEmptyFlag | kUSART_RxError)
#define McuShellUart_CONFIG_UART_READ_BYTE USART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT usart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG USART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS USART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER FLEXCOMM0_IRQn
#define McuShellUart_CONFIG_UART_INIT USART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_Fro12M
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER FLEXCOMM0_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS USART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (0) /* no extra flags to clear */
#define McuShellUart_CONFIG_HAS_FIFO (0) /* not sure? */
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_K22FX512_UART0_A1_A2
/* UART0 on K22FX512 */
#include "fsl_uart.h"
#include "fsl_port.h"
#define McuShellUart_CONFIG_UART_DEVICE UART0
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuShellUart_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER UART0_RX_TX_IRQn
#define McuShellUart_CONFIG_UART_INIT UART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_CoreSysClk
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (kUART_RxOverrunFlag|kUART_RxFifoOverflowFlag)
#define McuShellUart_CONFIG_HAS_FIFO (1)
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_K22FN512_UART0_B16_B17
#include "fsl_uart.h"
#include "fsl_port.h"
#define McuShellUart_CONFIG_UART_DEVICE UART0
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuShellUart_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER UART0_RX_TX_IRQn
#define McuShellUart_CONFIG_UART_INIT UART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_CoreSysClk
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (kUART_RxOverrunFlag|kUART_RxFifoOverflowFlag)
#define McuShellUart_CONFIG_HAS_FIFO (1)
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_K22FN512_UART1_E1_E0
/* UART1 on K22FN512. Mux the pins using the pins muxing tool */
#include "fsl_uart.h"
#include "fsl_port.h"
#define McuShellUart_CONFIG_UART_DEVICE UART1
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuShellUart_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER UART1_RX_TX_IRQn
#define McuShellUart_CONFIG_UART_INIT UART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_CoreSysClk
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER UART1_RX_TX_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (kUART_RxOverrunFlag|kUART_RxFifoOverflowFlag)
#define McuShellUart_CONFIG_HAS_FIFO (1)
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_K22FN512_LPUART0_C3_C4
/* LPUART on K22FN512 */
#include "fsl_lpuart.h"
#include "fsl_port.h"
#define McuShellUart_CONFIG_UART_DEVICE LPUART0
/*! LPUARTSRC - LPUART clock source select
* 0b00..Clock disabled
* 0b01..MCGFLLCLK , or MCGPLLCLK , or IRC48M clock as selected by SOPT2[PLLFLLSEL].
* 0b10..OSCERCLK clock
* 0b11..MCGIRCLK clock
*/
#define SIM_LPUART_CLK_SEL_PLLFLLSEL_CLK 1U /*!< LPUART clock select: PLLFLLSEL output clock */
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() CLOCK_SetLpuartClock(SIM_LPUART_CLK_SEL_PLLFLLSEL_CLK)
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING LPUART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS LPUART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kLPUART_RxDataRegFullFlag|kLPUART_RxOverrunFlag)
#define McuShellUart_CONFIG_UART_READ_BYTE LPUART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT lpuart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG LPUART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS LPUART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kLPUART_RxDataRegFullInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER LPUART0_IRQn
#define McuShellUart_CONFIG_UART_INIT LPUART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT /* kCLOCK_Osc0ErClkUndiv */ kCLOCK_PllFllSelClk /* has to match Clocks setting! */
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER LPUART0_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS LPUART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (0) /* no extra flags to clear */
#define McuShellUart_CONFIG_HAS_FIFO (0)
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_K64FN1M_UART0_B16_B17
#include "fsl_uart.h"
#include "fsl_port.h"
#define McuShellUart_CONFIG_UART_DEVICE UART0
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuShellUart_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuShellUart_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuShellUart_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuShellUart_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuShellUart_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuShellUart_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable)
#define McuShellUart_CONFIG_UART_IRQ_NUMBER UART0_RX_TX_IRQn
#define McuShellUart_CONFIG_UART_INIT UART_Init
#ifndef McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT
#define McuShellUart_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_CoreSysClk
#endif
#define McuShellUart_CONFIG_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
#define McuShellUART_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#define McuShellUART_CONFIG_CLEAR_EXTRA_STATUS_FLAGS (kUART_RxOverrunFlag|kUART_RxFifoOverflowFlag)
#define McuShellUart_CONFIG_HAS_FIFO (1)
#elif McuShellUart_CONFIG_UART==McuShellUart_CONFIG_UART_RP2040_UART1_GPIO4_GPIO5
#define McuShellUart_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuShellUart_CONFIG_UART_WRITE_BLOCKING RP_WriteBlocking
#define McuShellUart_CONFIG_UART_DEVICE uart1
#define McuShellUart_CONFIG_DATA_BITS 8
#define McuShellUart_CONFIG_STOP_BITS 1
#define McuShellUart_CONFIG_PARITY UART_PARITY_NONE
#define McuShellUart_CONFIG_UART_TX_PIN 4
#define McuShellUart_CONFIG_UART_RX_PIN 5
#else
/* you have to put your configuration here */
#endif
#ifndef McuShellUart_CONFIG_UART_RX_QUEUE_LENGTH
#define McuShellUart_CONFIG_UART_RX_QUEUE_LENGTH (McuShell_CONFIG_DEFAULT_SHELL_BUFFER_SIZE)
#endif
#ifndef McuShellUart_CONFIG_UART_BAUDRATE
#define McuShellUart_CONFIG_UART_BAUDRATE 115200
#endif
#ifndef McuShellUart_CONFIG_USE_FREERTOS
#define McuShellUart_CONFIG_USE_FREERTOS (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< If FreeRTOS (Queues) shall be used or not */
#endif
#endif /* MCUSHELLUARTCONFIG_H_ */

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/**
* \file
* \brief Configuration header file for Shell
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Shell module.
*/
#ifndef __McuShell_CONFIG_H
#define __McuShell_CONFIG_H
#ifndef McuShell_CONFIG_BLOCKING_SEND_ENABLED
#define McuShell_CONFIG_BLOCKING_SEND_ENABLED (1)
/*!< 1: Sending is blocking (with an optional timeout); 0: Do not block on sending */
#endif
#ifndef McuShell_CONFIG_BLOCKING_SEND_TIMEOUT_MS
#define McuShell_CONFIG_BLOCKING_SEND_TIMEOUT_MS (20)
/*!< Total blocking time (timeout) in milliseconds, uses 0 for blocking without a timeout */
#endif
#ifndef McuShell_CONFIG_BLOCKING_SEND_TIMEOUT_WAIT_MS
#define McuShell_CONFIG_BLOCKING_SEND_TIMEOUT_WAIT_MS (5)
/*!< waiting time during blocking, use 0 (zero) for polling */
#endif
#ifndef McuShell_CONFIG_BLOCKING_SEND_RTOS_WAIT
#define McuShell_CONFIG_BLOCKING_SEND_RTOS_WAIT (1)
/*!< 1: Use WaitmsOS() instead of Waitms(); 0: Use Waitms() instead of WaitOSms() */
#endif
#ifndef McuShell_CONFIG_USE_MUTEX
#define McuShell_CONFIG_USE_MUTEX (0)
/*!< 1: use RTOS mutex; 0: do not use RTOS mutex */
#endif
#ifndef McuShell_CONFIG_DEFAULT_SHELL_BUFFER_SIZE
#define McuShell_CONFIG_DEFAULT_SHELL_BUFFER_SIZE (48)
/*!< default buffer size for shell command parsing */
#endif
#ifndef McuShell_CONFIG_DEFAULT_SERIAL
#define McuShell_CONFIG_DEFAULT_SERIAL (0)
/*!< 1: the shell implements its own StdIO which is returned by GetStdio(); 0: The shell does not implement its own standard I/O */
#endif
#if McuShell_CONFIG_DEFAULT_SERIAL
#ifndef McuShell_CONFIG_DEFAULT_SERIAL_INCLUDE
#define McuShell_CONFIG_DEFAULT_SERIAL_INCLUDE "McuSerial.h"
/*!< Include for the functions below */
#endif
#ifndef McuShell_CONFIG_DEFAULT_SERIAL_RECEIVE_FCT_NAME
#define McuShell_CONFIG_DEFAULT_SERIAL_RECEIVE_FCT_NAME McuSerial_RecvChar
/*!< Function name to read a character and returning ERR_OK if it was successful */
#endif
#ifndef McuShell_CONFIG_DEFAULT_SERIAL_SEND_FCT_NAME
#define McuShell_CONFIG_DEFAULT_SERIAL_SEND_FCT_NAME McuSerial_SendChar
/*!< Function name to send a character and returning ERR_OK if it was successful */
#endif
#ifndef McuShell_CONFIG_DEFAULT_SERIAL_RXAVAIL_FCT_NAME
#define McuShell_CONFIG_DEFAULT_SERIAL_RXAVAIL_FCT_NAME McuSerial_GetCharsInRxBuf
/*!< Function name to check if there is anything available to receive and returns TRUE, otherwise FALSE */
#endif
#endif
#ifndef McuShell_CONFIG_PROMPT_STRING
#define McuShell_CONFIG_PROMPT_STRING "CMD> "
#endif
#ifndef McuShell_CONFIG_PROJECT_NAME_STRING
#define McuShell_CONFIG_PROJECT_NAME_STRING "My Project Name"
#endif
#ifndef McuShell_CONFIG_MULTI_CMD_ENABLED
#define McuShell_CONFIG_MULTI_CMD_ENABLED (0) /* 1: enabled, 0: disabled */
#endif
#ifndef McuShell_CONFIG_MULTI_CMD_SIZE
#define McuShell_CONFIG_MULTI_CMD_SIZE (32) /* max size of each command */
#endif
#ifndef McuShell_CONFIG_MULTI_CMD_CHAR
#define McuShell_CONFIG_MULTI_CMD_CHAR ';' /* separation character */
#endif
#ifndef McuShell_CONFIG_HISTORY_ENABLED
#define McuShell_CONFIG_HISTORY_ENABLED (0)
/*!< 1: history enabled with <cursor-up> and <cursor-down>; 0: no history functionality */
#endif
#ifndef McuShell_CONFIG_HISTORY_NOF_ITEMS
#define McuShell_CONFIG_HISTORY_NOF_ITEMS (5)
/*!< number of items in the history */
#endif
#ifndef McuShell_CONFIG_HISTORY_ITEM_LENGTH
#define McuShell_CONFIG_HISTORY_ITEM_LENGTH (32)
/*!< length of a history item */
#endif
#ifndef McuShell_CONFIG_HISTORY_CHAR_PREV
#define McuShell_CONFIG_HISTORY_CHAR_PREV '\e'
/*!< character to go to previous item in history */
#endif
#ifndef McuShell_CONFIG_HISTORY_CHAR_NEXT
#define McuShell_CONFIG_HISTORY_CHAR_NEXT '\t'
/*!< character to go to next item in history */
#endif
#ifndef McuShell_CONFIG_ECHO_ENABLED
#define McuShell_CONFIG_ECHO_ENABLED (0)
/*!< 1: shell implements local echo; 0: no echo functionality
Note that echo needs to be enabled in each I/O too (io->echoEnabled) */
#endif
#ifndef McuShell_CONFIG_STATUS_COLON_POS
#define McuShell_CONFIG_STATUS_COLON_POS (13)
/*!< position of the ':' after the item string for the 'status' command */
#endif
#ifndef McuShell_CONFIG_HELP_SEMICOLON_POS
#define McuShell_CONFIG_HELP_SEMICOLON_POS (26)
/*!< position of the ';' after the command string for the 'help' command */
#endif
#ifndef McuShell_CONFIG_SILENT_PREFIX_CHAR
#define McuShell_CONFIG_SILENT_PREFIX_CHAR '#'
/*!< With this char as first character in the cmd, printing is silent. Use a space to disable it */
#endif
#endif /* __McuShell_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GenericTimeDate
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the generic timc/date module.
*/
#ifndef __McuTimeDate_CONFIG_H
#define __McuTimeDate_CONFIG_H
#ifndef McuTimeDate_CONFIG_PARSE_COMMAND_ENABLED
#define McuTimeDate_CONFIG_PARSE_COMMAND_ENABLED (1)
/*!< set to 1 if method ParseCommand() is present, 0 otherwise */
#endif
#ifndef McuTimeDate_CONFIG_INIT_IN_PE_LOWLEVEL_INIT
#define McuTimeDate_CONFIG_INIT_IN_PE_LOWLEVEL_INIT (1)
/*!< 1: call Init() during Processor Expert LowLevelInit(), 0: application needs to call Init() */
#endif
/* ******************** settings for software RTC ********************************** */
#ifndef McuTimeDate_CONFIG_USE_SOFTWARE_RTC
#define McuTimeDate_CONFIG_USE_SOFTWARE_RTC (1)
/*!< set to 1 if using software RTC, 0 otherwise */
#endif
/* RTC Initialization options during Init() */
#define McuTimeDate_INIT_SOFTWARE_RTC_FROM_DEFAULTS 0 /* init software RTC from default values */
#define McuTimeDate_INIT_SOFTWARE_RTC_FROM_INTERNAL_RTC 1 /* init software RTC from internal RTC values */
#define McuTimeDate_INIT_SOFTWARE_RTC_FROM_EXTERNAL_RTC 2 /* init software RTC from external RTC values */
#ifndef McuTimeDate_CONFIG_INIT_SOFTWARE_RTC_METHOD
#define McuTimeDate_CONFIG_INIT_SOFTWARE_RTC_METHOD McuTimeDate_INIT_SOFTWARE_RTC_FROM_DEFAULTS
/*!< which method to use during Init() */
#endif
/* ****************** settings for internal hardware RTC *************************** */
#ifndef McuTimeDate_CONFIG_USE_INTERNAL_HW_RTC
#define McuTimeDate_CONFIG_USE_INTERNAL_HW_RTC (0)
/*!< set to 1 if using internal HW RTC, 0 otherwise */
#endif
#if McuTimeDate_CONFIG_USE_INTERNAL_HW_RTC
#ifndef McuTimeDate_CONFIG_RTC_PERIPHERAL
#define McuTimeDate_CONFIG_RTC_PERIPHERAL ((RTC_Type *)RTC_BASE)
/*!< Peripheral used by SDK to access RTC */
#endif
#endif
/* ****************** settings for external hardware RTC *************************** */
#ifndef McuTimeDate_CONFIG_USE_EXTERNAL_HW_RTC
#define McuTimeDate_CONFIG_USE_EXTERNAL_HW_RTC (0)
/*!< set to 1 if using external HW RTC driver, 0 otherwise */
#endif
/* ********************************************************************************* */
/* SetTime() and SetDate() configuration */
#ifndef McuTimeDate_CONFIG_SET_TIME_DATE_METHOD_USES_SOFTWARE_RTC
#define McuTimeDate_CONFIG_SET_TIME_DATE_METHOD_USES_SOFTWARE_RTC (1)
/*!< 1: SetTime() and SetDate() write to software RTC. 0: do not use software RTC in SetTime() and SetDate() */
#endif
#ifndef McuTimeDate_CONFIG_SET_TIME_DATE_METHOD_USES_INTERNAL_RTC
#define McuTimeDate_CONFIG_SET_TIME_DATE_METHOD_USES_INTERNAL_RTC (0)
/*!< 1: SetTime() and SetDate() write to internal RTC. 0: do not use internal RTC in SetTime() and SetDate() */
#endif
#ifndef McuTimeDate_CONFIG_SET_TIME_DATE_METHOD_USES_EXTERNAL_RTC
#define McuTimeDate_CONFIG_SET_TIME_DATE_METHOD_USES_EXTERNAL_RTC (1)
/*!< 1: SetTime() and SetDate() write to external RTC. 0: do not use external RTC in SetTime() and SetDate() */
#endif
/* ********************************************************************************* */
/* GetTime() and GetDate() configuration options: */
#define McuTimeDate_GET_TIME_DATE_METHOD_SOFTWARE_RTC 1 /* use software RTC */
#define McuTimeDate_GET_TIME_DATE_METHOD_INTERNAL_RTC 2 /* use internal RTC */
#define McuTimeDate_GET_TIME_DATE_METHOD_EXTERNAL_RTC 3 /* use external RTC */
#ifndef McuTimeDate_CONFIG_USE_GET_TIME_DATE_METHOD
#define McuTimeDate_CONFIG_USE_GET_TIME_DATE_METHOD McuTimeDate_GET_TIME_DATE_METHOD_SOFTWARE_RTC /* specifies method to get time and date */
/*!< specifies method to get time and date */
#endif
/* default time and date format strings */
#ifndef McuTimeDate_CONFIG_DEFAULT_TIME_FORMAT_STR
#define McuTimeDate_CONFIG_DEFAULT_TIME_FORMAT_STR "hh:mm:ss,cc"
#endif
#ifndef McuTimeDate_CONFIG_DEFAULT_DATE_FORMAT_STR
#define McuTimeDate_CONFIG_DEFAULT_DATE_FORMAT_STR "dd.mm.yyyy"
#endif
#ifndef McuTimeDate_CONFIG_TICK_TIME_MS
#define McuTimeDate_CONFIG_TICK_TIME_MS \
(1000/1000) /* Period in milliseconds as defined in RTOS component properties, at which McuTimeDate_AddTick() is called */
#endif
/* date/time defaults: */
/* default time/date values */
#ifndef McuTimeDate_CONFIG_DEFAULT_INITIAL_TIME_HOUR
#define McuTimeDate_CONFIG_DEFAULT_INITIAL_TIME_HOUR 17
#endif
#ifndef McuTimeDate_CONFIG_DEFAULT_INITIAL_TIME_MIN
#define McuTimeDate_CONFIG_DEFAULT_INITIAL_TIME_MIN 51
#endif
#ifndef McuTimeDate_CONFIG_DEFAULT_INITIAL_TIME_SEC
#define McuTimeDate_CONFIG_DEFAULT_INITIAL_TIME_SEC 31
#endif
#ifndef McuTimeDate_CONFIG_DEFAULT_INITIAL_DATE_YEAR
#define McuTimeDate_CONFIG_DEFAULT_INITIAL_DATE_YEAR 2019
#endif
#ifndef McuTimeDate_CONFIG_DEFAULT_INITIAL_DATE_MONTH
#define McuTimeDate_CONFIG_DEFAULT_INITIAL_DATE_MONTH 8
#endif
#ifndef McuTimeDate_CONFIG_DEFAULT_INITIAL_DATE_DAY
#define McuTimeDate_CONFIG_DEFAULT_INITIAL_DATE_DAY 1
#endif
/* interface to external RTC */
#ifndef McuTimeDate_CONFIG_EXT_RTC_HEADER_FILE_NAME
#define McuTimeDate_CONFIG_EXT_RTC_HEADER_FILE_NAME "McuExtRTC.h"
#endif
#ifndef McuTimeDate_CONFIG_EXT_RTC_GET_TIME_FCT
#define McuTimeDate_CONFIG_EXT_RTC_GET_TIME_FCT McuExtRTC_GetTime
/*!< function to get the external RTC time */
#endif
#ifndef McuTimeDate_CONFIG_EXT_RTC_SET_TIME_FCT
#define McuTimeDate_CONFIG_EXT_RTC_SET_TIME_FCT McuExtRTC_SetTime
/*!< function to set the external RTC time */
#endif
#ifndef McuTimeDate_CONFIG_EXT_RTC_GET_DATE_FCT
#define McuTimeDate_CONFIG_EXT_RTC_GET_DATE_FCT McuExtRTC_GetDate
/*!< function to get the external RTC date */
#endif
#ifndef McuTimeDate_CONFIG_EXT_RTC_SET_DATE_FCT
#define McuTimeDate_CONFIG_EXT_RTC_SET_DATE_FCT McuExtRTC_SetDate
/*!< function to get the external RTC date */
#endif
#endif /* __McuTimeDate_CONFIG_H */

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/**
* \file
* \brief Configuration header file for Timeout
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Timeout module.
*/
#ifndef __McuTimeout_CONFIG_H
#define __McuTimeout_CONFIG_H
/* no configuration supported yet */
#endif /* __McuTimeout_CONFIG_H */

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/**
* \file
* \brief Application configuration file for Trigger module
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is a configuration header file to configure the module McuTrigger.
* You can configure the defines directly in this file or with the compiler -D option.
*/
#ifndef __McuTrigger_CONFIG_H
#define __McuTrigger_CONFIG_H
/* no configuration supported yet */
/*! Definition of triggers */
#define McuTrigger_KEY1_PRESS /* key pressed, used by the KEY bean. Format is '<triggerName>_<keyName>_PRESS' */ 0
#define McuTrigger_EXAMPLE /* example trigger */ 1
#define McuTrigger_CONFIG_TICK_PERIOD_MS \
(1000/1000) /* Period in milliseconds as defined in RTOS component properties, at which McuTrigger._AddTick() is called */
#endif /* __McuTrigger_CONFIG_H */

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/*!
* Copyright (c) 2019, Erich Styger
*
* Configuration header file for ULN2003 stepper motor driver
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuULN2003 darlington array module.
*/
#ifndef MCUULN2003_CONFIG_H_
#define MCUULN2003_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "McuLibconfig.h"
#ifndef MCUULN2003_CONFIG_USE_FREERTOS_HEAP
#define MCUULN2003_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS Heap (default), 0: use stdlib malloc() and free() */
#endif
#ifndef McuULN2003_CONFIG_USE_ACCELERATION
#define McuULN2003_CONFIG_USE_ACCELERATION (0)
/*!< 1: stepper motor uses acceleration table; 0: no acceleration table used */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUULN2003_CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for FSL_USB
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Freescale (now NXP) USB Stack module.
*/
#ifndef __McuUSB_CONFIG_H
#define __McuUSB_CONFIG_H
/* no configuration supported yet */
#endif /* __McuUSB_CONFIG_H */

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/*!
* Copyright (c) 2020-2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuUart485 module.
*/
#ifndef MCUUART485CONFIG_H_
#define MCUUART485CONFIG_H_
#include "McuLib.h"
#ifndef McuUart485_CONFIG_USE_RS_485
#define McuUart485_CONFIG_USE_RS_485 (0)
/*!< by default, this module is disabled */
#endif
#ifndef McuUart485_CONFIG_USE_MODBUS
#define McuUart485_CONFIG_USE_MODBUS (0)
/*!< if using the Modbus protocol */
#endif
#ifndef McuUart485_CONFIG_USE_LOGGER
#define McuUart485_CONFIG_USE_LOGGER (0)
/*!< if using a logger in the interrupt RX routine. 0: disabled; 1: enabled */
#endif
#ifndef McuUart485_CONFIG_LOGGER_CALLBACK_NAME
#define McuUart485_CONFIG_LOGGER_CALLBACK_NAME McuRTT_SendChar
/*!< function name to be called to write a char from the logger inside the Rx interrupt */
#endif
extern uint8_t McuUart485_CONFIG_LOGGER_CALLBACK_NAME(uint8_t ch); /* prototype of logger function callback */
#if McuUart485_CONFIG_USE_RS_485
/* UART configuration items */
#if McuLib_CONFIG_CPU_IS_LPC && McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC845
#include "fsl_usart.h"
#ifndef McuUart485_CONFIG_UART_PARITY
#define McuUart485_CONFIG_UART_PARITY kUSART_ParityDisabled /* or kUSART_ParityEven or kUSART_ParityOdd */
#endif
#define McuUart485_CONFIG_UART_DEVICE USART1
#define McuUart485_CONFIG_UART_SET_UART_CLOCK() CLOCK_Select(kUART1_Clk_From_MainClk) /* Select the main clock as source clock of USART0. */
#define McuUart485_CONFIG_UART_WRITE_BLOCKING USART_WriteBlocking
#define McuUart485_CONFIG_UART_GET_FLAGS USART_GetStatusFlags
#define McuUart485_CONFIG_UART_HW_RX_READY_FLAGS (kUSART_RxReady|kUSART_HardwareOverrunFlag)
#define McuUart485_CONFIG_UART_READ_BYTE USART_ReadByte
#define McuUart485_CONFIG_UART_CONFIG_STRUCT usart_config_t
#define McuUart485_CONFIG_UART_GET_DEFAULT_CONFIG USART_GetDefaultConfig
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPTS USART_EnableInterrupts
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUSART_RxReadyInterruptEnable | kUSART_HardwareOverRunInterruptEnable)
#define McuUart485_CONFIG_UART_IRQ_NUMBER USART1_IRQn
#define McuUart485_CONFIG_UART_INIT USART_Init
#define McuUart485_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_MainClk
#define McuUart485_CONFIG_UART_IRQ_HANDLER USART1_IRQHandler
#define McuUart485_CONFIG_CLEAR_STATUS_FLAGS USART_ClearStatusFlags
#elif McuLib_CONFIG_CPU_IS_LPC && McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC55S69
/* using FlexComm1, on LPC55S69-EVK this is on pin 40 (Rx, FC1_RXD_SDA_MOSI_DATA, PIO1_10) and pin 93 (Rx, FC1_TXD_SCL_MISO_WS, PIO1_11) */
#include "fsl_usart.h"
#ifndef McuUart485_CONFIG_UART_PARITY
#define McuUart485_CONFIG_UART_PARITY kUSART_ParityDisabled /* or kUSART_ParityEven or kUSART_ParityOdd */
#endif
#define McuUart485_CONFIG_UART_DEVICE USART1
#define McuUart485_CONFIG_UART_SET_UART_CLOCK() CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1)
#define McuUart485_CONFIG_UART_WRITE_BLOCKING USART_WriteBlocking
#define McuUart485_CONFIG_UART_GET_FLAGS USART_GetStatusFlags
#define McuUart485_CONFIG_UART_HW_RX_READY_FLAGS (kUSART_RxFifoNotEmptyFlag | kUSART_RxError)
#define McuUart485_CONFIG_UART_READ_BYTE USART_ReadByte
#define McuUart485_CONFIG_UART_CONFIG_STRUCT usart_config_t
#define McuUart485_CONFIG_UART_GET_DEFAULT_CONFIG USART_GetDefaultConfig
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPTS USART_EnableInterrupts
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable)
#define McuUart485_CONFIG_UART_IRQ_NUMBER FLEXCOMM1_IRQn
#define McuUart485_CONFIG_UART_INIT USART_Init
#define McuUart485_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_Fro12M
#define McuUart485_CONFIG_UART_IRQ_HANDLER FLEXCOMM1_IRQHandler
#define McuUart485_CONFIG_CLEAR_STATUS_FLAGS USART_ClearStatusFlags
#elif McuLib_CONFIG_CPU_IS_KINETIS
#ifndef McuUart485_CONFIG_UART_PARITY
#define McuUart485_CONFIG_UART_PARITY kUART_ParityDisabled /* or kUART_ParityEven or kUART_ParityOdd */
#endif
#if McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_K22FX
#include "fsl_uart.h"
#define McuUart485_CONFIG_UART_DEVICE UART0
#define McuUart485_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuUart485_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuUart485_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuUart485_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuUart485_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuUart485_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuUart485_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable)
#define McuUart485_CONFIG_UART_IRQ_NUMBER UART0_RX_TX_IRQn
#define McuUart485_CONFIG_UART_INIT UART_Init
#define McuUart485_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_MainClk
#define McuUart485_CONFIG_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
#define McuUart485_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#elif McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_K02FN
#include "fsl_uart.h"
#define McuUart485_CONFIG_UART_DEVICE UART1
#define McuUart485_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuUart485_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuUart485_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuUart485_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuUart485_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuUart485_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuUart485_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable | kUART_RxFifoOverflowInterruptEnable)
#define McuUart485_CONFIG_UART_IRQ_NUMBER UART1_RX_TX_IRQn
#define McuUart485_CONFIG_UART_INIT UART_Init
#define McuUart485_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_McgFllClk
#define McuUart485_CONFIG_UART_IRQ_HANDLER UART1_RX_TX_IRQHandler
#define McuUart485_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#elif McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_K22FN
#include "fsl_uart.h"
#define McuUart485_CONFIG_UART_DEVICE UART0
#define McuUart485_CONFIG_UART_SET_UART_CLOCK() /* nothing needed */
#define McuUart485_CONFIG_UART_WRITE_BLOCKING UART_WriteBlocking
#define McuUart485_CONFIG_UART_GET_FLAGS UART_GetStatusFlags
#define McuUart485_CONFIG_UART_HW_RX_READY_FLAGS (kUART_RxDataRegFullFlag|kUART_RxOverrunFlag)
#define McuUart485_CONFIG_UART_READ_BYTE UART_ReadByte
#define McuUart485_CONFIG_UART_CONFIG_STRUCT uart_config_t
#define McuUart485_CONFIG_UART_GET_DEFAULT_CONFIG UART_GetDefaultConfig
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPTS UART_EnableInterrupts
#define McuUart485_CONFIG_UART_ENABLE_INTERRUPT_FLAGS (kUART_RxDataRegFullInterruptEnable | kUART_RxOverrunInterruptEnable | kUART_RxFifoOverflowInterruptEnable)
#define McuUart485_CONFIG_UART_IRQ_NUMBER UART0_RX_TX_IRQn
#define McuUart485_CONFIG_UART_INIT UART_Init
#define McuUart485_CONFIG_UART_GET_CLOCK_FREQ_SELECT kCLOCK_PllFllSelClk
#define McuUart485_CONFIG_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
#define McuUart485_CONFIG_CLEAR_STATUS_FLAGS UART_ClearStatusFlags
#endif
#elif McuLib_CONFIG_CPU_IS_ESP32
#include "driver/uart.h"
#ifndef McuUart485_CONFIG_UART_DEVICE
#define McuUart485_CONFIG_UART_DEVICE UART_NUM_2
#endif
#ifndef McuUart485_CONFIG_TXD_PIN
#define McuUart485_CONFIG_TXD_PIN GPIO_NUM_4
#endif
#ifndef McuUart485_CONFIG_RXD_PIN
#define McuUart485_CONFIG_RXD_PIN GPIO_NUM_5
#endif
#ifndef McuUart485_CONFIG_RTS_PIN
#define McuUart485_CONFIG_RTS_PIN GPIO_NUM_23 /* RTS, ~RE for RS485, managed by UART */
#endif
#ifndef McuUart485_CONFIG_CTS_PIN
#define McuUart485_CONFIG_CTS_PIN (/*GPIO_NUM_26*//*not used*/) /* CTS, DE for RS485, but not used! RE/DE must be wired together on the hardware */
#endif
#elif McuLib_CONFIG_CPU_IS_RPxxxx
#include "hardware/uart.h"
#ifndef McuUart485_CONFIG_UART_DEVICE
#define McuUart485_CONFIG_UART_DEVICE uart1
#endif
#ifndef McuUart485_CONFIG_TXD_PIN
#define McuUart485_CONFIG_TXD_PIN (4u)
#endif
#ifndef McuUart485_CONFIG_RXD_PIN
#define McuUart485_CONFIG_RXD_PIN (5u)
#endif
#ifndef McuUart485_CONFIG_RTS_PIN
#define McuUart485_CONFIG_RTS_PIN (3u) /* RTS, ~RE for RS485 */
#endif
#ifndef McuUart485_CONFIG_CTS_PIN
#define McuUart485_CONFIG_CTS_PIN (3u) /* CTS, DE for RS485! */
#endif
#ifndef McuUart485_CONFIG_UART_WRITE_BLOCKING
#define McuUart485_CONFIG_UART_WRITE_BLOCKING uart_write_blocking
#endif
#ifndef McuUart485_CONFIG_UART_PARITY
#define McuUart485_CONFIG_UART_PARITY UART_PARITY_NONE /* UART_PARITY_NONE, UART_PARITY_EVEN, UART_PARITY_ODD */
#endif
#ifndef McuUart485_CONFIG_UART_READ_BYTE
#define McuUart485_CONFIG_UART_READ_BYTE uart_getc
#endif
#else
/* you have to put your configuration here */
#endif
#if McuLib_CONFIG_CPU_IS_LPC && McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC845
#define McuUart485_CONFIG_HAS_FIFO (0) /* no FIFO support on LPC845 */
#elif McuLib_CONFIG_CPU_IS_KINETIS
#define McuUart485_CONFIG_HAS_FIFO (1) /* UART0 on Kinetis has FIFO */
#elif McuLib_CONFIG_CPU_IS_ESP32
#define McuUart485_CONFIG_HAS_FIFO (0) /* no FIFO support on ESP32 */
#endif
#ifndef McuUart485_CONFIG_UART_RX_QUEUE_LENGTH
#define McuUart485_CONFIG_UART_RX_QUEUE_LENGTH (3*1024)
/*!< Queue length to buffer incoming data and messages */
#endif
#ifndef McuUart485_CONFIG_UART_RESPONSE_QUEUE_LENGTH
#define McuUart485_CONFIG_UART_RESPONSE_QUEUE_LENGTH (96)
/*!< Queue length to check the OK from the other side */
#endif
#ifndef McuUart485_CONFIG_UART_BAUDRATE
#define McuUart485_CONFIG_UART_BAUDRATE 115200
#endif
#ifndef McuUart485_CONFIG_USE_HW_OE_RTS
#if McuLib_CONFIG_CPU_IS_KINETIS
#define McuUart485_CONFIG_USE_HW_OE_RTS (1) /* 1: Use e.g. on LPC845 OESEL (Output Enable Selection) feature. Note that the pin has to be configured in the PinMuxing as RTS! */
#elif McuLib_CONFIG_CPU_IS_ESP32
#define McuUart485_CONFIG_USE_HW_OE_RTS (1) /* on ESP32, the transceiver is controlled by the UART directly with the RTS pin */
#elif McuLib_CONFIG_CPU_IS_LPC && McuLib_CONFIG_CPU_VARIANT==McuLib_CONFIG_CPU_VARIANT_NXP_LPC845
#define McuUart485_CONFIG_USE_HW_OE_RTS (1) /* 1: Use e.g. on LPC845 OESEL (Output Enable Selection) feature. Note that the pin has to be configured in the PinMuxing as RTS! */
#elif McuLib_CONFIG_CPU_IS_LPC55xx
#define McuUart485_CONFIG_USE_HW_OE_RTS (0) /* if using the RTS function of the UART or not */
#elif McuLib_CONFIG_CPU_IS_RPxxxx
#define McuUart485_CONFIG_USE_HW_OE_RTS (0) /* on RP2040, need to control RE/DE pin manually */
#endif
#endif
#if !McuUart485_CONFIG_USE_HW_OE_RTS
/* RTS pin to enable Tx mode on transceiver (HIGH active) */
#if McuLib_CONFIG_CPU_IS_KINETIS /* default for Kinetis */
#ifndef McuUart485_CONFIG_TX_EN_GPIO
#define McuUart485_CONFIG_TX_EN_GPIO GPIOC
#endif
#ifndef McuUart485_CONFIG_TX_EN_PORT
#define McuUart485_CONFIG_TX_EN_PORT PORTC
#endif
#ifndef McuUart485_CONFIG_TX_EN_PIN
#define McuUart485_CONFIG_TX_EN_PIN 2U
#endif
#elif McuLib_CONFIG_CPU_IS_LPC55xx
/* default: pin 92 on LPC55S69-EVK, routed as FC1_I2C_SCL */
#ifndef McuUart485_CONFIG_TX_EN_GPIO
#define McuUart485_CONFIG_TX_EN_GPIO GPIO
#endif
#ifndef McuUart485_CONFIG_TX_EN_PORT
#define McuUart485_CONFIG_TX_EN_PORT 0
#endif
#ifndef McuUart485_CONFIG_TX_EN_PIN
#define McuUart485_CONFIG_TX_EN_PIN 14U
#endif
#elif McuLib_CONFIG_CPU_IS_ESP32 /* default for ESP32 */
#ifndef McuUart485_CONFIG_RE_PIN
#define McuUart485_CONFIG_RE_PIN (McuUart485_CONFIG_CTS_PIN) /* ~DE_ESP32 pin: DE (Data Enable) is low active */
#endif
#elif McuLib_CONFIG_CPU_IS_RPxxxx
#ifndef McuUart485_CONFIG_RE_PIN
#define McuUart485_CONFIG_TX_EN_PIN (McuUart485_CONFIG_CTS_PIN) /* ~DE_ESP32 pin: DE (Data Enable) is low active */
#endif
#endif
#endif
#endif /* McuUart485_CONFIG_USE_RS_485 */
#endif /* MCUUART485CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for Utility
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Utility module.
*/
#ifndef __McuUtility_CONFIG_H
#define __McuUtility_CONFIG_H
/* no configuration supported yet */
#endif /* __McuUtility_CONFIG_H */

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/*!
* Copyright (c) 2022, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuW25Q128 Winbond Flash module.
*/
#ifndef MCUW25Q128CONFIG_H_
#define MCUW25Q128CONFIG_H_
#ifndef MCUW25Q128_CONFIG_ENABLED
#define MCUW25Q128_CONFIG_ENABLED (0)
/*!< By default, the module is disabled. Enable it with 1 */
#endif
#ifndef MCUW25Q128_CONFIG_SIZE_KBYTES
#define MCUW25Q128_CONFIG_SIZE_KBYTES (16*1024)
/*!< Size in KBytes. By default it uses the 128MBit (16 MByte) version */
#endif
#if MCUW25Q128_CONFIG_ENABLED
#include "McuSPI.h"
/* W25Q128 chip select is LOW active */
#define McuW25_CONFIG_CS_ENABLE() McuSPI_SetCS_Low()
#define McuW25_CONFIG_CS_DISABLE() McuSPI_SetCS_High()
#endif /* MCUW25Q128_CONFIG_ENABLED */
#endif /* MCUW25Q128CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for Wait
* Copyright (c) 2020-2024, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the busy waiting module.
*/
#ifndef __McuWait_CONFIG_H
#define __McuWait_CONFIG_H
#include "McuLib.h" /* include library configuration */
#ifndef McuWait_CONFIG_USE_CYCLE_COUNTER
#define McuWait_CONFIG_USE_CYCLE_COUNTER (1 && (McuLib_CONFIG_CPU_IS_ARM_CORTEX_M && McuLib_CONFIG_CORTEX_M>=3))
/*!< 1: Use hardware cycle counter (if present, only on Cortex-M3 or higher), 0: not using hardware cycle counter */
#endif
#ifndef McuWait_CONFIG_NOF_CYCLES_FOR_NOP_MUL
#define McuWait_CONFIG_NOF_CYCLES_FOR_NOP_MUL (1)
/*!< by default, use a single cycle for a NOP instruction. Some devices like the LPC804 need more. This factor gets it multiplied, see McuWait_CONFIG_NOF_CYCLES_FOR_NOP_DIV. */
#endif
#ifndef McuWait_CONFIG_NOF_CYCLES_FOR_NOP_DIV
#define McuWait_CONFIG_NOF_CYCLES_FOR_NOP_DIV (1)
/*!< by default, use a single cycle for a NOP instruction. Some devices like the LPC804 need more. This factor gets it divided, see McuWait_CONFIG_NOF_CYCLES_FOR_NOP_MUL. */
#endif
#ifndef McuWait_CONFIG_USE_RTOS_WAIT
#define McuWait_CONFIG_USE_RTOS_WAIT (1 && McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: Use RTOS wait if RTOS is present; 0: use normal busy waiting */
#endif
#if McuWait_CONFIG_USE_CYCLE_COUNTER
#include "McuArmTools.h" /* include Cortex utility functions */
#endif
#endif /* __McuWait_CONFIG_H */

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/*!
* Copyright (c) 2023, Erich Styger
*
* SPDX-License-Identifier: BSD-3-Clause
* \file
* \brief Configuration items for the McuWatchdog module.
*/
#ifndef MCUWATCHDOG_CONFIG_H_
#define MCUWATCHDOG_CONFIG_H_
#ifndef McuWatchdog_CONFIG_USE_WATCHDOG
#define McuWatchdog_CONFIG_USE_WATCHDOG (0)
/*!< if using the McuWatchdog module */
#endif
#ifndef McuWatchdog_CONFIG_HEALT_CHECK_TIME_SEC
#define McuWatchdog_CONFIG_HEALT_CHECK_TIME_SEC (5) /*!< interval for checking health */
#endif
#ifndef McuWatchdog_CONFIG_TIMEOUT_MS
#define McuWatchdog_CONFIG_TIMEOUT_MS (1000) /*!< number of ms for hardware watchdog timer */
#endif
#ifndef McuWatchdog_CONFIG_DISABLED_FOR_DEBUG
#define McuWatchdog_CONFIG_DISABLED_FOR_DEBUG (0) /* set to 1 for easier debugging, set to 0 for production code! */
#endif
#ifndef McuWatchdog_CONFIG_REPORT_TIME_VALUES
#define McuWatchdog_CONFIG_REPORT_TIME_VALUES (0) /* 1: report time values during safety check, useful for debugging */
#endif
#ifndef McuWatchdog_CONFIG_REPORT_ID_INCLUDE_FILE
#define McuWatchdog_CONFIG_REPORT_ID_INCLUDE_FILE "McuWatchdog_IDs.inc"
/*!< file with watchdog IDs (enumeration values) with McuWatchdog_REPORT_IDS macro */
#endif
#ifndef McuWatchdog_CONFIG_REPORT_ID_INCLUDE_HEADER_FILE
#define McuWatchdog_CONFIG_REPORT_ID_INCLUDE_HEADER_FILE "platform.h"
/*!< header file which is used for the watchdog IDs */
#endif
#endif /* MCUWATCHDOG_CONFIG_H_ */

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/*!
* Copyright (c) 2019, Erich Styger
* \file
* \brief Configuration header file for X12.017 quad-stepper motor driver.
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef MCU_X12_017_CONFIG_H_
#define MCU_X12_017_CONFIG_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "McuLibconfig.h"
#ifndef McuX12_017_CONFIG_USE_FREERTOS_HEAP
#define McuX12_017_CONFIG_USE_FREERTOS_HEAP (McuLib_CONFIG_SDK_USE_FREERTOS)
/*!< 1: use FreeRTOS Heap (default), 0: use stdlib malloc() and free() */
#endif
#ifndef McuX12_017_CONFIG_QUAD_DRIVER
#define McuX12_017_CONFIG_QUAD_DRIVER (1)
/*!< 1: Quad driver version; 0: Dual driver version */
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCU_X12_017_CONFIG_H_ */

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/**
* \file
* \brief Configuration header file for XFormat
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the XFormat module.
*/
#ifndef __McuXFormat_CONFIG_H
#define __McuXFormat_CONFIG_H
#ifndef McuXFormat_CONFIG_XCFG_FORMAT_FLOAT
#define XCFG_FORMAT_FLOAT 1 /* 1: enable, 0: disable floating format (component property) */
#endif
#ifndef McuXFormat_CONFIG_XCFG_FORMAT_FLOAT
#define XCFG_FORMAT_STATIC /* static */ /* used for the buffer. WARNING: using 'static' makes it non-reentrant! */
#endif
/**
* MSVC use in x64 model IL32P64 architecture so the largest integer
* is not a standard C integer.
*/
#if defined(_MSC_VER) && defined(_M_AMD64)
#define LONG long long
#define XCFG_FORMAT_LONG_ARE_LONGLONG
#endif
/**
* SDCC support only float and for now do not support long long
*/
#ifdef __SDCC
#define DOUBLE float
#ifndef XCFG_FORMAT_LONGLONG
#define XCFG_FORMAT_LONGLONG 0
#endif
#endif
/**
* Define internal parameters as volatile for 8 bit cpu define
* XCFG_FORMAT_STATIC=static to reduce stack usage.
*/
#ifndef XCFG_FORMAT_STATIC
#define XCFG_FORMAT_STATIC
#endif
/**
* Define XCFG_FORMAT_FLOAT=0 to remove floating point support
*/
#ifndef XCFG_FORMAT_FLOAT
#define XCFG_FORMAT_FLOAT 0
#endif
/**
* Detect support for va_copy this macro must be called for example
* in x86_64 machine to adjust the stack frame when an argument of va_list
* is passed over functions.
*/
#ifndef XCFG_FORMAT_VA_COPY
#if defined(__GNUC__) && defined(__x86_64__)
#define XCFG_FORMAT_VA_COPY 1
#endif
#ifndef XCFG_FORMAT_VA_COPY
#define XCFG_FORMAT_VA_COPY 0
#endif
#endif
/**
* Define to 0 to support long long type (prefix ll)
*/
#ifndef XCFG_FORMAT_LONGLONG
#define XCFG_FORMAT_LONGLONG 0
#endif
#endif /* __McuXFormat_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __Output1_CONFIG_H
#define __Output1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_Output1_PIN)
#define Output1_CONFIG_PIN_NUMBER BOARD_INITPINS_Output1_PIN
#endif
#if defined(BOARD_INITPINS_Output1_GPIO)
#define Output1_CONFIG_GPIO_NAME BOARD_INITPINS_Output1_GPIO
#endif
#if defined(BOARD_INITPINS_Output1_PORT)
#define Output1_CONFIG_PORT_NAME BOARD_INITPINS_Output1_PORT
#endif
#endif
#ifndef Output1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define Output1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define Output1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define Output1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef Output1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define Output1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define Output1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define Output1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define Output1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define Output1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef Output1_CONFIG_PIN_NUMBER
#define Output1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef Output1_CONFIG_PIN_SYMBOL
#define Output1_CONFIG_PIN_SYMBOL LED_RED
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef Output1_CONFIG_INIT_PIN_VALUE
#define Output1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define Output1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define Output1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define Output1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef Output1_CONFIG_INIT_PIN_DIRECTION
#define Output1_CONFIG_INIT_PIN_DIRECTION Output1_CONFIG_INIT_PIN_DIRECTION_INPUT
#endif
#ifndef Output1_CONFIG_DO_PIN_MUXING
#define Output1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef Output1_CONFIG_PULL_RESISTOR
#define Output1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __Output1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __SCL1_CONFIG_H
#define __SCL1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_SCL1_PIN)
#define SCL1_CONFIG_PIN_NUMBER BOARD_INITPINS_SCL1_PIN
#endif
#if defined(BOARD_INITPINS_SCL1_GPIO)
#define SCL1_CONFIG_GPIO_NAME BOARD_INITPINS_SCL1_GPIO
#endif
#if defined(BOARD_INITPINS_SCL1_PORT)
#define SCL1_CONFIG_PORT_NAME BOARD_INITPINS_SCL1_PORT
#endif
#endif
#ifndef SCL1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define SCL1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define SCL1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define SCL1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef SCL1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define SCL1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define SCL1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define SCL1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define SCL1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define SCL1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef SCL1_CONFIG_PIN_NUMBER
#define SCL1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef SCL1_CONFIG_PIN_SYMBOL
#define SCL1_CONFIG_PIN_SYMBOL I2C_SCL
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef SCL1_CONFIG_INIT_PIN_VALUE
#define SCL1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define SCL1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define SCL1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define SCL1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef SCL1_CONFIG_INIT_PIN_DIRECTION
#define SCL1_CONFIG_INIT_PIN_DIRECTION SCL1_CONFIG_INIT_PIN_DIRECTION_INPUT
#endif
#ifndef SCL1_CONFIG_DO_PIN_MUXING
#define SCL1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef SCL1_CONFIG_PULL_RESISTOR
#define SCL1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __SCL1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __SDA1_CONFIG_H
#define __SDA1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_SDA1_PIN)
#define SDA1_CONFIG_PIN_NUMBER BOARD_INITPINS_SDA1_PIN
#endif
#if defined(BOARD_INITPINS_SDA1_GPIO)
#define SDA1_CONFIG_GPIO_NAME BOARD_INITPINS_SDA1_GPIO
#endif
#if defined(BOARD_INITPINS_SDA1_PORT)
#define SDA1_CONFIG_PORT_NAME BOARD_INITPINS_SDA1_PORT
#endif
#endif
#ifndef SDA1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define SDA1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define SDA1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define SDA1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef SDA1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define SDA1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define SDA1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define SDA1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define SDA1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define SDA1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef SDA1_CONFIG_PIN_NUMBER
#define SDA1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef SDA1_CONFIG_PIN_SYMBOL
#define SDA1_CONFIG_PIN_SYMBOL I2C_SDA
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef SDA1_CONFIG_INIT_PIN_VALUE
#define SDA1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define SDA1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define SDA1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define SDA1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef SDA1_CONFIG_INIT_PIN_DIRECTION
#define SDA1_CONFIG_INIT_PIN_DIRECTION SDA1_CONFIG_INIT_PIN_DIRECTION_INPUT
#endif
#ifndef SDA1_CONFIG_DO_PIN_MUXING
#define SDA1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef SDA1_CONFIG_PULL_RESISTOR
#define SDA1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __SDA1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for SDK_BitIO
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the SDK Bit I/O module.
*/
#ifndef __WPpin1_CONFIG_H
#define __WPpin1_CONFIG_H
#if McuLib_CONFIG_SDK_VERSION_USED == McuLib_CONFIG_SDK_MCUXPRESSO_2_0
#include "pin_mux.h" /* include pin muxing header file */
#if defined(BOARD_INITPINS_WPpin1_PIN)
#define WPpin1_CONFIG_PIN_NUMBER BOARD_INITPINS_WPpin1_PIN
#endif
#if defined(BOARD_INITPINS_WPpin1_GPIO)
#define WPpin1_CONFIG_GPIO_NAME BOARD_INITPINS_WPpin1_GPIO
#endif
#if defined(BOARD_INITPINS_WPpin1_PORT)
#define WPpin1_CONFIG_PORT_NAME BOARD_INITPINS_WPpin1_PORT
#endif
#endif
#ifndef WPpin1_CONFIG_PORT_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define WPpin1_CONFIG_PORT_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define WPpin1_CONFIG_PORT_NAME 0
#else /* name from properties */
#define WPpin1_CONFIG_PORT_NAME PORTA
#endif
/*!< name of PORT, is pointer to PORT_Type */
#endif
#ifndef WPpin1_CONFIG_GPIO_NAME
#if McuLib_CONFIG_CPU_IS_IMXRT
#define WPpin1_CONFIG_GPIO_NAME GPIO1
#elif McuLib_CONFIG_CPU_IS_LPC
#define WPpin1_CONFIG_GPIO_NAME GPIO
#elif McuLib_CONFIG_CPU_IS_KINETIS && McuLib_CONFIG_IS_KINETIS_KE
#define WPpin1_CONFIG_GPIO_NAME 0
#elif McuLib_CONFIG_CPU_IS_MCX
#define WPpin1_CONFIG_GPIO_NAME GPIO0
#else /* name from properties */
#define WPpin1_CONFIG_GPIO_NAME GPIOA
#endif
/*!< name of GPIO, is pointer to GPIO_Type, not used for S32K SDK */
#endif
#ifndef WPpin1_CONFIG_PIN_NUMBER
#define WPpin1_CONFIG_PIN_NUMBER 0u
/*!< number of pin, type unsigned integer */
#endif
#ifndef WPpin1_CONFIG_PIN_SYMBOL
#define WPpin1_CONFIG_PIN_SYMBOL WP_24AA
/*!< symbolic name for pin, used for NXP SDK V1.3 */
#endif
#ifndef WPpin1_CONFIG_INIT_PIN_VALUE
#define WPpin1_CONFIG_INIT_PIN_VALUE 0
/*!< 0: Pin data is initialized with 0 (low); 1: pin value is initialized with 1 (high) */
#endif
/* different types of pin direction settings */
#define WPpin1_CONFIG_INIT_PIN_DIRECTION_NONE (0)
#define WPpin1_CONFIG_INIT_PIN_DIRECTION_INPUT (1)
#define WPpin1_CONFIG_INIT_PIN_DIRECTION_OUTPUT (2)
#ifndef WPpin1_CONFIG_INIT_PIN_DIRECTION
#define WPpin1_CONFIG_INIT_PIN_DIRECTION WPpin1_CONFIG_INIT_PIN_DIRECTION_OUTPUT
#endif
#ifndef WPpin1_CONFIG_DO_PIN_MUXING
#define WPpin1_CONFIG_DO_PIN_MUXING 0
/*!< 1: perform pin muxing in Init(), 0: do not do pin muxing */
#endif
#ifndef WPpin1_CONFIG_PULL_RESISTOR
#define WPpin1_CONFIG_PULL_RESISTOR 0
/*!< pull resistor setting. 0: no pull resistor, 1: pull-up, 2: pull-down, 3: pull-up or no pull, 4: pull-down or no pull: 4: autoselect-pull */
#endif
#endif /* __WPpin1_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour08Bold_CONFIG_H
#define __McuFontCour08Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour08Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour08Normal_CONFIG_H
#define __McuFontCour08Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour08Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour10Bold_CONFIG_H
#define __McuFontCour10Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour10Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour10Normal_CONFIG_H
#define __McuFontCour10Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour10Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour12Bold_CONFIG_H
#define __McuFontCour12Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour12Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour12Normal_CONFIG_H
#define __McuFontCour12Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour12Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour14Bold_CONFIG_H
#define __McuFontCour14Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour14Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour14Normal_CONFIG_H
#define __McuFontCour14Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour14Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour18Bold_CONFIG_H
#define __McuFontCour18Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour18Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour18Normal_CONFIG_H
#define __McuFontCour18Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour18Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour24Bold_CONFIG_H
#define __McuFontCour24Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour24Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontCour24Normal_CONFIG_H
#define __McuFontCour24Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontCour24Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv08Bold_CONFIG_H
#define __McuFontHelv08Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv08Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv08Normal_CONFIG_H
#define __McuFontHelv08Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv08Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv10Bold_CONFIG_H
#define __McuFontHelv10Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv10Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv10Normal_CONFIG_H
#define __McuFontHelv10Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv10Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv12Bold_CONFIG_H
#define __McuFontHelv12Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv12Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv12Normal_CONFIG_H
#define __McuFontHelv12Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv12Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv14Bold_CONFIG_H
#define __McuFontHelv14Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv14Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv14Normal_CONFIG_H
#define __McuFontHelv14Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv14Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv18Bold_CONFIG_H
#define __McuFontHelv18Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv18Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv18Normal_CONFIG_H
#define __McuFontHelv18Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv18Normal_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv24Bold_CONFIG_H
#define __McuFontHelv24Bold_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv24Bold_CONFIG_H */

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/**
* \file
* \brief Configuration header file for GFont
* Copyright (c) 2020, Erich Styger
* SPDX-License-Identifier: BSD-3-Clause
*
* This header file is used to configure settings of the Graphical Font module.
*/
#ifndef __McuFontHelv24Normal_CONFIG_H
#define __McuFontHelv24Normal_CONFIG_H
/* no configuration supported yet */
#endif /* __McuFontHelv24Normal_CONFIG_H */