177 lines
6.6 KiB
C
177 lines
6.6 KiB
C
/*!
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* Copyright (c) 2022, Erich Styger
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* \file
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* \brief Configuration items for the McuSPI module.
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*/
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#ifndef MCUSPICONFIG_H_
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#define MCUSPICONFIG_H_
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/* different hardware pre-configurations */
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#define MCUSPI_CONFIG_HW_TEMPLATE_NONE 0
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#define MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI0 1
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#define MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI1 2
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#define MCUSPI_CONFIG_HW_TEMPLATE_LPC55S16_FC3 3
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#define MCUSPI_CONFIG_HW_TEMPLATE_LPC55S59_FC8 4
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#define MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI0 5
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#define MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI1 6
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#define MCUSPI_CONFIG_HW_TEMPLATE_ESP32_SPI3 7
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/* NOTE: Pin muxing for the MISO/MOSI/CLK has to be done in the pins tool! */
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#ifndef MCUSPI_CONFIG_USE_CS
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#define MCUSPI_CONFIG_USE_CS (1)
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/*!< 1: use and initialize CS pin; 0: CS pin is handled by the application */
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#endif
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#ifndef MCUSPI_CONFIG_HW_TEMPLATE
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#define MCUSPI_CONFIG_HW_TEMPLATE MCUSPI_CONFIG_HW_TEMPLATE_NONE
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#endif
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#if MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI0
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI0
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC DSPI0_CLK_SRC
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFreq(DSPI0_CLK_SRC)
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#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_INIT kDSPI_Pcs1
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#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_TRANSFER kDSPI_MasterPcs1 /* note that this is actually not used: the CS pin below is used instead */
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIOD
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#define MCUSPI_CONFIG_HW_CS_PORT PORTD
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#define MCUSPI_CONFIG_HW_CS_PIN 4
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() \
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CLOCK_EnableClock(kCLOCK_PortD);
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#endif
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_KINETIS_K22_SPI1
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI1
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC DSPI1_CLK_SRC
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFreq(DSPI1_CLK_SRC)
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#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_INIT kDSPI_Pcs1
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#define MCUSPI_CONFIG_HW_SPI_MASTER_PCS_FOR_TRANSFER kDSPI_MasterPcs1 /* note that this is actually not used: the CS pin below is used instead */
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIOB
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#define MCUSPI_CONFIG_HW_CS_PORT PORTB
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#define MCUSPI_CONFIG_HW_CS_PIN 18
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() \
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CLOCK_EnableClock(kCLOCK_PortB);
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#endif
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_LPC55S16_FC3
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/* FC3_SPI_SCK, P0_6
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* FC3_SPI_SSEL0, P0_4
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* FC3_SPI_MOSI, P0_3
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* FC3_SPI_MISO, P0_2
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*/
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI3
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#define MCUSPI_CONFIG_HW_SPI_MASTER_IRQ FLEXCOMM3_IRQn
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC kCLOCK_Flexcomm3
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFlexCommClkFreq(3U)
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#define MCUSPI_CONFIG_HW_SPI_SSEL 1
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#define MCUSPI_CONFIG_HW_SPI_SPOL kSPI_SpolActiveAllLow
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#define MCUSPI_CONFIG_HW_SPI_INIT() \
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7); /* attach 12 MHz clock to SPI3 */ \
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RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn); /* reset FLEXCOMM for SPI */
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIO
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#define MCUSPI_CONFIG_HW_CS_PORT 0
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#define MCUSPI_CONFIG_HW_CS_PIN 4
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
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#endif
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_LPC55S59_FC8
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#define MCUSPI_CONFIG_HW_SPI_MASTER SPI8
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#define MCUSPI_CONFIG_HW_SPI_MASTER_IRQ FLEXCOMM8_IRQn
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_SRC kCLOCK_Flexcomm8
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#define MCUSPI_CONFIG_HW_SPI_MASTER_CLK_FREQ CLOCK_GetFlexCommClkFreq(8U)
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#define MCUSPI_CONFIG_HW_SPI_SSEL 1
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#define MCUSPI_CONFIG_HW_SPI_SPOL kSPI_SpolActiveAllLow
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#define MCUSPI_CONFIG_HW_SPI_INIT() \
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CLOCK_AttachClk(kFRO12M_to_FLEXCOMM8); /* attach 12 MHz clock to SPI8 */ \
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RESET_PeripheralReset(kFC8_RST_SHIFT_RSTn); /* reset FLEXCOMM for SPI */
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#define MCUSPI_CONFIG_HW_CS_GPIO GPIO
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#define MCUSPI_CONFIG_HW_CS_PORT 0
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#define MCUSPI_CONFIG_HW_CS_PIN 4
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
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#endif
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI0
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#ifndef MCUSPI_CONFIG_HW_SCLK_PIN
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#define MCUSPI_CONFIG_HW_SCLK_PIN (18) /* SPI0_SCK */
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#endif
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#ifndef MCUSPI_CONFIG_HW_MOSI_PIN
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#define MCUSPI_CONFIG_HW_MOSI_PIN (19) /* SPI0_TX */
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#endif
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#ifndef MCUSPI_CONFIG_HW_MISO_PIN
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#define MCUSPI_CONFIG_HW_MISO_PIN (16) /* SPI0_RX */
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#endif
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#ifndef MCUSPI_CONFIG_HW_CS_PIN
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#define MCUSPI_CONFIG_HW_CS_PIN (17) /* SPI0_CSn */
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#endif
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#ifndef MCUSPI_CONFIG_HW_SPI_INIT
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#define MCUSPI_CONFIG_HW_SPI_INIT() /* nothing */
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#endif
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
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#endif
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_RP2040_SPI1
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#ifndef MCUSPI_CONFIG_HW_SCLK_PIN
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#define MCUSPI_CONFIG_HW_SCLK_PIN (10) /* SPI1_SCK */
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#endif
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#ifndef MCUSPI_CONFIG_HW_MOSI_PIN
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#define MCUSPI_CONFIG_HW_MOSI_PIN (11) /* SPI1_TX */
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#endif
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#ifndef MCUSPI_CONFIG_HW_MISO_PIN
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#define MCUSPI_CONFIG_HW_MISO_PIN (12) /* SPI1_RX */
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#endif
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#ifndef MCUSPI_CONFIG_HW_CS_PIN
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#define MCUSPI_CONFIG_HW_CS_PIN (13) /* SPI1_CSn */
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#endif
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#ifndef MCUSPI_CONFIG_HW_SPI_INIT
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#define MCUSPI_CONFIG_HW_SPI_INIT() /* nothing */
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#endif
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
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#endif
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#elif MCUSPI_CONFIG_HW_TEMPLATE==MCUSPI_CONFIG_HW_TEMPLATE_ESP32_SPI3
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/* SPI3, commonly referred as VSPI */
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#ifndef MCUSPI_CONFIG_HW_SCLK_PIN
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#define MCUSPI_CONFIG_HW_SCLK_PIN (GPIO_NUM_18) /* VSPI, IO18 */
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#endif
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#ifndef MCUSPI_CONFIG_HW_MOSI_PIN
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#define MCUSPI_CONFIG_HW_MOSI_PIN (GPIO_NUM_23) /* VSPI, IO23 */
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#endif
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#ifndef MCUSPI_CONFIG_HW_MISO_PIN
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#define MCUSPI_CONFIG_HW_MISO_PIN (GPIO_NUM_19) /* VSPI, IO19 */
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#endif
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#ifndef MCUSPI_CONFIG_HW_CS_PIN
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#define MCUSPI_CONFIG_HW_CS_PIN (GPIO_NUM_5) /* VSPI, IO5 */
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#endif
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#ifndef MCUSPI_CONFIG_HW_SPI_INIT
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#define MCUSPI_CONFIG_HW_SPI_INIT() /* nothing */
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#endif
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#ifndef MCUSPI_CONFIG_HW_CS_INIT
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#define MCUSPI_CONFIG_HW_CS_INIT() /* nothing */
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#endif
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#endif /* MCUSPI_CONFIG_HW_TEMPLATE */
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#ifndef MCUSPI_CONFIG_TRANSFER_BAUDRATE
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#define MCUSPI_CONFIG_TRANSFER_BAUDRATE 500000U /*! Transfer baudrate - 500k */
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#endif
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#endif /* MCUSPICONFIG_H_ */
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