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add trigger + shift register + coeff

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This commit is contained in:
Rémi Heredero
2024-03-08 16:16:59 +01:00
parent 5c9f884e2f
commit cf05b0a7f9
8 changed files with 85 additions and 15 deletions
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27
02-SplineInterpolator/SplineInterpolator/hdl/interpolatorShiftRegister_studentVersion.vhd
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@ -1,7 +1,26 @@
ARCHITECTURE studentVersion OF interpolatorShiftRegister IS
subtype sample_type is signed(sampleIn'range);
type samples_type is array (1 to 4) of sample_type;
signal samples: samples_type;
BEGIN
sample1 <= (others => '0');
sample2 <= (others => '0');
sample3 <= (others => '0');
sample4 <= (others => '0');
process(clock, reset) begin
if reset = '1' then
samples <= (others => (others => '0'));
elsif rising_edge(clock) then
if shiftSamples then
for i in samples_type'low to samples_type'high-1 loop
samples(i+1) <= samples(i);
end loop;
samples(1) <= sampleIn;
end if;
end if;
end process;
sample1 <= samples(1);
sample2 <= samples(2);
sample3 <= samples(3);
sample4 <= samples(4);
END ARCHITECTURE studentVersion;