Initial commit

02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCalculatePolynom_studentVersion.vhd

@@ -0,0 +1,4 @@
+ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS
+BEGIN
+  sampleOut <= (others => '0');
+END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCoefficients_studentVersion.vhd

@@ -0,0 +1,7 @@
+ARCHITECTURE studentVersion OF interpolatorCoefficients IS
+BEGIN
+  a <= (others => '0');
+  b <= (others => '0');
+  c <= (others => '0');
+  d <= (others => '0');
+END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hdl/interpolatorShiftRegister_studentVersion.vhd

@@ -0,0 +1,7 @@
+ARCHITECTURE studentVersion OF interpolatorShiftRegister IS
+BEGIN
+  sample1 <= (others => '0');
+  sample2 <= (others => '0');
+  sample3 <= (others => '0');
+  sample4 <= (others => '0');
+END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hdl/interpolatorTrigger_studentVersion.vhd

@@ -0,0 +1,4 @@
+ARCHITECTURE studentVersion OF interpolatorTrigger IS
+BEGIN
+  triggerOut <= '0';
+END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hdl/offsetToUnsigned_studentVersion.vhd

@@ -0,0 +1,4 @@
+ARCHITECTURE studentVersion OF offsetToUnsigned IS
+BEGIN
+  unsignedOut <= (others => '0');
+END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hdl/resizer_studentVersion.vhd

@@ -0,0 +1,4 @@
+ARCHITECTURE studentVersion OF resizer IS
+BEGIN
+  resizeOut <= (others => '0');
+END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hdl/sineTable_studentVersion.vhd

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+ARCHITECTURE studentVersion OF sineTable IS
+
+  signal phaseTableAddress : unsigned(tableAddressBitNb-1 downto 0);
+  signal quarterSine : signed(sine'range);
+
+BEGIN
+
+  phaseTableAddress <= phase(phase'high-2 downto phase'high-2-tableAddressBitNb+1);
+
+  quarterTable: process(phaseTableAddress)
+  begin
+    case to_integer(phaseTableAddress) is
+      when 0 => quarterSine <= to_signed(16#0000#, quarterSine'length);
+      when 1 => quarterSine <= to_signed(16#18F9#, quarterSine'length);
+      when 2 => quarterSine <= to_signed(16#30FB#, quarterSine'length);
+      when 3 => quarterSine <= to_signed(16#471C#, quarterSine'length);
+      when 4 => quarterSine <= to_signed(16#5A82#, quarterSine'length);
+      when 5 => quarterSine <= to_signed(16#6A6D#, quarterSine'length);
+      when 6 => quarterSine <= to_signed(16#7641#, quarterSine'length);
+      when 7 => quarterSine <= to_signed(16#7D89#, quarterSine'length);
+      when others => quarterSine <= (others => '-');
+    end case;
+  end process quarterTable;
+
+  sine <= (others => '0');
+
+END ARCHITECTURE studentVersion;