Initial commit

Libs/RS232_test/hdl/serialPortFIFO_tester_test.vhd

@@ -0,0 +1,211 @@
+ARCHITECTURE test OF serialPortFIFO_tester IS
+                                                              -- reset and clock
+  constant clockPeriod: time := (1.0/clockFrequency) * 1 sec;
+  signal clock_int: std_uLogic := '1';
+                                                                  -- RS232 speed
+  constant rs232Frequency: real := baudRate;
+  constant rs232Period: time := (1.0/rs232Frequency) * 1 sec;
+  constant rs232WriteInterval: time := 10*rs232Period;
+                                                                -- RS232 Rx test
+  signal rs232OutString : string(1 to 32);
+  signal rs232SendOutString: std_uLogic;
+  signal rs232SendOutDone: std_uLogic;
+  signal rs232OutByte: character;
+  signal rs232SendOutByte: std_uLogic;
+  signal rs232OutByteReturned: std_ulogic_vector(rxData'range);
+                                                                -- RS232 Tx test
+  signal rs232InString : string(1 to 32);
+  signal rs232SendInString: std_uLogic;
+  signal rs232SendInDone: std_uLogic;
+  signal rs232InByte: character;
+  signal rs232InByteReturned: character;
+
+BEGIN
+  ------------------------------------------------------------------------------
+                                                              -- reset and clock
+  reset <= '1', '0' after 2*clockPeriod;
+
+  clock_int <= not clock_int after clockPeriod/2;
+  clock <= transport clock_int after clockPeriod*9/10;
+
+  ------------------------------------------------------------------------------
+                                                                -- RS232 Rx test
+  process
+  begin
+    rs232SendOutString <= '0';
+    wait for 4*rs232Period;
+
+    rs232OutString <= "test 1                          ";
+    rs232SendOutString <= '1', '0' after 1 ns;
+    wait until rs232SendOutDone = '1';
+    wait for rs232WriteInterval;
+
+    rs232OutString <= "test 2                          ";
+    rs232SendOutString <= '1', '0' after 1 ns;
+    wait until rs232SendOutDone = '1';
+    wait for rs232WriteInterval;
+
+    rs232OutString <= "test 3                          ";
+    rs232SendOutString <= '1', '0' after 1 ns;
+    wait until rs232SendOutDone = '1';
+    wait for rs232WriteInterval;
+
+    rs232OutString <= "test 4                          ";
+    rs232SendOutString <= '1', '0' after 1 ns;
+    wait until rs232SendOutDone = '1';
+    wait for rs232WriteInterval;
+
+    wait;
+  end process;
+
+  readRxFifo: process
+  begin
+    rxRd <= '0';
+    wait until falling_edge(rxEmpty);
+    rxRd <= '1';
+    wait for clockPeriod;
+    rs232OutByteReturned <= rxData;
+  end process readRxFifo;
+
+
+  ------------------------------------------------------------------------------
+                                                                -- RS232 Tx test
+  process
+  begin
+    rs232SendInString <= '0';
+    wait for 4*rs232Period;
+
+    rs232InString <= "hello 1                         ";
+    rs232SendInString <= '1', '0' after 1 ns;
+    wait until rs232SendInDone = '1';
+    wait for rs232WriteInterval;
+
+    rs232InString <= "hello 2                         ";
+    rs232SendInString <= '1', '0' after 1 ns;
+    wait until rs232SendInDone = '1';
+    wait for rs232WriteInterval;
+
+    rs232InString <= "hello 3                         ";
+    rs232SendInString <= '1', '0' after 1 ns;
+    wait until rs232SendInDone = '1';
+    wait for rs232WriteInterval;
+
+    rs232InString <= "hello 4                         ";
+    rs232SendInString <= '1', '0' after 1 ns;
+    wait until rs232SendInDone = '1';
+    wait for rs232WriteInterval;
+
+    wait;
+  end process;
+
+  --============================================================================
+                                                                   -- RS232 send
+  rsSendSerialString: process
+    constant rs232BytePeriod : time := 15*rs232Period;
+    variable commandRight: natural;
+  begin
+
+    rs232SendOutByte <= '0';
+    rs232SendOutDone <= '0';
+
+    wait until rising_edge(rs232SendOutString);
+
+    commandRight := rs232OutString'right;
+    while rs232OutString(commandRight) = ' ' loop
+      commandRight := commandRight-1;
+    end loop;
+
+    for index in rs232OutString'left to commandRight loop
+      rs232OutByte <= rs232OutString(index);
+      rs232SendOutByte <= '1', '0' after 1 ns;
+      wait for rs232BytePeriod;
+    end loop;
+
+    rs232OutByte <= cr;
+    rs232SendOutByte <= '1', '0' after 1 ns;
+    wait for rs232BytePeriod;
+
+    rs232SendOutDone <= '1';
+    wait for 1 ns;
+
+  end process rsSendSerialString;
+
+  rsSendSerialByte: process
+    variable txData: unsigned(7 downto 0);
+  begin
+    RxD <= '1';
+
+    wait until rising_edge(rs232SendOutByte);
+    txData := to_unsigned(character'pos(rs232OutByte), txData'length);
+
+    RxD <= '0';
+    wait for rs232Period;
+
+    for index in txData'reverse_range loop
+      RxD <= txData(index);
+      wait for rs232Period;
+    end loop;
+
+  end process rsSendSerialByte;
+
+  rsSendParallelString: process
+    variable commandRight: natural;
+  begin
+
+    rs232SendInDone <= '0';
+    txWr <= '0';
+
+    wait until rising_edge(rs232SendInString);
+
+    commandRight := rs232OutString'right;
+    while rs232InString(commandRight) = ' ' loop
+      commandRight := commandRight-1;
+    end loop;
+
+    wait until rising_edge(clock_int);
+    for index in rs232InString'left to commandRight loop
+      wait until rising_edge(clock_int);
+      while txFull = '1' loop
+        txWr <= '0';
+        wait until rising_edge(clock_int);
+      end loop;
+      rs232InByte <= rs232InString(index);
+      txWr <= '1';
+    end loop;
+    wait until rising_edge(clock_int);
+
+    while txFull = '1' loop
+      txWr <= '0';
+      wait until rising_edge(clock_int);
+    end loop;
+    rs232InByte <= cr;
+    txWr <= '1';
+    wait until rising_edge(clock_int);
+    txWr <= '0';
+
+    rs232SendInDone <= '1';
+    wait for 1 ns;
+
+  end process rsSendParallelString;
+
+  txData <= std_ulogic_vector(to_unsigned(character'pos(rs232InByte), txData'length));
+
+  ------------------------------------------------------------------------------
+                                                                -- RS232 receive
+  rsReceiveByte: process
+    variable rxData: unsigned(7 downto 0);
+  begin
+    wait until falling_edge(TxD);
+
+    wait for 1.5 * rs232Period;
+
+    for index in rxData'reverse_range loop
+      rxData(index) := TxD;
+      wait for rs232Period;
+    end loop;
+
+    rs232InByteReturned <= character'val(to_integer(rxData));
+
+  end process rsReceiveByte;
+
+END ARCHITECTURE test;

Libs/RS232_test/hdl/serialPortTransmitter_tester_test.vhd

@@ -0,0 +1,42 @@
+-- restart -f ; run 34 ms
+
+ARCHITECTURE test OF serialPortTransmitter_tester IS
+                                                              -- reset and clock
+  constant clockPeriod: time := (1.0/clockFrequency) * 1 sec;
+  signal clock_int: std_uLogic := '1';
+                                                                      -- Tx test
+  constant rs232Frequency: real := baudRate;
+  constant rs232Period: time := (1.0/rs232Frequency) * 1 sec;
+  constant rs232WriteInterval: time := 20*rs232Period;
+
+BEGIN
+  ------------------------------------------------------------------------------
+                                                              -- reset and clock
+  reset <= '1', '0' after 2*clockPeriod;
+
+  clock_int <= not clock_int after clockPeriod/2;
+  clock <= transport clock_int after clockPeriod*9/10;
+
+  ------------------------------------------------------------------------------
+                                                                      -- Tx test
+  process
+  begin
+
+    dataIn <= (others => '0');
+    send <= '0';
+    wait for rs232Period;
+
+    for index in 0 to 2**dataBitNb-1 loop
+      dataIn <= std_ulogic_vector(to_unsigned(index, dataIn'length));
+      wait until rising_edge(clock_int);
+      send <= '1';
+      wait until rising_edge(clock_int);
+      send <= '0';
+      wait for rs232WriteInterval;
+    end loop;
+
+    wait;
+
+  end process;
+
+END ARCHITECTURE test;

Libs/RS232_test/hdl/uvmRs232Driver_sim.vhd

@@ -0,0 +1,129 @@
+LIBRARY std;
+  USE std.TEXTIO.all;
+LIBRARY Common_test;
+  USE Common_test.testUtils.all;
+
+ARCHITECTURE RTL OF uvmRs232Driver IS
+                                                                   -- parameters
+  signal baudRate_int: real;
+  signal baudPeriod, characterPeriod: time;
+  constant uartDataBitNb: positive := 9;
+  constant maxStringLength: positive := driverTransaction'length;
+                                                                   -- Tx signals
+  signal outString : string(1 to maxStringLength);
+  signal sendString: std_uLogic := '0';
+  signal outChar: character;
+  signal sendChar: std_ulogic := '0';
+  signal sendParity, parityInit: std_ulogic := '0';
+                                                                        -- debug
+  signal outChar_debug: unsigned(uartDataBitNb-1 downto 0);
+
+
+BEGIN
+  ------------------------------------------------------------------------------
+                                                        -- interpret transaction
+  interpretTransaction: process
+    variable myLine : line;
+    variable commandPart : line;
+    variable baudRate_nat : natural;
+    file dataFile : text;
+    variable dataLine : line;
+  begin
+    wait on driverTransaction;
+    write(myLine, driverTransaction);
+    rm_side_separators(myLine);
+    read_first(myLine, commandPart);
+    if commandPart.all = "uart_baud" then
+      read(myLine, baudRate_nat);
+      baudRate_int <= real(baudRate_nat);
+    elsif commandPart.all = "uart_parity" then
+      sendParity <= '0';
+      parityInit <= '0';
+      if myLine.all = "even" then
+        sendParity <= '1';
+      elsif myLine.all = "odd" then
+        sendParity <= '1';
+        parityInit <= '1';
+      end if;
+    elsif commandPart.all = "uart_send" then
+      outString <= pad(myLine.all, outString'length);
+      sendString <= '1', '0' after 1 ns;
+    elsif commandPart.all = "uart_send_file" then
+      file_open(dataFile, "$SIMULATION_DIR/" & myLine.all, read_mode);
+      while not endFile(dataFile) loop
+        readLine(dataFile, dataLine);
+--print(dataLine.all);
+        outString <= pad(dataLine.all, outString'length);
+        sendString <= '1', '0' after 1 ns;
+        wait for (dataLine'length+8) * characterPeriod;
+      end loop;
+      file_close(dataFile);
+    end if;
+    deallocate(myLine);
+  end process interpretTransaction;
+
+  baudRate <= baudRate_int;
+  baudPeriod <= 1.0/baudRate_int * 1 sec;
+  characterPeriod <= 15*baudPeriod;
+
+  --============================================================================
+                                                      -- send string on RxD line
+  uartSendString: process
+    variable outStringRight: natural;
+  begin
+                                                             -- wait for command
+    sendChar <= '0';
+    wait until rising_edge(sendString);
+                                                           -- find string length
+    outStringRight := outString'right;
+    while outString(outStringRight) = ' ' loop
+      outStringRight := outStringRight-1;
+    end loop;
+                                                              -- send characters
+    for index in outString'left to outStringRight loop
+      outChar <= outString(index);
+--print(sprintf("%2X", character'pos(outChar)));
+      sendChar <= '1', '0' after 1 ns;
+      wait for characterPeriod;
+    end loop;
+                                                         -- send carriage return
+    outChar <= cr;
+    sendChar <= '1', '0' after 1 ns;
+    wait for characterPeriod;
+
+  end process uartSendString;
+
+  ------------------------------------------------------------------------------
+                                                   -- send character on RxD line
+  uartSendChar: process
+    variable outChar_unsigned: unsigned(uartDataBitNb-1 downto 0);
+  begin
+                                                             -- wait for trigger
+    RxD <= '1';
+    wait until rising_edge(sendChar);
+                                                 -- transform char to bit vector
+    outChar_unsigned := to_unsigned(
+      character'pos(outChar),
+      outChar_unsigned'length
+    );
+    outChar_unsigned(outChar_unsigned'high) := '1';
+    if sendParity = '1' then
+      outChar_unsigned(outChar_unsigned'high) := parityInit;
+      for index in uartDataBitNb-2 downto 0 loop
+        outChar_unsigned(outChar_unsigned'high)
+          := outChar_unsigned(outChar_unsigned'high)
+          xor outChar_unsigned(index);
+      end loop;
+    end if;
+    outChar_debug <= outChar_unsigned;
+                                                               -- send start bit
+    RxD <= '0';
+    wait for baudPeriod;
+                                                               -- send data bits
+    for index in outChar_unsigned'reverse_range loop
+      RxD <= outChar_unsigned(index);
+      wait for baudPeriod;
+    end loop;
+  end process uartSendChar;
+
+END ARCHITECTURE RTL;

Libs/RS232_test/hdl/uvmRs232Monitor_sim.vhd

@@ -0,0 +1,79 @@
+LIBRARY Common_test;
+  USE Common_test.testUtils.all;
+
+ARCHITECTURE RTL OF uvmRs232Monitor IS
+
+  constant uartDataBitNb: positive := 8;
+  signal baudPeriod: time;
+  signal rxWord, txWord: natural;
+  signal startup, rxReceived, txReceived: std_ulogic;
+
+BEGIN
+  ------------------------------------------------------------------------------
+  baudPeriod <= 1.0/baudRate * 1 sec;
+
+  ------------------------------------------------------------------------------
+                                                                  -- receive RxD
+  receiveRxD: process
+    variable rxData: unsigned(uartDataBitNb-1 downto 0);
+  begin
+    rxReceived <= '0';
+                                                                    -- start bit
+    wait until falling_edge(RxD);
+    wait for 1.5 * baudPeriod;
+                                                                    -- data bits
+    for index in rxData'reverse_range loop
+      rxData(index) := RxD;
+      wait for baudPeriod;
+    end loop;
+                                                            -- store information
+    rxWord <= to_integer(rxData);
+    rxReceived <= '1';
+    wait for 0 ns;
+  end process receiveRxD;
+
+  ------------------------------------------------------------------------------
+                                                                  -- receive RxD
+  receiveTxD: process
+    variable txData: unsigned(uartDataBitNb-1 downto 0);
+  begin
+    txReceived <= '0';
+                                                                    -- start bit
+    wait until falling_edge(TxD);
+    wait for 1.5 * baudPeriod;
+                                                                    -- data bits
+    for index in txData'reverse_range loop
+      txData(index) := TxD;
+      wait for baudPeriod;
+    end loop;
+                                                            -- store information
+    txWord <= to_integer(txData);
+    txReceived <= '1';
+    wait for 0 ns;
+  end process receiveTxD;
+
+  --============================================================================
+                                                              -- monitor acesses
+  startup <= '1', '0' after 1 ns;
+
+  reportBusAccess: process(startup, rxReceived, txReceived)
+  begin
+    if startup = '1' then
+      monitorTransaction <= pad(
+        "idle",
+        monitorTransaction'length
+      );
+    elsif rising_edge(rxReceived) then
+      monitorTransaction <= pad(
+        reportStart & " sent " & sprintf("%02X", rxWord),
+        monitorTransaction'length
+      );
+    elsif rising_edge(txReceived) then
+      monitorTransaction <= pad(
+        reportStart & " received " & sprintf("%02X", txWord),
+        monitorTransaction'length
+      );
+    end if;
+  end process reportBusAccess;
+
+END ARCHITECTURE RTL;

Libs/RS232_test/hdl/uvmRs232_tester_test.vhd

@@ -0,0 +1,92 @@
+LIBRARY Common_test;
+  USE Common_test.testUtils.all;
+
+ARCHITECTURE test OF uvmRs232_tester IS
+                                                              -- reset and clock
+  constant clockPeriod: time := (1.0/clockFrequency) * 1 sec;
+  signal clock_int: std_uLogic := '1';
+                                                                  -- RS232 speed
+  constant rs232Period: time := (1.0/rs232BaudRate) * 1 sec;
+                                                                     -- RS232 Rx
+  signal rs232RxChar : character := ' ';
+                                                                     -- RS232 Tx
+  signal rs232TxString : string(1 to 32);
+  signal rs232SendString: std_uLogic;
+  signal rs232SendDone: std_uLogic;
+
+BEGIN
+  ------------------------------------------------------------------------------
+                                                              -- reset and clock
+  reset <= '1', '0' after 2*clockPeriod;
+
+  clock_int <= not clock_int after clockPeriod/2;
+  clock <= transport clock_int after clockPeriod*9/10;
+
+  ------------------------------------------------------------------------------
+                                                                  -- Tx sequence
+  txSequence : process
+  begin
+    rs232SendString <= '0';
+    rs232TxString <= (others => ' ');
+    wait for 500 us;
+                                                                    -- send 'Hi'
+    rs232TxString <= pad("Hi", rs232TxString'length);
+    rs232SendString <= '1', '0' after 1 ns;
+    wait until rs232SendDone = '1';
+                                                          -- end of transmission
+    wait;
+  end process txSequence;
+
+  --============================================================================
+                                                                     -- RS232 Rx
+  storeRxByte: process(clock_int)
+  begin
+    if rising_edge(clock_int) then
+      if dataValid = '1' then
+        rs232RxChar <= character'val(to_integer(unsigned(dataOut)));
+      end if;
+    end if;
+  end process storeRxByte;
+
+  ------------------------------------------------------------------------------
+                                                                     -- RS232 Tx
+  rsSendString: process
+    constant rs232CharPeriod : time := 15*rs232Period;
+    variable outStringRight: natural;
+    variable outchar: character;
+  begin
+                                                             -- wait for command
+    send <= '0';
+    dataIn <= (others => '0');
+    rs232SendDone <= '0';
+    wait until rising_edge(rs232SendString);
+                                                           -- find string length
+    outStringRight := rs232TxString'right;
+    while rs232TxString(outStringRight) = ' ' loop
+      outStringRight := outStringRight-1;
+    end loop;
+                                                              -- send characters
+    for index in rs232TxString'left to outStringRight loop
+      outchar := rs232TxString(index);
+      dataIn <= std_ulogic_vector(to_unsigned(
+        character'pos(outchar), dataIn'length
+      ));
+      wait until rising_edge(clock_int);
+      send <= '1', '0' after clockPeriod;
+      wait for rs232CharPeriod;
+    end loop;
+                                                         -- send carriage return
+    outchar := cr;
+    dataIn <= std_ulogic_vector(to_unsigned(
+      character'pos(outchar), dataIn'length
+    ));
+    wait until rising_edge(clock_int);
+    send <= '1', '0' after clockPeriod;
+    wait for rs232CharPeriod;
+                                                        -- signal end of sending
+    rs232SendDone <= '1';
+    wait for 1 ns;
+
+  end process rsSendString;
+
+END ARCHITECTURE test;

Libs/RS232_test/hds/.hdlsidedata/_serialPortFIFO_tester_test.vhd._fpf

@@ -0,0 +1,4 @@
+INCLUDE list {
+ DEFAULT atom 1
+}
+DIALECT atom VHDL_2008

Libs/RS232_test/hds/.hdlsidedata/_serialPortTransmitter_tester_test.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RS232_test/hds/.hdlsidedata/_uvmRs232Driver_sim.vhd._fpf

@@ -0,0 +1 @@
+DIALECT atom VHDL_2008

Libs/RS232_test/hds/.hdlsidedata/_uvmRs232Monitor_sim.vhd._fpf

@@ -0,0 +1 @@
+DIALECT atom VHDL_2008

Libs/RS232_test/hds/.hdlsidedata/_uvmRs232_tester_test.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RS232_test/hds/_serialportfifo_tb._epf

@@ -0,0 +1,3 @@
+DEFAULT_ARCHITECTURE atom struct
+DEFAULT_FILE atom serial@port@f@i@f@o_tb/struct.bd
+TOP_MARKER atom 1

Libs/RS232_test/hds/_serialportfifo_tester._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom test
+DEFAULT_FILE atom serialPortFIFO_tester_test.vhd

Libs/RS232_test/hds/_serialporttransmitter_tb._epf

@@ -0,0 +1,3 @@
+DEFAULT_FILE atom serial@port@transmitter_tb/struct.bd
+DEFAULT_ARCHITECTURE atom struct
+TOP_MARKER atom 1

Libs/RS232_test/hds/_serialporttransmitter_tester._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom test
+DEFAULT_FILE atom serialPortTransmitter_tester_test.vhd

Libs/RS232_test/hds/_uvmrs232_tb._epf

@@ -0,0 +1,3 @@
+DEFAULT_FILE atom uvm@rs232_tb/struct.bd
+DEFAULT_ARCHITECTURE atom struct
+TOP_MARKER atom 1

Libs/RS232_test/hds/_uvmrs232_tester._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom test
+DEFAULT_FILE atom uvmRs232_tester_test.vhd

Libs/RS232_test/hds/_uvmrs232agenthw._epf

@@ -0,0 +1,2 @@
+DEFAULT_FILE atom uvm@rs232@agent@hw/struct.bd
+DEFAULT_ARCHITECTURE atom struct

Libs/RS232_test/hds/_uvmrs232driver._epf

@@ -0,0 +1,2 @@
+DEFAULT_FILE atom uvmRs232Driver_sim.vhd
+DEFAULT_ARCHITECTURE atom RTL

Libs/RS232_test/hds/_uvmrs232monitor._epf

@@ -0,0 +1,2 @@
+DEFAULT_FILE atom uvmRs232Monitor_sim.vhd
+DEFAULT_ARCHITECTURE atom RTL

Libs/RS232_test/hds/serial@port@transmitter_tb/_struct.bd._fpf

@@ -0,0 +1,9 @@
+ARCHITECTURES list {
+ {serialporttransmitter_tb struct} list {
+  TASK_SETTINGS list {
+   PLUGIN_SETTINGS list {
+    ModelSimSimulator atom {TaskSetting Arguments {} TaskSetting Communication 1 TaskSetting DelaySelection typ TaskSetting GlitchGeneration 1 TaskSetting InitCmd {$SIMULATION_DIR/serialPortTransmitter.do} TaskSetting LogFile {} TaskSetting RemoteHost {} TaskSetting Resolution ps TaskSetting SdfDelay typ TaskSetting SdfMultiSrcDelay latest TaskSetting SdfReduce 0 TaskSetting SdfWarnings 1 TaskSetting TimingChecks 1 TaskSetting UseBatch 0 TaskSetting UseCLI 0 TaskSetting UseGUI 1 TaskSetting VitalVersion 95 TaskSetting autoNames 1 TaskSetting coverage 0 TaskSetting excludePSL 0 TaskSetting exepath %task_ModelSimPath TaskSetting minimumSimSetting 0 TaskSetting saveReplayScript 0 TaskSetting useCustomSimDir 0}
+   }
+  }
+ }
+}

Libs/RS232_test/sim/serialPortTransmitter.do

@@ -0,0 +1,32 @@
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate /serialporttransmitter_tb/clock
+add wave -noupdate /serialporttransmitter_tb/reset
+add wave -noupdate -divider Controls
+add wave -noupdate -radix hexadecimal -radixshowbase 0 /serialporttransmitter_tb/dataIn
+add wave -noupdate /serialporttransmitter_tb/send
+add wave -noupdate -divider Internals
+add wave -noupdate /serialporttransmitter_tb/I_DUT/dividerCounterReset
+add wave -noupdate /serialporttransmitter_tb/I_DUT/txSendingByte
+add wave -noupdate /serialporttransmitter_tb/I_DUT/txSendingByteAndStop
+add wave -noupdate -divider {Serial out}
+add wave -noupdate /serialporttransmitter_tb/busy
+add wave -noupdate /serialporttransmitter_tb/TxD
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {33909547739 ps} 0}
+quietly wave cursor active 1
+configure wave -namecolwidth 142
+configure wave -valuecolwidth 40
+configure wave -justifyvalue left
+configure wave -signalnamewidth 1
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+configure wave -timelineunits ms
+update
+WaveRestoreZoom {0 ps} {315 us}

Libs/RS232_test/sim/uartDriver.txt

@@ -0,0 +1,9 @@
+at      	1 us
+info    	setting baud rate
+uart_baud   115200
+
+at      	100 us
+uart_send   Hello
+
+wait    	1 ms
+uart_send   world

Libs/RS232_test/sim/uvmRs232.do

@@ -0,0 +1,37 @@
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate -group {Reset and clock} /uvmrs232_tb/reset
+add wave -noupdate -group {Reset and clock} /uvmrs232_tb/clock
+add wave -noupdate -expand -group {UART signals} /uvmrs232_tb/RxD
+add wave -noupdate -expand -group {UART signals} /uvmrs232_tb/TxD
+add wave -noupdate -expand -group {UART Tx} /uvmrs232_tb/I_tester/rs232TxString
+add wave -noupdate -expand -group {UART Tx} /uvmrs232_tb/I_tester/rs232SendString
+add wave -noupdate -expand -group {UART Tx} /uvmrs232_tb/dataIn
+add wave -noupdate -expand -group {UART Tx} /uvmrs232_tb/send
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/U_DUT/I_driv/outString
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/U_DUT/I_driv/sendString
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/U_DUT/I_driv/outChar
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/U_DUT/I_driv/sendChar
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/dataOut
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/dataValid
+add wave -noupdate -expand -group {UART Rx} /uvmrs232_tb/I_tester/rs232RxChar
+add wave -noupdate -expand -group Transactions /uvmrs232_tb/U_DUT/driverTransaction
+add wave -noupdate -expand -group Transactions /uvmrs232_tb/U_DUT/monitorTransaction
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {0 ps} 0}
+quietly wave cursor active 0
+configure wave -namecolwidth 247
+configure wave -valuecolwidth 40
+configure wave -justifyvalue left
+configure wave -signalnamewidth 0
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+configure wave -timelineunits us
+update
+WaveRestoreZoom {0 ps} {2100 us}