Initial commit

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_ALU_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_aluDecoder_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_bramAddrReducer_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_bufferStdULogEnable_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_bufferUnsignedEnable_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_extend_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_instrDecoder_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_instructionForwarder_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_mainfsm_fsm.vhg._fpf

@@ -0,0 +1 @@
+DIALECT atom VHDL_2008

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_mux4To1ULogVec_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/.hdlsidedata/_registerFile_rtl.vhd._fpf

@@ -0,0 +1,4 @@
+DIALECT atom VHDL_2008
+INCLUDE list {
+ DEFAULT atom 1
+}

Libs/RiscV/HEIRV32/hds/_alu._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom ALU_rtl.vhd

Libs/RiscV/HEIRV32/hds/_aludecoder._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom aluDecoder_rtl.vhd

Libs/RiscV/HEIRV32/hds/_bramaddrreducer._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom bramAddrReducer_rtl.vhd

Libs/RiscV/HEIRV32/hds/_bufferstdulogenable._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom bufferStdULogEnable_rtl.vhd

Libs/RiscV/HEIRV32/hds/_bufferunsignedenable._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom bufferUnsignedEnable_rtl.vhd

Libs/RiscV/HEIRV32/hds/_extend._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom extend_rtl.vhd

Libs/RiscV/HEIRV32/hds/_mux4to1ulogvec._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom mux4To1ULogVec_rtl.vhd

Libs/RiscV/HEIRV32/hds/_registerfile._epf

@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom rtl
+DEFAULT_FILE atom registerFile_rtl.vhd