Klagarge/SEm-Labos
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github-classroom[bot]
2024-02-23 13:01:05 +00:00
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commit d212040c30
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1
Libs/RiscV/HEIRV32_test/hds/.hdlsidedata/_heirv32_mc_tester_test.vhd._fpf Normal file
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DIALECT atom VHDL_2008

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Libs/RiscV/HEIRV32_test/hds/.hdlsidedata/_heirv32_sc_tester_rtl.vhd._fpf Normal file
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@ -0,0 +1,4 @@
DIALECT atom VHDL_2008
INCLUDE list {
DEFAULT atom 1
}

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Libs/RiscV/HEIRV32_test/hds/.hdlsidedata/_heirv32_sc_tester_test.vhd._fpf Normal file
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@ -0,0 +1 @@
DIALECT atom VHDL_93

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Libs/RiscV/HEIRV32_test/hds/.hdlsidedata/_heirv32_tb_universal.vhg._fpf Normal file
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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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Libs/RiscV/HEIRV32_test/hds/.hdlsidedata/_heirv32_tester_test.vhd._fpf Normal file
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@ -0,0 +1,4 @@
DIALECT atom VHDL_2008
INCLUDE list {
DEFAULT atom 1
}

4
Libs/RiscV/HEIRV32_test/hds/.hdlsidedata/_universalTester_test.vhd._fpf Normal file
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@ -0,0 +1,4 @@
DIALECT atom VHDL_2008
INCLUDE list {
DEFAULT atom 1
}