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Sem-dma/MDK-ARM/DMA/DMA.htm

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2023-12-11 13:43:05 +00:00
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html><head>
<title>Static Call Graph - [DMA\DMA.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image DMA\DMA.axf</H1><HR>
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<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 6160001: Last Updated: Thu Dec 14 15:37:55 2023
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<BR><P>
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<H3>Maximum Stack Usage = 168 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)</H3><H3>
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Call chain for Maximum Stack Depth:</H3>
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__rt_entry_main &rArr; main &rArr; SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; __aeabi_uldivmod
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<P>
<H3>
Functions with no stack information
</H3><UL>
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<LI><a href="#[a7]">__user_initial_stackheap</a>
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</UL>
</UL>
<P>
<H3>
Mutually Recursive functions
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</H3> <LI><a href="#[1c]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1c]">ADC_IRQHandler</a><BR>
<LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
<LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
<LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
<LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
<LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
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</UL>
<P>
<H3>
Function Pointers
</H3><UL>
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<LI><a href="#[1c]">ADC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4]">BusFault_Handler</a> from stm32f7xx_it.o(.text.BusFault_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[1e]">CAN1_RX0_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[1f]">CAN1_RX1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[20]">CAN1_SCE_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[1d]">CAN1_TX_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4a]">CAN2_RX0_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4b]">CAN2_RX1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4c]">CAN2_SCE_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[49]">CAN2_TX_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[67]">CEC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[58]">DCMI_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[15]">DMA1_Stream0_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[16]">DMA1_Stream1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[17]">DMA1_Stream2_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[18]">DMA1_Stream3_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[19]">DMA1_Stream4_IRQHandler</a> from stm32f7xx_it.o(.text.DMA1_Stream4_IRQHandler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[1a]">DMA1_Stream5_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[1b]">DMA1_Stream6_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[39]">DMA1_Stream7_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[63]">DMA2D_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[42]">DMA2_Stream0_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[43]">DMA2_Stream1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[44]">DMA2_Stream2_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[45]">DMA2_Stream3_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[46]">DMA2_Stream4_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4e]">DMA2_Stream5_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4f]">DMA2_Stream6_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[50]">DMA2_Stream7_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[7]">DebugMon_Handler</a> from stm32f7xx_it.o(.text.DebugMon_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[47]">ETH_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[48]">ETH_WKUP_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[3a]">FMC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5a]">FPU_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
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<LI><a href="#[77]">HAL_SPI_AbortCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_AbortCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[76]">HAL_SPI_ErrorCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_ErrorCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[78]">HAL_SPI_MspInit</a> from spi.o(.text.HAL_SPI_MspInit) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[71]">HAL_SPI_RxCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_RxCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[72]">HAL_SPI_RxHalfCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_RxHalfCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[70]">HAL_SPI_TxCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_TxCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[75]">HAL_SPI_TxHalfCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_TxHalfCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[74]">HAL_SPI_TxRxCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_TxRxCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
<LI><a href="#[73]">HAL_SPI_TxRxHalfCpltCallback</a> from stm32f7xx_hal_spi.o(.text.HAL_SPI_TxRxHalfCpltCallback) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
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<LI><a href="#[2]">HardFault_Handler</a> from stm32f7xx_it.o(.text.HardFault_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[53]">I2C3_ER_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[52]">I2C3_EV_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[69]">I2C4_ER_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[68]">I2C4_EV_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[66]">LPTIM1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[62]">LTDC_ER_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[61]">LTDC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[3]">MemManage_Handler</a> from stm32f7xx_it.o(.text.MemManage_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[1]">NMI_Handler</a> from stm32f7xx_it.o(.text.NMI_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[4d]">OTG_FS_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[34]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[55]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[54]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[57]">OTG_HS_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[56]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[b]">PVD_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[8]">PendSV_Handler</a> from stm32f7xx_it.o(.text.PendSV_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[65]">QUADSPI_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[59]">RNG_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[0]">Reset_Handler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[60]">SAI1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[64]">SAI2_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[3b]">SDMMC1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[6a]">SPDIF_RX_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
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<LI><a href="#[2e]">SPI2_IRQHandler</a> from stm32f7xx_it.o(.text.SPI2_IRQHandler) referenced from startup_stm32f746xx.o(RESET)
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<LI><a href="#[3d]">SPI3_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5d]">SPI4_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5e]">SPI5_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5f]">SPI6_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
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<LI><a href="#[6f]">SPI_DMAAbortOnError</a> from stm32f7xx_hal_spi.o(.text.SPI_DMAAbortOnError) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_IRQHandler)
<LI><a href="#[7b]">SPI_DMAError</a> from stm32f7xx_hal_spi.o(.text.SPI_DMAError) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
<LI><a href="#[7a]">SPI_DMAHalfTransmitCplt</a> from stm32f7xx_hal_spi.o(.text.SPI_DMAHalfTransmitCplt) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
<LI><a href="#[79]">SPI_DMATransmitCplt</a> from stm32f7xx_hal_spi.o(.text.SPI_DMATransmitCplt) referenced 2 times from stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
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<LI><a href="#[6]">SVC_Handler</a> from stm32f7xx_it.o(.text.SVC_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[9]">SysTick_Handler</a> from stm32f7xx_it.o(.text.SysTick_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[6b]">SystemInit</a> from system_stm32f7xx.o(.text.SystemInit) referenced from startup_stm32f746xx.o(.text)
<LI><a href="#[c]">TAMP_STAMP_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[22]">TIM1_BRK_TIM9_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[24]">TIM1_TRG_COM_TIM11_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[23]">TIM1_UP_TIM10_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[3c]">TIM5_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[40]">TIM6_DAC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[41]">TIM7_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[35]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[38]">TIM8_CC_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[37]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[36]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[3e]">UART4_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[3f]">UART5_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5b]">UART7_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5c]">UART8_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[2f]">USART1_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[30]">USART2_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[51]">USART6_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[5]">UsageFault_Handler</a> from stm32f7xx_it.o(.text.UsageFault_Handler) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32f746xx.o(.text) referenced from startup_stm32f746xx.o(RESET)
<LI><a href="#[6c]">__main</a> from __main.o(!!!main) referenced from startup_stm32f746xx.o(.text)
<LI><a href="#[6e]">_printf_input_char</a> from _printf_char_common.o(.text) referenced from _printf_char_common.o(.text)
<LI><a href="#[6d]">fputc</a> from fputc.o(i.fputc) referenced from _printf_char_file.o(.text)
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<LI><a href="#[7c]">myBeautyCallback</a> from main.o(.text.myBeautyCallback) referenced 2 times from main.o(.text.main)
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</UL>
<P>
<H3>
Global Symbols
</H3>
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<P><STRONG><a name="[6c]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
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<BR><BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
<LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
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</UL>
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<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(.text)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[7d]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
2023-12-11 15:22:42 +00:00
<BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[7f]"></a>__scatterload_rt2</STRONG> (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[eb]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ec]"></a>__scatterload_null</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[80]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ed]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[81]"></a>_printf_d</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_d.o(.ARM.Collect$$_printf_percent$$00000009))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 56 + Unknown Stack Size
<LI>Call Chain = _printf_d &rArr; _printf_int_dec &rArr; _printf_int_common
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_dec
2023-12-11 14:07:16 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[9b]"></a>_printf_percent</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_percent.o(.ARM.Collect$$_printf_percent$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__printf
2023-12-11 14:07:16 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ee]"></a>_printf_percent_end</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, _printf_percent_end.o(.ARM.Collect$$_printf_percent$$00000017))
2023-12-11 14:07:16 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[90]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_li
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[83]"></a>__rt_lib_init_fp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000001))
<BR><BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[85]"></a>__rt_lib_init_heap_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000005))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = __rt_lib_init_heap_2 &rArr; _init_alloc &rArr; __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ef]"></a>__rt_lib_init_preinit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f0]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[87]"></a>__rt_lib_init_rand_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000D))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __rt_lib_init_rand_2 &rArr; _rand_init &rArr; srand
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rand_init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f1]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f2]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f3]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f4]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f5]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f6]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f7]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f8]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[f9]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[fa]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[fb]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[fc]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[89]"></a>__rt_lib_init_stdio_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000024))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 120 + Unknown Stack Size
<LI>Call Chain = __rt_lib_init_stdio_2 &rArr; _initio &rArr; freopen &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[fd]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[fe]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ff]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[100]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[101]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[102]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[95]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_ls
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[103]"></a>__rt_lib_shutdown_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[8b]"></a>__rt_lib_shutdown_stdio_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000003))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = __rt_lib_shutdown_stdio_2 &rArr; _terminateio &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_terminateio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[104]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[105]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[106]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[107]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[108]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[109]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[7e]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
2023-12-11 15:22:42 +00:00
<BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
2023-12-14 20:12:53 +00:00
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_rt2
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[10a]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[8d]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __rt_entry_sh &rArr; __user_setup_stackheap
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[8f]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
<BR><BR>[Calls]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[10b]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[91]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
<BR><BR>[Stack]<UL><LI>Max Depth = 168 + Unknown Stack Size
2023-12-11 15:22:42 +00:00
<LI>Call Chain = __rt_entry_main &rArr; main &rArr; SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; __aeabi_uldivmod
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[10c]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b5]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[94]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
<BR><BR>[Calls]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[10d]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002))
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[96]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e5]"></a>rand</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, rand.o(.emb_text))
<BR><BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ScreenSaver
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1c]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1e]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1f]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[20]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1d]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4a]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4b]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4c]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[49]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[67]"></a>CEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[58]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[15]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[16]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[17]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[18]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1a]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1b]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[39]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[63]"></a>DMA2D_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[42]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[43]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[44]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[45]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[46]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4e]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4f]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[50]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[47]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[48]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3a]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5a]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[53]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[52]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[69]"></a>I2C4_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[68]"></a>I2C4_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[66]"></a>LPTIM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[62]"></a>LTDC_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[61]"></a>LTDC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4d]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[34]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[55]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[54]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[57]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[56]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[b]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[65]"></a>QUADSPI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[59]"></a>RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[60]"></a>SAI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[64]"></a>SAI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3b]"></a>SDMMC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[6a]"></a>SPDIF_RX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3d]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5d]"></a>SPI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5e]"></a>SPI5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5f]"></a>SPI6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[c]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[22]"></a>TIM1_BRK_TIM9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_TIM11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[23]"></a>TIM1_UP_TIM10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3c]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[40]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[41]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[35]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[38]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[37]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[36]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3e]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3f]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5b]"></a>UART7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5c]"></a>UART8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[51]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f746xx.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a7]"></a>__user_initial_stackheap</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, startup_stm32f746xx.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[cf]"></a>__aeabi_uldivmod</STRONG> (Thumb, 0 bytes, Stack size 48 bytes, lludivv7m.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = __aeabi_uldivmod
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
2023-12-11 14:07:16 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[10e]"></a>_ll_udiv</STRONG> (Thumb, 240 bytes, Stack size 48 bytes, lludivv7m.o(.text), UNUSED)
2023-12-11 14:07:16 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[98]"></a>__2printf</STRONG> (Thumb, 20 bytes, Stack size 24 bytes, noretval__2printf.o(.text))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 128 + Unknown Stack Size
<LI>Call Chain = __2printf &rArr; _printf_char_file &rArr; _printf_char_common &rArr; __printf
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_file
2023-12-11 14:07:16 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[9a]"></a>__printf</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, __printf.o(.text))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 24 + Unknown Stack Size
<LI>Call Chain = __printf
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_percent
2023-12-11 14:07:16 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_common
2023-12-11 14:07:16 +00:00
</UL>
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[82]"></a>_printf_int_dec</STRONG> (Thumb, 104 bytes, Stack size 24 bytes, _printf_dec.o(.text))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = _printf_int_dec &rArr; _printf_int_common
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_common
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_d
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[9d]"></a>srand</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, rand.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = srand
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_rand_init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[88]"></a>_rand_init</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, rand.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _rand_init &rArr; srand
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;srand
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_rand_2
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e8]"></a>strcmp</STRONG> (Thumb, 124 bytes, Stack size 8 bytes, strcmpv7m_pel.o(.text))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = strcmp
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_open
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[10f]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[110]"></a>__rt_heap_escrow</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[111]"></a>__rt_heap_expand</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[9c]"></a>_printf_int_common</STRONG> (Thumb, 178 bytes, Stack size 32 bytes, _printf_intcommon.o(.text))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = _printf_int_common
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_int_dec
2023-12-11 14:07:16 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[99]"></a>_printf_char_file</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, _printf_char_file.o(.text))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = _printf_char_file &rArr; _printf_char_common &rArr; __printf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ferror
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_common
2023-12-11 15:22:42 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
2023-12-11 14:07:16 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a0]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fopen
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[112]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[113]"></a>__rt_memclr_w</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[114]"></a>_memset_w</STRONG> (Thumb, 74 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[9e]"></a>_printf_char_common</STRONG> (Thumb, 32 bytes, Stack size 64 bytes, _printf_char_common.o(.text))
2023-12-11 14:07:16 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = _printf_char_common &rArr; __printf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__printf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_file
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[9f]"></a>ferror</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, ferror.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_char_file
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[8a]"></a>_initio</STRONG> (Thumb, 210 bytes, Stack size 8 bytes, initio.o(.text))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 120 + Unknown Stack Size
<LI>Call Chain = _initio &rArr; freopen &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
<LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;setvbuf
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_stdio_2
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[8c]"></a>_terminateio</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, initio.o(.text))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = _terminateio &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown_stdio_2
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[8e]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __user_setup_stackheap
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_initial_stackheap
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_perproc_libspace
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_sh
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a5]"></a>free</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, h1_free.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = free
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_terminateio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a9]"></a>__flsbuf</STRONG> (Thumb, 470 bytes, Stack size 32 bytes, flsbuf.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_istty
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_flen
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_deferredlazyseek
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_seterr
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ea]"></a>__flsbuf_byte</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, flsbuf.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __flsbuf_byte
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[115]"></a>__flsbuf_wide</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, flsbuf.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a3]"></a>setvbuf</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, setvbuf.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = setvbuf
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a1]"></a>freopen</STRONG> (Thumb, 160 bytes, Stack size 24 bytes, fopen.o(.text))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 112 + Unknown Stack Size
<LI>Call Chain = freopen &rArr; _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_open
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fopen
<LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b2]"></a>fopen</STRONG> (Thumb, 74 bytes, Stack size 24 bytes, fopen.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a4]"></a>_fclose_internal</STRONG> (Thumb, 76 bytes, Stack size 32 bytes, fclose.o(.text))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = _fclose_internal &rArr; _fflush &rArr; _writebuf &rArr; _sys_write
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_close
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fflush
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
<LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_terminateio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[116]"></a>fclose</STRONG> (Thumb, 0 bytes, Stack size 32 bytes, fclose.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[93]"></a>exit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = exit
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a2]"></a>__rt_SIGRTRED</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtred_outer.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGRTRED &rArr; __rt_SIGRTRED_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED_inner
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_initio
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[117]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a6]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[118]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[a8]"></a>__rt_heap_descriptor</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, rt_heap_descriptor_intlibspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
<LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[119]"></a>__use_no_heap</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hguard.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[11a]"></a>__heap$guard</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hguard.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[11b]"></a>_terminate_user_alloc</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[11c]"></a>_init_user_alloc</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b8]"></a>__Heap_Full</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, init_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ba]"></a>__Heap_Broken</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[86]"></a>_init_alloc</STRONG> (Thumb, 94 bytes, Stack size 24 bytes, init_alloc.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = _init_alloc &rArr; __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Initialize
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_heap_2
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ae]"></a>malloc</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, h1_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Full
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fopen
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b1]"></a>_fseek</STRONG> (Thumb, 242 bytes, Stack size 24 bytes, fseek.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = _fseek &rArr; _ftell_internal
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_istty
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_flen
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ftell_internal
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_seterr
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[11d]"></a>fseek</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, fseek.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ab]"></a>_seterr</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, stdio.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[af]"></a>_writebuf</STRONG> (Thumb, 84 bytes, Stack size 32 bytes, stdio.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _writebuf &rArr; _sys_write
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_write
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_seek
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_seterr
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fflush
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b3]"></a>_fflush</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, stdio.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = _fflush &rArr; _writebuf &rArr; _sys_write
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_deferredlazyseek
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[aa]"></a>_deferredlazyseek</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, stdio.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fflush
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b7]"></a>__sig_exit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, defsig_exit.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b6]"></a>__rt_SIGRTRED_inner</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtred_inner.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGRTRED_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[bb]"></a>__rt_SIGRTMEM</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtmem_outer.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM_inner
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Broken
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[97]"></a>_sys_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_exit
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[11e]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[11f]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[bc]"></a>__Heap_Initialize</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, h1_init.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[120]"></a>__semihosting_library_function</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, indicate_semi.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[121]"></a>_maybe_terminate_alloc</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, maybetermalloc1.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[122]"></a>__Heap_DescSize</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, h1_init.o(.text), UNUSED)
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b9]"></a>__Heap_ProvideMemory</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, h1_extend.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __Heap_ProvideMemory &rArr; free
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Full
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[bd]"></a>_ftell_internal</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, ftell.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _ftell_internal
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_errno_addr
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[123]"></a>ftell</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, ftell.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c0]"></a>__default_signal_display</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, defsig_general.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ttywrch
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM_inner
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTRED_inner
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c1]"></a>__rt_SIGRTMEM_inner</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, defsig_rtmem_inner.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c3]"></a>_ttywrch</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sys_wrch.o(.text))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _ttywrch
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c2]"></a>__aeabi_errno_addr</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, rt_errno_addr_intlibspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ftell_internal
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[124]"></a>__errno$intlibspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_errno_addr_intlibspace.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[125]"></a>__rt_errno_addr$intlibspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_errno_addr_intlibspace.o(.text), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.BusFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
2023-12-11 13:43:05 +00:00
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[19]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.DMA1_Stream4_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = DMA1_Stream4_IRQHandler &rArr; HAL_DMA_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d4]"></a>Error_Handler</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, main.o(.text.Error_Handler))
<BR><BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d2]"></a>HAL_DMA_Abort_IT</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, stm32f7xx_hal_dma.o(.text.HAL_DMA_Abort_IT))
<BR><BR>[Called By]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c4]"></a>HAL_DMA_IRQHandler</STRONG> (Thumb, 442 bytes, Stack size 24 bytes, stm32f7xx_hal_dma.o(.text.HAL_DMA_IRQHandler))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_DMA_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[19]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream4_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c5]"></a>HAL_DMA_Init</STRONG> (Thumb, 324 bytes, Stack size 24 bytes, stm32f7xx_hal_dma.o(.text.HAL_DMA_Init))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_DMA_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d9]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 168 bytes, Stack size 16 bytes, stm32f7xx_hal_dma.o(.text.HAL_DMA_Start_IT))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_DMA_Start_IT
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d3]"></a>HAL_GPIO_Init</STRONG> (Thumb, 446 bytes, Stack size 44 bytes, stm32f7xx_hal_gpio.o(.text.HAL_GPIO_Init))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_GPIO_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[dc]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f7xx_hal_gpio.o(.text.HAL_GPIO_WritePin))
<BR><BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Nokia_Init
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NokiaGotoXY
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c6]"></a>HAL_GetTick</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f7xx_hal.o(.text.HAL_GetTick))
<BR><BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFifoStateUntilTimeout
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_EnableOverDrive
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e6]"></a>HAL_IncTick</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32f7xx_hal.o(.text.HAL_IncTick))
2023-12-11 15:22:42 +00:00
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c7]"></a>HAL_Init</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, stm32f7xx_hal.o(.text.HAL_Init))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c9]"></a>HAL_InitTick</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, stm32f7xx_hal.o(.text.HAL_InitTick))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ca]"></a>HAL_MspInit</STRONG> (Thumb, 50 bytes, Stack size 8 bytes, stm32f7xx_hal_msp.o(.text.HAL_MspInit))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_MspInit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d5]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f7xx_hal_cortex.o(.text.HAL_NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[cc]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, stm32f7xx_hal_cortex.o(.text.HAL_NVIC_SetPriority))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_NVIC_SetPriority
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_MspInit
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[c8]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f7xx_hal_cortex.o(.text.HAL_NVIC_SetPriorityGrouping))
<BR><BR>[Called By]<UL><LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[cd]"></a>HAL_PWREx_EnableOverDrive</STRONG> (Thumb, 118 bytes, Stack size 24 bytes, stm32f7xx_hal_pwr_ex.o(.text.HAL_PWREx_EnableOverDrive))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_PWREx_EnableOverDrive
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ce]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 466 bytes, Stack size 24 bytes, stm32f7xx_hal_rcc.o(.text.HAL_RCC_ClockConfig))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_RCC_ClockConfig &rArr; __aeabi_uldivmod
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d0]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 900 bytes, Stack size 32 bytes, stm32f7xx_hal_rcc.o(.text.HAL_RCC_OscConfig))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_RCC_OscConfig
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[77]"></a>HAL_SPI_AbortCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_AbortCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[76]"></a>HAL_SPI_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_ErrorCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
</UL>
<P><STRONG><a name="[d1]"></a>HAL_SPI_IRQHandler</STRONG> (Thumb, 264 bytes, Stack size 24 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_SPI_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort_IT
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[2e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI2_IRQHandler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[de]"></a>HAL_SPI_Init</STRONG> (Thumb, 322 bytes, Stack size 16 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_SPI_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[78]"></a>HAL_SPI_MspInit</STRONG> (Thumb, 230 bytes, Stack size 56 bytes, spi.o(.text.HAL_SPI_MspInit))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = HAL_SPI_MspInit &rArr; HAL_GPIO_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e9]"></a>HAL_SPI_RegisterCallback</STRONG> (Thumb, 152 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_RegisterCallback))
<BR><BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[71]"></a>HAL_SPI_RxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_RxCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
</UL>
<P><STRONG><a name="[72]"></a>HAL_SPI_RxHalfCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_RxHalfCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
</UL>
<P><STRONG><a name="[d6]"></a>HAL_SPI_Transmit</STRONG> (Thumb, 440 bytes, Stack size 32 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Nokia_Init
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NokiaGotoXY
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d8]"></a>HAL_SPI_Transmit_DMA</STRONG> (Thumb, 262 bytes, Stack size 16 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_SPI_Transmit_DMA &rArr; HAL_DMA_Start_IT
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[70]"></a>HAL_SPI_TxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_TxCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[75]"></a>HAL_SPI_TxHalfCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_TxHalfCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[74]"></a>HAL_SPI_TxRxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_TxRxCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
</UL>
<P><STRONG><a name="[73]"></a>HAL_SPI_TxRxHalfCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.HAL_SPI_TxRxHalfCpltCallback))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Init)
</UL>
<P><STRONG><a name="[cb]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, stm32f7xx_hal_cortex.o(.text.HAL_SYSTICK_Config))
<BR><BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.HardFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
2023-12-11 13:43:05 +00:00
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[da]"></a>MX_DMA_Init</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, dma.o(.text.MX_DMA_Init))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = MX_DMA_Init &rArr; HAL_NVIC_SetPriority
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
2023-12-11 15:22:42 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[db]"></a>MX_GPIO_Init</STRONG> (Thumb, 184 bytes, Stack size 56 bytes, gpio.o(.text.MX_GPIO_Init))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[dd]"></a>MX_SPI2_Init</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, spi.o(.text.MX_SPI2_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = MX_SPI2_Init &rArr; HAL_SPI_Init
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Init
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.MemManage_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.NMI_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e4]"></a>NokiaDrawLine</STRONG> (Thumb, 620 bytes, Stack size 32 bytes, nokia.o(.text.NokiaDrawLine))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = NokiaDrawLine
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ScreenSaver
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[df]"></a>NokiaGotoXY</STRONG> (Thumb, 164 bytes, Stack size 24 bytes, nokia.o(.text.NokiaGotoXY))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = NokiaGotoXY &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e0]"></a>Nokia_Init</STRONG> (Thumb, 496 bytes, Stack size 24 bytes, nokia.o(.text.Nokia_Init))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = Nokia_Init &rArr; HAL_SPI_Transmit &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.PendSV_Handler))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.SPI2_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI2_IRQHandler &rArr; HAL_SPI_IRQHandler
</UL>
<BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.SVC_Handler))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e3]"></a>ScreenSaver</STRONG> (Thumb, 406 bytes, Stack size 40 bytes, lines_functions.o(.text.ScreenSaver))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = ScreenSaver &rArr; NokiaDrawLine
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NokiaDrawLine
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rand
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.SysTick_Handler))
2023-12-14 20:12:53 +00:00
<BR><BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
2023-12-11 13:43:05 +00:00
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e7]"></a>SystemClock_Config</STRONG> (Thumb, 186 bytes, Stack size 80 bytes, main.o(.text.SystemClock_Config))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; __aeabi_uldivmod
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_EnableOverDrive
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[6b]"></a>SystemInit</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, system_stm32f7xx.o(.text.SystemInit))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(.text)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f7xx_it.o(.text.UsageFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
2023-12-11 13:43:05 +00:00
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32f746xx.o(RESET)
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b4]"></a>_sys_close</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, retarget_io.o(.text._sys_close))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fclose_internal
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ac]"></a>_sys_flen</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, retarget_io.o(.text._sys_flen))
<BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[ad]"></a>_sys_istty</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, retarget_io.o(.text._sys_istty))
<BR><BR>[Called By]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fseek
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[b0]"></a>_sys_open</STRONG> (Thumb, 92 bytes, Stack size 8 bytes, retarget_io.o(.text._sys_open))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _sys_open &rArr; strcmp
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strcmp
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;freopen
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[be]"></a>_sys_seek</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, retarget_io.o(.text._sys_seek))
<BR><BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[bf]"></a>_sys_write</STRONG> (Thumb, 106 bytes, Stack size 8 bytes, retarget_io.o(.text._sys_write))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _sys_write
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_writebuf
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[92]"></a>main</STRONG> (Thumb, 488 bytes, Stack size 16 bytes, main.o(.text.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 168 + Unknown Stack Size
2023-12-11 15:22:42 +00:00
<LI>Call Chain = main &rArr; SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; __aeabi_uldivmod
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
<LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
<LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_SPI2_Init
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit_DMA
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_RegisterCallback
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Nokia_Init
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NokiaGotoXY
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ScreenSaver
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[7c]"></a>myBeautyCallback</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, main.o(.text.myBeautyCallback))
<BR>[Address Reference Count : 1]<UL><LI> main.o(.text.main)
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[6d]"></a>fputc</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, fputc.o(i.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = fputc &rArr; __flsbuf_byte
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__flsbuf_byte
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> _printf_char_file.o(.text)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[84]"></a>_fp_init</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, fpinit.o(x$fpl$fpinit))
<BR><BR>[Called By]<UL><LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_fp_1
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[126]"></a>__fplib_config_fpu_vfp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED)
2023-12-11 13:43:05 +00:00
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[127]"></a>__fplib_config_pureend_doubles</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, fpinit.o(x$fpl$fpinit), UNUSED)
2023-12-11 13:43:05 +00:00
<P>
<H3>
Local Symbols
</H3>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[6f]"></a>SPI_DMAAbortOnError</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.SPI_DMAAbortOnError))
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_IRQHandler)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[7b]"></a>SPI_DMAError</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.SPI_DMAError))
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[7a]"></a>SPI_DMAHalfTransmitCplt</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f7xx_hal_spi.o(.text.SPI_DMAHalfTransmitCplt))
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[79]"></a>SPI_DMATransmitCplt</STRONG> (Thumb, 108 bytes, Stack size 24 bytes, stm32f7xx_hal_spi.o(.text.SPI_DMATransmitCplt))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = SPI_DMATransmitCplt &rArr; SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
<LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<BR>[Address Reference Count : 1]<UL><LI> stm32f7xx_hal_spi.o(.text.HAL_SPI_Transmit_DMA)
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[d7]"></a>SPI_EndRxTxTransaction</STRONG> (Thumb, 196 bytes, Stack size 24 bytes, stm32f7xx_hal_spi.o(.text.SPI_EndRxTxTransaction))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SPI_EndRxTxTransaction &rArr; SPI_WaitFifoStateUntilTimeout
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFlagStateUntilTimeout
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_WaitFifoStateUntilTimeout
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_DMATransmitCplt
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SPI_Transmit
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<P><STRONG><a name="[e1]"></a>SPI_WaitFifoStateUntilTimeout</STRONG> (Thumb, 236 bytes, Stack size 48 bytes, stm32f7xx_hal_spi.o(.text.SPI_WaitFifoStateUntilTimeout))
2023-12-11 13:43:05 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = SPI_WaitFifoStateUntilTimeout
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
2023-12-11 13:43:05 +00:00
</UL>
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<P><STRONG><a name="[e2]"></a>SPI_WaitFlagStateUntilTimeout</STRONG> (Thumb, 180 bytes, Stack size 24 bytes, stm32f7xx_hal_spi.o(.text.SPI_WaitFlagStateUntilTimeout))
2023-12-11 15:22:42 +00:00
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SPI_WaitFlagStateUntilTimeout
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
2023-12-11 13:43:05 +00:00
</UL>
2023-12-14 20:12:53 +00:00
<BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPI_EndRxTxTransaction
2023-12-11 13:43:05 +00:00
</UL>
2023-12-11 15:22:42 +00:00
<P><STRONG><a name="[6e]"></a>_printf_input_char</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, _printf_char_common.o(.text))
2023-12-11 13:43:05 +00:00
<BR>[Address Reference Count : 1]<UL><LI> _printf_char_common.o(.text)
</UL><P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>