forked from HEL/circuiteria
Compare commits
13 Commits
comp/elect
...
dev
Author | SHA1 | Date | |
---|---|---|---|
87643983ec | |||
94fef0a245 | |||
1a0a659ace | |||
f2ce91ec39 | |||
043bb339fe | |||
693676d61a | |||
94d5d6b854 | |||
71f128f6c9 | |||
ea8277ee5b | |||
c5e4f8039a | |||
8c91ccdd54 | |||
9966656e8b | |||
3ccb79c6c2 |
@@ -56,7 +56,7 @@ for i in range(3) {
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||||
```)
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#let wires = example(```
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||||
for i in range(3) {
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for i in range(4) {
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draw.circle((i * 3, 0), radius: .1, name: "p" + str(i * 2))
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draw.circle((i * 3 + 2, 1), radius: .1, name: "p" + str(i * 2 + 1))
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draw.content((i * 3 + 1, -1), raw(wire.wire-styles.at(i)))
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@@ -65,6 +65,10 @@ wire.wire("w1", ("p0", "p1"), style: "direct")
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wire.wire("w2", ("p2", "p3"), style: "zigzag")
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wire.wire("w3", ("p4", "p5"), style: "dodge",
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dodge-y: -0.5, dodge-margins: (0.5, 0.5))
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wire.wire("w4", ("p6","p7"), style: "guided",
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guided-center:(20%, 40%), guided-margins: (90%,87%),
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guided-sides: ("north","south"))
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```, vertical: true)
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||||
#let stub = example(```
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@@ -115,6 +119,46 @@ gates.gate-xnor(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.gate-xnor(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-and = example(```
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gates.iec-gate-and(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-and(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-nand = example(```
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gates.iec-gate-nand(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-nand(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-or = example(```
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gates.iec-gate-or(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-or(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-nor = example(```
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gates.iec-gate-nor(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-nor(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-xor = example(```
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gates.iec-gate-xor(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-xor(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-xnor = example(```
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gates.iec-gate-xnor(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-xnor(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-buf = example(```
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gates.iec-gate-buf(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-buf(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let iec-gate-not = example(```
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gates.iec-gate-not(x: 0, y: 0, w: 1.5, h: 1.5)
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gates.iec-gate-not(x: 3, y: 0, w: 1.5, h: 1.5, inverted: "all")
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```, vertical: true)
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#let group = example(```
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element.group(
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id: "g1", name: "Group 1", stroke: (dash: "dashed"),
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@@ -147,4 +191,4 @@ wire.wire("w1", ((0, 0), (1, 1)), style: "zigzag")
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wire.wire("w2", ((0, 0), (1, -.5)),
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style: "zigzag", zigzag-ratio: 80%)
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wire.intersection("w1.zig")
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```)
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```)
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|
BIN
gallery/test7.pdf
Normal file
BIN
gallery/test7.pdf
Normal file
Binary file not shown.
BIN
gallery/test7.png
Normal file
BIN
gallery/test7.png
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Binary file not shown.
After Width: | Height: | Size: 34 KiB |
98
gallery/test7.typ
Normal file
98
gallery/test7.typ
Normal file
@@ -0,0 +1,98 @@
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#import "@preview/cetz:0.3.2": draw
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#import "../src/lib.typ": circuit, element, util, wire
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#set page(width: auto, height: auto, margin: .5cm)
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#circuit({
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element.iec-gate-buf(
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x: 0,
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y: 0,
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w: 2,
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h: 2,
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id: "iec-buf",
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inputs: 1,
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)
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wire.stub("iec-buf-port-in0", "west")
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element.iec-gate-not(
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x: 3,
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y: 0,
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w: 2,
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h: 2,
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id: "iec-not",
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inputs: 1,
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)
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wire.stub("iec-not-port-in0", "west")
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element.iec-gate-and(
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id: "iec-and",
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x: 0,
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y: -3,
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w: 2,
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h: 2,
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inputs: 2,
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)
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for i in range(2) {
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wire.stub("iec-and-port-in" + str(i), "west")
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}
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element.iec-gate-nand(
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id: "iec-nand",
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x: 3,
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y: -3,
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w: 2,
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h: 2,
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inputs: 2,
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)
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for i in range(2) {
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wire.stub("iec-nand-port-in" + str(i), "west")
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}
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element.iec-gate-or(
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id: "iec-or",
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x: 0,
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y: -6,
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w: 2,
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h: 2,
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inputs: 2,
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)
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for i in range(2) {
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wire.stub("iec-or-port-in" + str(i), "west")
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}
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element.iec-gate-nor(
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id: "iec-nor",
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x: 3,
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y: -6,
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w: 2,
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h: 2,
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inputs: 2,
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)
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for i in range(2) {
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wire.stub("iec-nor-port-in" + str(i), "west")
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}
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element.iec-gate-xor(
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id: "iec-xor",
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x: 0,
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y: -9,
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w: 2,
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h: 2,
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inputs: 2,
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)
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for i in range(2) {
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wire.stub("iec-xor-port-in" + str(i), "west")
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}
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element.iec-gate-xnor(
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id: "iec-nxor",
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x: 3,
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y: -9,
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w: 2,
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h: 2,
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inputs: 2,
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)
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for i in range(2) {
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wire.stub("iec-nxor-port-in" + str(i), "west")
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}
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})
|
BIN
manual.pdf
BIN
manual.pdf
Binary file not shown.
@@ -195,7 +195,12 @@ If you have installed Circuiteria directly in your project, import #link("src/li
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read("src/elements/logic/and.typ") + "\n" +
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read("src/elements/logic/buf.typ") + "\n" +
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read("src/elements/logic/or.typ") + "\n" +
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read("src/elements/logic/xor.typ"),
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read("src/elements/logic/xor.typ") + "\n" +
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read("src/elements/logic/iec_gate.typ") + "\n" +
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read("src/elements/logic/iec_and.typ") + "\n" +
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read("src/elements/logic/iec_buf.typ") + "\n" +
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read("src/elements/logic/iec_or.typ") + "\n" +
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read("src/elements/logic/iec_xor.typ"),
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name: "gates",
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old-syntax: true,
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scope: (
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|
@@ -9,6 +9,5 @@
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/// - length (length, ratio): Optional base unit
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/// -> none
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#let circuit(body, length: 2em) = {
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set text(font: "Source Sans 3")
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canvas(length: length, body)
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}
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}
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|
@@ -11,5 +11,10 @@
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#import "elements/logic/or.typ": gate-or, gate-nor
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#import "elements/logic/xor.typ": gate-xor, gate-xnor
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#import "elements/logic/buf.typ": gate-buf, gate-not
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#import "elements/logic/iec_gate.typ": iec-gate
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#import "elements/logic/iec_and.typ": iec-gate-and, iec-gate-nand
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#import "elements/logic/iec_buf.typ": iec-gate-buf, iec-gate-not
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#import "elements/logic/iec_or.typ": iec-gate-or, iec-gate-nor
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#import "elements/logic/iec_xor.typ": iec-gate-xor, iec-gate-xnor
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#import "elements/group.typ": group
|
@@ -1,9 +1,9 @@
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#import "@preview/cetz:0.3.2": draw
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#import "element.typ"
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#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
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#let draw-shape(id, tl, tr, br, bl, fill, stroke, radius: 0.5em) = {
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||||
let f = draw.rect(
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radius: 0.5em,
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radius: radius,
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||||
inset: 0.5em,
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||||
fill: fill,
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||||
stroke: stroke,
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||||
@@ -27,13 +27,14 @@
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||||
ports: (),
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ports-margins: (),
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fill: none,
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||||
radius: 0.5em,
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||||
stroke: black + 1pt,
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||||
id: "",
|
||||
debug: (
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||||
ports: false
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)
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) = element.elmt(
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||||
draw-shape: draw-shape,
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draw-shape: draw-shape.with(radius: radius),
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x: x,
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||||
y: y,
|
||||
w: w,
|
||||
@@ -46,4 +47,4 @@
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||||
stroke: stroke,
|
||||
id: id,
|
||||
debug: debug
|
||||
)
|
||||
)
|
||||
|
70
src/elements/logic/iec_and.typ
Normal file
70
src/elements/logic/iec_and.typ
Normal file
@@ -0,0 +1,70 @@
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||||
#import "@preview/cetz:0.3.2": draw
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// #import "iec_gate.typ" as iec-gate
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#import "iec_gate.typ" as iec-gate
|
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|
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/// Draws an IEC-AND gate. This function is also available as `element.iec-gate-and()`
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///
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/// For parameters, see #doc-ref("gates.iec-gate")
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/// #examples.iec-gate-and
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#let iec-gate-and(
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x: none,
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y: none,
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||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false
|
||||
),
|
||||
) = {
|
||||
iec-gate.iec-gate(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: inverted,
|
||||
debug: debug,
|
||||
symbol: $amp$,
|
||||
)
|
||||
|
||||
}
|
||||
|
||||
/// Draws an IEC-NAND gate. This function is also available as `element.iec-gate-nand()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-nand
|
||||
#let iec-gate-nand(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false
|
||||
),
|
||||
) = {
|
||||
iec-gate-and(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: if inverted != "all" {inverted + ("out",)} else {inverted},
|
||||
debug: debug,
|
||||
)
|
||||
}
|
68
src/elements/logic/iec_buf.typ
Normal file
68
src/elements/logic/iec_buf.typ
Normal file
@@ -0,0 +1,68 @@
|
||||
#import "@preview/cetz:0.3.2": draw
|
||||
#import "iec_gate.typ" as iec-gate
|
||||
|
||||
|
||||
/// Draws an IEC buffer gate. This function is also available as `element.iec-gate-buf()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-buf
|
||||
#let iec-gate-buf(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false,
|
||||
),
|
||||
) = {
|
||||
iec-gate.iec-gate(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: inverted,
|
||||
debug: debug,
|
||||
symbol: "1",
|
||||
)
|
||||
}
|
||||
|
||||
/// Draws an IEC NOT gate. This function is also available as `element.iec-gate-not()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-not
|
||||
#let iec-gate-not(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false,
|
||||
),
|
||||
) = {
|
||||
iec-gate-buf(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: if inverted != "all" { inverted + ("out",) } else { inverted },
|
||||
debug: debug,
|
||||
)
|
||||
}
|
125
src/elements/logic/iec_gate.typ
Normal file
125
src/elements/logic/iec_gate.typ
Normal file
@@ -0,0 +1,125 @@
|
||||
#import "@preview/cetz:0.3.2": draw, coordinate
|
||||
#import "../ports.typ": add-ports, add-port
|
||||
#import "../element.typ"
|
||||
|
||||
#let default-draw-shape(id, tl, tr, br, bl, fill, stroke, symbol) = {
|
||||
let shapes = draw.rect(
|
||||
inset: 0.5em,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
name: id,
|
||||
bl, tr
|
||||
)
|
||||
shapes += draw.content(
|
||||
id + ".center",
|
||||
[*$ symbol $*]
|
||||
)
|
||||
return (shapes, tl, tr, br, bl)
|
||||
}
|
||||
|
||||
/// Draws a logic gate. This function is also available as `element.iec-gate()`
|
||||
///
|
||||
/// - draw-shape (function): see #doc-ref("element.elmt")
|
||||
/// - x (number, dictionary): see #doc-ref("element.elmt")
|
||||
/// - y (number, dictionary): see #doc-ref("element.elmt")
|
||||
/// - w (number): see #doc-ref("element.elmt")
|
||||
/// - h (number): see #doc-ref("element.elmt")
|
||||
/// - inputs (int): The number of inputs
|
||||
/// - fill (none, color): see #doc-ref("element.elmt")
|
||||
/// - stroke (stroke): see #doc-ref("element.elmt")
|
||||
/// - id (str): see #doc-ref("element.elmt")
|
||||
/// - inverted (str, array): Either "all" or an array of port ids to display as inverted
|
||||
/// - inverted-radius (number): The radius of inverted ports dot
|
||||
/// - debug (dictionary): see #doc-ref("element.elmt")
|
||||
/// - symbol (str): The symbol to display at the center of the gate
|
||||
#let iec-gate(
|
||||
draw-shape: default-draw-shape,
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
inverted-radius: 0.1,
|
||||
debug: (
|
||||
ports: false
|
||||
),
|
||||
symbol: "",
|
||||
) = draw.get-ctx(ctx => {
|
||||
let width = w
|
||||
let height = h
|
||||
|
||||
let x = x
|
||||
let y = y
|
||||
if x == none { panic("Parameter x must be set") }
|
||||
if y == none { panic("Parameter y must be set") }
|
||||
if w == none { panic("Parameter w must be set") }
|
||||
if h == none { panic("Parameter h must be set") }
|
||||
|
||||
if (type(x) == dictionary) {
|
||||
let offset = x.rel
|
||||
let to = x.to
|
||||
let (ctx, to-pos) = coordinate.resolve(ctx, (rel: (offset, 0), to: to))
|
||||
x = to-pos.at(0)
|
||||
}
|
||||
|
||||
if (type(y) == dictionary) {
|
||||
let from = y.from
|
||||
let to = y.to
|
||||
|
||||
let dy
|
||||
if to == "out" {
|
||||
dy = height / 2
|
||||
} else {
|
||||
dy = height * (i + 0.5) / inputs
|
||||
}
|
||||
|
||||
let (ctx, from-pos) = coordinate.resolve(ctx, from)
|
||||
y = from-pos.at(1) + dy - height
|
||||
}
|
||||
|
||||
let tl = (x, y + height)
|
||||
let tr = (x + width, y + height)
|
||||
let br = (x + width, y)
|
||||
let bl = (x, y)
|
||||
|
||||
// Workaround because CeTZ needs to have all draw functions in the body
|
||||
let func = {}
|
||||
(func, tl, tr, br, bl) = draw-shape(id, tl, tr, br, bl, fill, stroke, symbol)
|
||||
func
|
||||
|
||||
let space = 100% / inputs
|
||||
for i in range(inputs) {
|
||||
let pct = (i + 0.5) * space
|
||||
let port-pos = (tl, pct, bl)
|
||||
let port-name = "in" + str(i)
|
||||
if inverted == "all" or port-name in inverted {
|
||||
draw.circle(
|
||||
port-pos,
|
||||
radius: inverted-radius,
|
||||
anchor: "east",
|
||||
stroke: stroke
|
||||
)
|
||||
port-pos = (rel: (-2 * inverted-radius, 0), to: port-pos)
|
||||
}
|
||||
add-port(
|
||||
id, "west",
|
||||
(id: port-name), port-pos,
|
||||
debug: debug.ports
|
||||
)
|
||||
}
|
||||
|
||||
let out-pos = id + ".east"
|
||||
if inverted == "all" or "out" in inverted {
|
||||
draw.circle(out-pos, radius: inverted-radius, anchor: "west", stroke: stroke)
|
||||
out-pos = (rel: (2 * inverted-radius, 0), to: out-pos)
|
||||
}
|
||||
add-port(
|
||||
id, "east",
|
||||
(id: "out"), out-pos,
|
||||
debug: debug.ports
|
||||
)
|
||||
})
|
67
src/elements/logic/iec_or.typ
Normal file
67
src/elements/logic/iec_or.typ
Normal file
@@ -0,0 +1,67 @@
|
||||
#import "@preview/cetz:0.3.2": draw
|
||||
#import "iec_gate.typ" as iec-gate
|
||||
|
||||
/// Draws an IEC-OR gate. This function is also available as `element.iec-gate-or()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-or
|
||||
#let iec-gate-or(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false
|
||||
)
|
||||
) = {
|
||||
iec-gate.iec-gate(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: inverted,
|
||||
debug: debug,
|
||||
symbol: $>= 1$,
|
||||
)
|
||||
}
|
||||
|
||||
/// Draws an IEC-NOR gate. This function is also available as `element.iec-gate-nor()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-nor
|
||||
#let iec-gate-nor(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false
|
||||
)
|
||||
) = {
|
||||
iec-gate-or(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: if inverted != "all" {inverted + ("out",)} else {inverted},
|
||||
debug: debug
|
||||
)
|
||||
}
|
67
src/elements/logic/iec_xor.typ
Normal file
67
src/elements/logic/iec_xor.typ
Normal file
@@ -0,0 +1,67 @@
|
||||
#import "@preview/cetz:0.3.2": draw
|
||||
#import "iec_gate.typ" as iec-gate
|
||||
|
||||
/// Draws an IEC-XOR gate. This function is also available as `element.iec-gate-xor()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-xor
|
||||
#let iec-gate-xor(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false
|
||||
)
|
||||
) = {
|
||||
iec-gate.iec-gate(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: inverted,
|
||||
debug: debug,
|
||||
symbol: $= 1$,
|
||||
)
|
||||
}
|
||||
|
||||
/// Draws an IEC-XNOR gate. This function is also available as `element.iec-gate-xnor()`
|
||||
///
|
||||
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||
/// #examples.iec-gate-xnor
|
||||
#let iec-gate-xnor(
|
||||
x: none,
|
||||
y: none,
|
||||
w: none,
|
||||
h: none,
|
||||
inputs: 2,
|
||||
fill: none,
|
||||
stroke: black + 1pt,
|
||||
id: "",
|
||||
inverted: (),
|
||||
debug: (
|
||||
ports: false
|
||||
)
|
||||
) = {
|
||||
iec-gate-xor(
|
||||
x: x,
|
||||
y: y,
|
||||
w: w,
|
||||
h: h,
|
||||
inputs: inputs,
|
||||
fill: fill,
|
||||
stroke: stroke,
|
||||
id: id,
|
||||
inverted: if inverted != "all" {inverted + ("out",)} else {inverted},
|
||||
debug: debug
|
||||
)
|
||||
}
|
@@ -2,4 +2,9 @@
|
||||
#import "elements/logic/and.typ": gate-and, gate-nand
|
||||
#import "elements/logic/or.typ": gate-or, gate-nor
|
||||
#import "elements/logic/xor.typ": gate-xor, gate-xnor
|
||||
#import "elements/logic/buf.typ": gate-buf, gate-not
|
||||
#import "elements/logic/buf.typ": gate-buf, gate-not
|
||||
#import "elements/logic/iec_gate.typ": iec-gate
|
||||
#import "elements/logic/iec_and.typ": iec-gate-and, iec-gate-nand
|
||||
#import "elements/logic/iec_or.typ": iec-gate-or, iec-gate-nor
|
||||
#import "elements/logic/iec_buf.typ": iec-gate-buf, iec-gate-not
|
||||
#import "elements/logic/iec_xor.typ": iec-gate-xor, iec-gate-xnor
|
||||
|
100
src/wire.typ
100
src/wire.typ
@@ -3,7 +3,7 @@
|
||||
|
||||
/// List of valid wire styles
|
||||
/// #examples.wires
|
||||
#let wire-styles = ("direct", "zigzag", "dodge")
|
||||
#let wire-styles = ("direct", "zigzag", "dodge", "guided")
|
||||
#let signal-width = 1pt
|
||||
#let bus-width = 1.5pt
|
||||
|
||||
@@ -109,6 +109,88 @@
|
||||
return (points, anchors)
|
||||
}
|
||||
|
||||
#let get-guided-wire(pts, margins, sides, center-guides, ctx) = {
|
||||
let start = pts.first()
|
||||
let end = pts.last()
|
||||
let (margin-start, margin-end) = margins
|
||||
let (side-start, side-end) = sides
|
||||
let (center_horizontal, center_vertical) = center-guides
|
||||
|
||||
let (ctx, p0) = coordinate.resolve(ctx, start)
|
||||
let (ctx, p6) = coordinate.resolve(ctx, end)
|
||||
p0 = (x: p0.first(), y: p0.at(1))
|
||||
p6 = (x: p6.first(), y: p6.at(1))
|
||||
|
||||
let box_width = calc.abs(p6.x - p0.x)
|
||||
let box_height = calc.abs(p6.y - p0.y)
|
||||
|
||||
// finding correct dx and dy
|
||||
let dx1 = box_width * margin-start / 100%
|
||||
if side-start == "west" {
|
||||
dx1 *= -1
|
||||
} else if side-start == "north" or side-start == "south" { dx1 = 0}
|
||||
|
||||
let dx2 = box_width * margin-end / 100%
|
||||
if side-end == "west" {
|
||||
dx2 *= -1
|
||||
} else if side-end == "north" or side-end == "south" { dx2 = 0}
|
||||
|
||||
let dy1 = box_height * margin-start / 100%
|
||||
if side-start == "south" {
|
||||
dy1 *= -1
|
||||
} else if side-start == "west" or side-start == "east" { dy1 = 0}
|
||||
|
||||
let dy2 = box_height * margin-end / 100%
|
||||
if side-end == "south" {
|
||||
dy2 *= -1
|
||||
} else if side-end == "west" or side-end == "east" { dy2 = 0}
|
||||
|
||||
|
||||
// points that are closest to the edge points
|
||||
let p1 = (p0.x + dx1, p0.y + dy1)
|
||||
let p5 = (p6.x + dx2, p6.y + dy2)
|
||||
|
||||
|
||||
// middle point
|
||||
let center_x = p0.x + box_width * center_horizontal / 100%
|
||||
let center_y = p0.y + box_height * center_vertical / 100%
|
||||
let p3 = (center_x, center_y)
|
||||
|
||||
// setting up the points for that touch the guides
|
||||
let p2 = (0,0)
|
||||
let p4 = (0,0)
|
||||
if side-start in ("north", "south") {
|
||||
p2 = (horizontal: p3, vertical: p1)
|
||||
} else {
|
||||
p2 = (horizontal: p1, vertical: p3)
|
||||
}
|
||||
if side-end in ("north", "south") {
|
||||
p4 = (horizontal: p3, vertical: p5)
|
||||
} else if side-end in ("east", "west") {
|
||||
p4 = (horizontal: p5, vertical: p3)
|
||||
}
|
||||
|
||||
// returning
|
||||
let points = (
|
||||
start,
|
||||
p1,
|
||||
p2,
|
||||
p3,
|
||||
p4,
|
||||
p5,
|
||||
end
|
||||
)
|
||||
let anchors = (
|
||||
"start": start,
|
||||
"start2": points.at(1),
|
||||
"guide-start": points.at(2),
|
||||
"center": points.at(3),
|
||||
"guide-end": points.at(4),
|
||||
"end2": points.at(5),
|
||||
"end": end
|
||||
)
|
||||
return (points, anchors)
|
||||
}
|
||||
/// Draws a wire between two points
|
||||
/// - id (str): The wire's id, for future reference (anchors)
|
||||
/// - pts (array): The two points (as CeTZ compatible coordinates, i.e. XY, relative positions, ids, etc.)
|
||||
@@ -127,6 +209,9 @@
|
||||
/// - dodge-y (number): Y position to dodge the wire to (only with style "dodge")
|
||||
/// - dodge-sides (array): The start and end sides (going out of the connected element) of the wire (only with style "dodge")
|
||||
/// - dodge-margins (array): The start and end margins (i.e. space before dodging) of the wire (only with style "dodge")
|
||||
/// - guided-center (array): the horizontal and vertical guides of the center guides (only with style "guided")
|
||||
/// - guided-margins (array): the start and end of guided margins of the wire (only with style "guided")
|
||||
/// - guided-sides (array): the side of start and end array (must be either "north", "south", "west", "east") (only work with style "guided")
|
||||
#let wire(
|
||||
id, pts,
|
||||
bus: false,
|
||||
@@ -137,6 +222,9 @@
|
||||
dashed: false,
|
||||
style: "direct",
|
||||
reverse: false,
|
||||
guided-center: (50%, 50%),
|
||||
guided-margins: (5%, 5%),
|
||||
guided-sides: ("east", "west"),
|
||||
directed: false,
|
||||
rotate-name: true,
|
||||
zigzag-ratio: 50%,
|
||||
@@ -178,6 +266,14 @@
|
||||
dodge-sides,
|
||||
ctx
|
||||
)
|
||||
} else if style == "guided" {
|
||||
(points, anchors) = get-guided-wire(
|
||||
pts,
|
||||
guided-margins,
|
||||
guided-sides,
|
||||
guided-center,
|
||||
ctx
|
||||
)
|
||||
}
|
||||
|
||||
let mark = (fill: color)
|
||||
@@ -303,4 +399,4 @@
|
||||
name
|
||||
)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
Reference in New Issue
Block a user