added gallery rendering script
This commit is contained in:
parent
2317fec71d
commit
d6248865b3
40
gallery.bash
Normal file
40
gallery.bash
Normal file
@ -0,0 +1,40 @@
|
||||
#!/bin/bash
|
||||
|
||||
PDFS=false
|
||||
|
||||
while getopts "p" flag
|
||||
do
|
||||
case "${flag}" in
|
||||
p) PDFS=true;;
|
||||
esac
|
||||
done
|
||||
|
||||
echo "Generating gallery images"
|
||||
|
||||
set -- ./gallery/*.typ
|
||||
cnt="$#"
|
||||
i=1
|
||||
for f
|
||||
do
|
||||
f2="${f/typ/png}"
|
||||
echo "($i/$cnt) $f -> $f2"
|
||||
typst c --root ./ "$f" "$f2"
|
||||
i=$((i+1))
|
||||
done
|
||||
|
||||
if [ "$PDFS" = true ]
|
||||
then
|
||||
echo
|
||||
echo "Generating gallery PDFs"
|
||||
|
||||
set -- ./gallery/*.typ
|
||||
cnt="$#"
|
||||
i=1
|
||||
for f
|
||||
do
|
||||
f2="${f/typ/pdf}"
|
||||
echo "($i/$cnt) $f -> $f2"
|
||||
typst c --root ./ "$f" "$f2"
|
||||
i=$((i+1))
|
||||
done
|
||||
fi
|
BIN
gallery/test.pdf
BIN
gallery/test.pdf
Binary file not shown.
BIN
gallery/test.png
Normal file
BIN
gallery/test.png
Normal file
Binary file not shown.
After Width: | Height: | Size: 142 KiB |
@ -1,6 +1,6 @@
|
||||
#import "../src/lib.typ": circuit, element, util, wire
|
||||
|
||||
#set page(flipped: true)
|
||||
#set page(width: auto, height: auto, margin: .5cm)
|
||||
|
||||
#circuit({
|
||||
element.block(
|
||||
|
Binary file not shown.
BIN
gallery/test2.png
Normal file
BIN
gallery/test2.png
Normal file
Binary file not shown.
After Width: | Height: | Size: 142 KiB |
@ -1,6 +1,6 @@
|
||||
#import "../src/lib.typ": circuit, element, util, wire
|
||||
|
||||
#set page(flipped: true)
|
||||
#set page(width: auto, height: auto, margin: .5cm)
|
||||
|
||||
#circuit({
|
||||
element.block(
|
||||
|
Binary file not shown.
BIN
gallery/test3.png
Normal file
BIN
gallery/test3.png
Normal file
Binary file not shown.
After Width: | Height: | Size: 70 KiB |
@ -1,8 +1,7 @@
|
||||
#import "@preview/cetz:0.2.2": draw
|
||||
#import "../src/lib.typ": circuit, element, util, wire
|
||||
|
||||
#set page(flipped: true)
|
||||
#let debug = false
|
||||
#set page(width: auto, height: auto, margin: .5cm)
|
||||
|
||||
#circuit({
|
||||
element.block(
|
||||
@ -14,18 +13,14 @@
|
||||
(id: "out1"),
|
||||
(id: "out2"),
|
||||
)
|
||||
),
|
||||
debug: (
|
||||
ports: debug
|
||||
|
||||
)
|
||||
)
|
||||
element.gate-and(
|
||||
x: 4, y: 0, w: 2, h: 2, id: "and1", debug: (ports: debug),
|
||||
x: 4, y: 0, w: 2, h: 2, id: "and1",
|
||||
inverted: ("in1")
|
||||
)
|
||||
element.gate-or(
|
||||
x: 7, y: 0, w: 2, h: 2, id: "or1", debug: (ports: debug),
|
||||
x: 7, y: 0, w: 2, h: 2, id: "or1",
|
||||
inverted: ("in0", "out")
|
||||
)
|
||||
|
||||
@ -47,7 +42,7 @@
|
||||
)
|
||||
|
||||
element.gate-and(
|
||||
x: 11, y: 0, w: 2, h: 2, id: "and2", inputs: 3, debug: (ports: debug),
|
||||
x: 11, y: 0, w: 2, h: 2, id: "and2", inputs: 3,
|
||||
inverted: ("in0", "in2")
|
||||
)
|
||||
for i in range(3) {
|
||||
@ -55,35 +50,35 @@
|
||||
}
|
||||
|
||||
element.gate-xor(
|
||||
x: 14, y: 0, w: 2, h: 2, id: "xor", debug: (ports: debug),
|
||||
x: 14, y: 0, w: 2, h: 2, id: "xor",
|
||||
inverted: ("in1")
|
||||
)
|
||||
|
||||
element.gate-buf(
|
||||
x: 0, y: -3, w: 2, h: 2, id: "buf", debug: (ports: debug)
|
||||
x: 0, y: -3, w: 2, h: 2, id: "buf"
|
||||
)
|
||||
element.gate-not(
|
||||
x: 0, y: -6, w: 2, h: 2, id: "not", debug: (ports: debug)
|
||||
x: 0, y: -6, w: 2, h: 2, id: "not"
|
||||
)
|
||||
|
||||
element.gate-and(
|
||||
x: 3, y: -3, w: 2, h: 2, id: "and", debug: (ports: debug)
|
||||
x: 3, y: -3, w: 2, h: 2, id: "and"
|
||||
)
|
||||
element.gate-nand(
|
||||
x: 3, y: -6, w: 2, h: 2, id: "nand", debug: (ports: debug)
|
||||
x: 3, y: -6, w: 2, h: 2, id: "nand"
|
||||
)
|
||||
|
||||
element.gate-or(
|
||||
x: 6, y: -3, w: 2, h: 2, id: "or", debug: (ports: debug)
|
||||
x: 6, y: -3, w: 2, h: 2, id: "or"
|
||||
)
|
||||
element.gate-nor(
|
||||
x: 6, y: -6, w: 2, h: 2, id: "nor", debug: (ports: debug)
|
||||
x: 6, y: -6, w: 2, h: 2, id: "nor"
|
||||
)
|
||||
|
||||
element.gate-xor(
|
||||
x: 9, y: -3, w: 2, h: 2, id: "xor", debug: (ports: debug)
|
||||
x: 9, y: -3, w: 2, h: 2, id: "xor"
|
||||
)
|
||||
element.gate-xnor(
|
||||
x: 9, y: -6, w: 2, h: 2, id: "xnor", debug: (ports: debug)
|
||||
x: 9, y: -6, w: 2, h: 2, id: "xnor"
|
||||
)
|
||||
})
|
Binary file not shown.
BIN
gallery/test4.png
Normal file
BIN
gallery/test4.png
Normal file
Binary file not shown.
After Width: | Height: | Size: 158 KiB |
@ -1,7 +1,7 @@
|
||||
#import "@preview/cetz:0.2.2": draw
|
||||
#import "../src/lib.typ": *
|
||||
|
||||
#set page(flipped: true)
|
||||
#set page(width: auto, height: auto, margin: .5cm)
|
||||
|
||||
#circuit({
|
||||
element.group(id: "toplvl", name: "Toplevel", {
|
||||
@ -200,18 +200,22 @@
|
||||
draw.content("dmem.south-west", [*External Memories*], anchor: "north", padding: 10pt)
|
||||
})
|
||||
|
||||
wire.wire(
|
||||
"w-dp-clk",
|
||||
("dp-port-clk", (-1, 4.2)),
|
||||
style: "zigzag",
|
||||
zigzag-dir: "horizontal",
|
||||
zigzag-ratio: 100%
|
||||
draw.line(name: "w-dp-clk",
|
||||
"dp-port-clk",
|
||||
(rel: (0, .5), to: ()),
|
||||
(
|
||||
rel: (-.5, 0),
|
||||
to: (horizontal: "toplvl.west", vertical: ())
|
||||
)
|
||||
)
|
||||
draw.content("w-dp-clk.end", "clk", anchor: "east", padding: 3pt)
|
||||
|
||||
wire.wire(
|
||||
"w-dp-rst",
|
||||
("dp-port-rst", (horizontal: (-1, 0), vertical: ()))
|
||||
draw.line(name: "w-dp-rst",
|
||||
"dp-port-rst",
|
||||
(
|
||||
rel: (-.5, 0),
|
||||
to: (horizontal: "toplvl.west", vertical: ())
|
||||
)
|
||||
)
|
||||
draw.content("w-dp-rst.end", "rst", anchor: "east", padding: 3pt)
|
||||
})
|
||||
|
Binary file not shown.
BIN
gallery/test5.png
Normal file
BIN
gallery/test5.png
Normal file
Binary file not shown.
After Width: | Height: | Size: 276 KiB |
@ -1,7 +1,7 @@
|
||||
#import "@preview/cetz:0.2.2": draw
|
||||
#import "../src/lib.typ": *
|
||||
|
||||
#set page(flipped: true, paper: "a3")
|
||||
#set page(width: auto, height: auto, margin: .5cm)
|
||||
|
||||
#circuit({
|
||||
element.multiplexer(
|
||||
|
BIN
manual.pdf
BIN
manual.pdf
Binary file not shown.
Loading…
Reference in New Issue
Block a user