Compare commits
7 Commits
v0.1.0
...
add_iec_ga
Author | SHA1 | Date | |
---|---|---|---|
9966656e8b | |||
3ccb79c6c2 | |||
2bb7e3b5a9 | |||
371caf094c
|
|||
841f53e76c | |||
ff0b91e683
|
|||
e1e561bb6c
|
@ -56,7 +56,7 @@ For more information, see the [manual](manual.pdf)
|
|||||||
|
|
||||||
To use this package, simply import [circuiteria](https://typst.app/universe/package/circuiteria) and call the `circuit` function:
|
To use this package, simply import [circuiteria](https://typst.app/universe/package/circuiteria) and call the `circuit` function:
|
||||||
```typ
|
```typ
|
||||||
#import "@preview/circuiteria:0.1.0"
|
#import "@preview/circuiteria:0.2.0"
|
||||||
#circuiteria.circuit({
|
#circuiteria.circuit({
|
||||||
import circuiteria: *
|
import circuiteria: *
|
||||||
...
|
...
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "../src/circuit.typ": circuit
|
#import "../src/circuit.typ": circuit
|
||||||
#import "../src/util.typ"
|
#import "../src/util.typ"
|
||||||
|
|
||||||
|
40
gallery.bash
@ -1,40 +0,0 @@
|
|||||||
#!/bin/bash
|
|
||||||
|
|
||||||
PDFS=false
|
|
||||||
|
|
||||||
while getopts "p" flag
|
|
||||||
do
|
|
||||||
case "${flag}" in
|
|
||||||
p) PDFS=true;;
|
|
||||||
esac
|
|
||||||
done
|
|
||||||
|
|
||||||
echo "Generating gallery images"
|
|
||||||
|
|
||||||
set -- ./gallery/*.typ
|
|
||||||
cnt="$#"
|
|
||||||
i=1
|
|
||||||
for f
|
|
||||||
do
|
|
||||||
f2="${f/typ/png}"
|
|
||||||
echo "($i/$cnt) $f -> $f2"
|
|
||||||
typst c --root ./ "$f" "$f2"
|
|
||||||
i=$((i+1))
|
|
||||||
done
|
|
||||||
|
|
||||||
if [ "$PDFS" = true ]
|
|
||||||
then
|
|
||||||
echo
|
|
||||||
echo "Generating gallery PDFs"
|
|
||||||
|
|
||||||
set -- ./gallery/*.typ
|
|
||||||
cnt="$#"
|
|
||||||
i=1
|
|
||||||
for f
|
|
||||||
do
|
|
||||||
f2="${f/typ/pdf}"
|
|
||||||
echo "($i/$cnt) $f -> $f2"
|
|
||||||
typst c --root ./ "$f" "$f2"
|
|
||||||
i=$((i+1))
|
|
||||||
done
|
|
||||||
fi
|
|
Before Width: | Height: | Size: 45 KiB After Width: | Height: | Size: 45 KiB |
BIN
gallery/test.png
Before Width: | Height: | Size: 142 KiB After Width: | Height: | Size: 142 KiB |
Before Width: | Height: | Size: 142 KiB After Width: | Height: | Size: 142 KiB |
Before Width: | Height: | Size: 66 KiB After Width: | Height: | Size: 66 KiB |
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "../src/lib.typ": circuit, element, util, wire
|
#import "../src/lib.typ": circuit, element, util, wire
|
||||||
|
|
||||||
#set page(width: auto, height: auto, margin: .5cm)
|
#set page(width: auto, height: auto, margin: .5cm)
|
||||||
|
Before Width: | Height: | Size: 159 KiB After Width: | Height: | Size: 159 KiB |
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "../src/lib.typ": *
|
#import "../src/lib.typ": *
|
||||||
|
|
||||||
#set page(width: auto, height: auto, margin: .5cm)
|
#set page(width: auto, height: auto, margin: .5cm)
|
||||||
|
Before Width: | Height: | Size: 276 KiB After Width: | Height: | Size: 275 KiB |
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "../src/lib.typ": *
|
#import "../src/lib.typ": *
|
||||||
|
|
||||||
#set page(width: auto, height: auto, margin: .5cm)
|
#set page(width: auto, height: auto, margin: .5cm)
|
||||||
|
Before Width: | Height: | Size: 76 KiB After Width: | Height: | Size: 76 KiB |
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw, vector
|
#import "@preview/cetz:0.3.2": draw, vector
|
||||||
#import "../src/lib.typ": *
|
#import "../src/lib.typ": *
|
||||||
|
|
||||||
#set page(width: auto, height: auto, margin: .5cm)
|
#set page(width: auto, height: auto, margin: .5cm)
|
||||||
|
BIN
gallery/test7.pdf
Normal file
BIN
gallery/test7.png
Normal file
After Width: | Height: | Size: 34 KiB |
98
gallery/test7.typ
Normal file
@ -0,0 +1,98 @@
|
|||||||
|
#import "@preview/cetz:0.3.2": draw
|
||||||
|
#import "../src/lib.typ": circuit, element, util, wire
|
||||||
|
|
||||||
|
#set page(width: auto, height: auto, margin: .5cm)
|
||||||
|
|
||||||
|
#circuit({
|
||||||
|
element.gate-iec-buf(
|
||||||
|
x: 0,
|
||||||
|
y: 0,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
id: "iec-buf",
|
||||||
|
inputs: 1,
|
||||||
|
)
|
||||||
|
wire.stub("iec-buf-port-in0", "west")
|
||||||
|
|
||||||
|
element.gate-iec-not(
|
||||||
|
x: 3,
|
||||||
|
y: 0,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
id: "iec-not",
|
||||||
|
inputs: 1,
|
||||||
|
)
|
||||||
|
wire.stub("iec-not-port-in0", "west")
|
||||||
|
|
||||||
|
element.gate-iec-and(
|
||||||
|
id: "iec-and",
|
||||||
|
x: 0,
|
||||||
|
y: -3,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
inputs: 2,
|
||||||
|
)
|
||||||
|
for i in range(2) {
|
||||||
|
wire.stub("iec-and-port-in" + str(i), "west")
|
||||||
|
}
|
||||||
|
|
||||||
|
element.gate-iec-nand(
|
||||||
|
id: "iec-nand",
|
||||||
|
x: 3,
|
||||||
|
y: -3,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
inputs: 2,
|
||||||
|
)
|
||||||
|
for i in range(2) {
|
||||||
|
wire.stub("iec-nand-port-in" + str(i), "west")
|
||||||
|
}
|
||||||
|
|
||||||
|
element.gate-iec-or(
|
||||||
|
id: "iec-or",
|
||||||
|
x: 0,
|
||||||
|
y: -6,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
inputs: 2,
|
||||||
|
)
|
||||||
|
for i in range(2) {
|
||||||
|
wire.stub("iec-or-port-in" + str(i), "west")
|
||||||
|
}
|
||||||
|
|
||||||
|
element.gate-iec-nor(
|
||||||
|
id: "iec-nor",
|
||||||
|
x: 3,
|
||||||
|
y: -6,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
inputs: 2,
|
||||||
|
)
|
||||||
|
for i in range(2) {
|
||||||
|
wire.stub("iec-nor-port-in" + str(i), "west")
|
||||||
|
}
|
||||||
|
|
||||||
|
element.gate-iec-xor(
|
||||||
|
id: "iec-xor",
|
||||||
|
x: 0,
|
||||||
|
y: -9,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
inputs: 2,
|
||||||
|
)
|
||||||
|
for i in range(2) {
|
||||||
|
wire.stub("iec-xor-port-in" + str(i), "west")
|
||||||
|
}
|
||||||
|
|
||||||
|
element.gate-iec-nxor(
|
||||||
|
id: "iec-nxor",
|
||||||
|
x: 3,
|
||||||
|
y: -9,
|
||||||
|
w: 2,
|
||||||
|
h: 2,
|
||||||
|
inputs: 2,
|
||||||
|
)
|
||||||
|
for i in range(2) {
|
||||||
|
wire.stub("iec-nxor-port-in" + str(i), "west")
|
||||||
|
}
|
||||||
|
})
|
11
justfile
Normal file
@ -0,0 +1,11 @@
|
|||||||
|
# Local Variables:
|
||||||
|
# mode: makefile
|
||||||
|
# End:
|
||||||
|
gallery_dir := "./gallery"
|
||||||
|
set shell := ["bash", "-uc"]
|
||||||
|
|
||||||
|
manual:
|
||||||
|
typst c manual.typ manual.pdf
|
||||||
|
|
||||||
|
gallery:
|
||||||
|
for f in "{{gallery_dir}}"/*.typ; do typst c --root . "$f" "${f%typ}png"; done
|
BIN
manual.pdf
41
manual.typ
@ -1,5 +1,5 @@
|
|||||||
#import "@preview/tidy:0.3.0"
|
#import "@preview/tidy:0.4.1"
|
||||||
#import "@preview/cetz:0.2.2": draw, canvas
|
#import "@preview/cetz:0.3.2": draw, canvas
|
||||||
#import "src/lib.typ"
|
#import "src/lib.typ"
|
||||||
#import "doc/examples.typ"
|
#import "doc/examples.typ"
|
||||||
#import "src/circuit.typ": circuit
|
#import "src/circuit.typ": circuit
|
||||||
@ -12,7 +12,7 @@
|
|||||||
numbering("1.1", ..num)
|
numbering("1.1", ..num)
|
||||||
})
|
})
|
||||||
#{
|
#{
|
||||||
outline(indent: true, depth: 3)
|
outline(indent: auto, depth: 3)
|
||||||
}
|
}
|
||||||
|
|
||||||
#show link: set text(blue)
|
#show link: set text(blue)
|
||||||
@ -47,7 +47,7 @@
|
|||||||
|
|
||||||
#set page(numbering: "1/1", header: align(right)[circuiteria #sym.dash.em v#lib.version])
|
#set page(numbering: "1/1", header: align(right)[circuiteria #sym.dash.em v#lib.version])
|
||||||
#set page(
|
#set page(
|
||||||
header: locate(loc => {
|
header: context {
|
||||||
let txt = [circuiteria #sym.dash.em v#lib.version]
|
let txt = [circuiteria #sym.dash.em v#lib.version]
|
||||||
let cnt = counter(heading)
|
let cnt = counter(heading)
|
||||||
let cnt-val = cnt.get()
|
let cnt-val = cnt.get()
|
||||||
@ -65,8 +65,8 @@
|
|||||||
#rect(width: 100%, height: .5em, radius: .25em, stroke: none, fill: util.colors.values().at(i))
|
#rect(width: 100%, height: .5em, radius: .25em, stroke: none, fill: util.colors.values().at(i))
|
||||||
]
|
]
|
||||||
)
|
)
|
||||||
}),
|
},
|
||||||
footer: locate(loc => {
|
footer: context {
|
||||||
let cnt = counter(heading)
|
let cnt = counter(heading)
|
||||||
let cnt-val = cnt.get()
|
let cnt-val = cnt.get()
|
||||||
if cnt-val.len() < 2 { return }
|
if cnt-val.len() < 2 { return }
|
||||||
@ -80,12 +80,12 @@
|
|||||||
],
|
],
|
||||||
counter(page).display("1/1", both: true)
|
counter(page).display("1/1", both: true)
|
||||||
)
|
)
|
||||||
})
|
}
|
||||||
)
|
)
|
||||||
|
|
||||||
#let doc-ref(target, full: false, var: false) = {
|
#let doc-ref(target, full: false, var: false) = {
|
||||||
let (module, func) = target.split(".")
|
let (module, func) = target.split(".")
|
||||||
let label-name = module + func
|
let label-name = module + "-" + func
|
||||||
let display-name = func
|
let display-name = func
|
||||||
if full {
|
if full {
|
||||||
display-name = target
|
display-name = target
|
||||||
@ -94,7 +94,7 @@
|
|||||||
label-name += "()"
|
label-name += "()"
|
||||||
display-name += "()"
|
display-name += "()"
|
||||||
}
|
}
|
||||||
link(label(label-name))[#display-name]
|
link(label(label-name), raw(display-name))
|
||||||
}
|
}
|
||||||
|
|
||||||
= Introduction
|
= Introduction
|
||||||
@ -103,11 +103,21 @@ This package provides a way to make beautiful block circuit diagrams using the C
|
|||||||
|
|
||||||
= Usage
|
= Usage
|
||||||
|
|
||||||
Simply import #link("src/lib.typ") and call the `circuit` function:
|
Simply import Circuiteria and call the `circuit` function:
|
||||||
#pad(left: 1em)[```typ
|
#pad(left: 1em)[```typ
|
||||||
#import "src/lib.typ"
|
#import "@preview/circuiteria:0.2.0"
|
||||||
#lib.circuit({
|
#circuiteria.circuit({
|
||||||
import lib: *
|
import circuiteria: *
|
||||||
|
...
|
||||||
|
})
|
||||||
|
```]
|
||||||
|
|
||||||
|
== Project installation
|
||||||
|
If you have installed Circuiteria directly in your project, import #link("src/lib.typ") and call the `circuit` function:
|
||||||
|
#pad(left: 1em)[```typ
|
||||||
|
#import "src/lib.typ" as circuiteria
|
||||||
|
#circuiteria.circuit({
|
||||||
|
import circuiteria: *
|
||||||
...
|
...
|
||||||
})
|
})
|
||||||
```]
|
```]
|
||||||
@ -117,6 +127,7 @@ Simply import #link("src/lib.typ") and call the `circuit` function:
|
|||||||
#let circuit-docs = tidy.parse-module(
|
#let circuit-docs = tidy.parse-module(
|
||||||
read("src/circuit.typ"),
|
read("src/circuit.typ"),
|
||||||
name: "circuit",
|
name: "circuit",
|
||||||
|
old-syntax: true,
|
||||||
require-all-parameters: true
|
require-all-parameters: true
|
||||||
)
|
)
|
||||||
#tidy.show-module(circuit-docs)
|
#tidy.show-module(circuit-docs)
|
||||||
@ -126,6 +137,7 @@ Simply import #link("src/lib.typ") and call the `circuit` function:
|
|||||||
#let util-docs = tidy.parse-module(
|
#let util-docs = tidy.parse-module(
|
||||||
read("src/util.typ"),
|
read("src/util.typ"),
|
||||||
name: "util",
|
name: "util",
|
||||||
|
old-syntax: true,
|
||||||
require-all-parameters: true,
|
require-all-parameters: true,
|
||||||
scope: (
|
scope: (
|
||||||
util: util,
|
util: util,
|
||||||
@ -140,6 +152,7 @@ Simply import #link("src/lib.typ") and call the `circuit` function:
|
|||||||
#let wire-docs = tidy.parse-module(
|
#let wire-docs = tidy.parse-module(
|
||||||
read("src/wire.typ"),
|
read("src/wire.typ"),
|
||||||
name: "wire",
|
name: "wire",
|
||||||
|
old-syntax: true,
|
||||||
require-all-parameters: true,
|
require-all-parameters: true,
|
||||||
scope: (
|
scope: (
|
||||||
wire: wire,
|
wire: wire,
|
||||||
@ -161,6 +174,7 @@ Simply import #link("src/lib.typ") and call the `circuit` function:
|
|||||||
read("src/elements/multiplexer.typ") + "\n" +
|
read("src/elements/multiplexer.typ") + "\n" +
|
||||||
read("src/elements/group.typ"),
|
read("src/elements/group.typ"),
|
||||||
name: "element",
|
name: "element",
|
||||||
|
old-syntax: true,
|
||||||
scope: (
|
scope: (
|
||||||
element: element,
|
element: element,
|
||||||
circuit: circuit,
|
circuit: circuit,
|
||||||
@ -183,6 +197,7 @@ Simply import #link("src/lib.typ") and call the `circuit` function:
|
|||||||
read("src/elements/logic/or.typ") + "\n" +
|
read("src/elements/logic/or.typ") + "\n" +
|
||||||
read("src/elements/logic/xor.typ"),
|
read("src/elements/logic/xor.typ"),
|
||||||
name: "gates",
|
name: "gates",
|
||||||
|
old-syntax: true,
|
||||||
scope: (
|
scope: (
|
||||||
element: element,
|
element: element,
|
||||||
circuit: circuit,
|
circuit: circuit,
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": canvas
|
#import "@preview/cetz:0.3.2": canvas
|
||||||
#import "@preview/tidy:0.3.0"
|
#import "@preview/tidy:0.3.0"
|
||||||
|
|
||||||
/// Draws a block circuit diagram
|
/// Draws a block circuit diagram
|
||||||
|
@ -11,5 +11,10 @@
|
|||||||
#import "elements/logic/or.typ": gate-or, gate-nor
|
#import "elements/logic/or.typ": gate-or, gate-nor
|
||||||
#import "elements/logic/xor.typ": gate-xor, gate-xnor
|
#import "elements/logic/xor.typ": gate-xor, gate-xnor
|
||||||
#import "elements/logic/buf.typ": gate-buf, gate-not
|
#import "elements/logic/buf.typ": gate-buf, gate-not
|
||||||
|
#import "elements/logic/iec_gate.typ": iec-gate
|
||||||
|
#import "elements/logic/iec_and.typ": gate-iec-and, gate-iec-nand
|
||||||
|
#import "elements/logic/iec_buf.typ": gate-iec-buf, gate-iec-not
|
||||||
|
#import "elements/logic/iec_or.typ": gate-iec-or, gate-iec-nor
|
||||||
|
#import "elements/logic/iec_xor.typ": gate-iec-xor, gate-iec-nxor
|
||||||
|
|
||||||
#import "elements/group.typ": group
|
#import "elements/group.typ": group
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "element.typ"
|
#import "element.typ"
|
||||||
#import "ports.typ": add-port
|
#import "ports.typ": add-port
|
||||||
|
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "element.typ"
|
#import "element.typ"
|
||||||
|
|
||||||
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw, coordinate
|
#import "@preview/cetz:0.3.2": draw, coordinate
|
||||||
#import "ports.typ": add-ports, add-port
|
#import "ports.typ": add-ports, add-port
|
||||||
#import "../util.typ"
|
#import "../util.typ"
|
||||||
|
|
||||||
@ -88,15 +88,26 @@
|
|||||||
if to-side in ports-margins {
|
if to-side in ports-margins {
|
||||||
margins = ports-margins.at(to-side)
|
margins = ports-margins.at(to-side)
|
||||||
}
|
}
|
||||||
let used-pct = 100% - margins.at(0) - margins.at(1)
|
|
||||||
let used-height = height * used-pct / 100%
|
|
||||||
let top-margin = height * margins.at(0) / 100%
|
|
||||||
|
|
||||||
let dy = used-height * (i + 1) / (ports.at(to-side).len() + 1)
|
|
||||||
|
|
||||||
if not auto-ports {
|
let dy
|
||||||
|
let top-margin
|
||||||
|
if to-side in ("east", "west") {
|
||||||
|
let used-pct = 100% - margins.at(0) - margins.at(1)
|
||||||
|
let used-height = height * used-pct / 100%
|
||||||
|
top-margin = height * margins.at(0) / 100%
|
||||||
|
|
||||||
|
dy = used-height * (i + 1) / (ports.at(to-side).len() + 1)
|
||||||
|
|
||||||
|
if not auto-ports {
|
||||||
|
top-margin = 0
|
||||||
|
dy = ports-y.at(to)(height)
|
||||||
|
}
|
||||||
|
} else if to-side == "north" {
|
||||||
|
dy = 0
|
||||||
|
top-margin = 0
|
||||||
|
} else if to-side == "south" {
|
||||||
|
dy = height
|
||||||
top-margin = 0
|
top-margin = 0
|
||||||
dy = ports-y.at(to)(height)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
let (ctx, from-pos) = coordinate.resolve(ctx, from)
|
let (ctx, from-pos) = coordinate.resolve(ctx, from)
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "element.typ"
|
#import "element.typ"
|
||||||
#import "ports.typ": add-port
|
#import "ports.typ": add-port
|
||||||
|
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw, coordinate
|
#import "@preview/cetz:0.3.2": draw, coordinate
|
||||||
#import "../util.typ"
|
#import "../util.typ"
|
||||||
|
|
||||||
/// Draws a group of elements
|
/// Draws a group of elements
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "gate.typ"
|
#import "gate.typ"
|
||||||
|
|
||||||
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "gate.typ"
|
#import "gate.typ"
|
||||||
|
|
||||||
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw, coordinate
|
#import "@preview/cetz:0.3.2": draw, coordinate
|
||||||
#import "../ports.typ": add-ports, add-port
|
#import "../ports.typ": add-ports, add-port
|
||||||
#import "../element.typ"
|
#import "../element.typ"
|
||||||
|
|
||||||
|
70
src/elements/logic/iec_and.typ
Normal file
@ -0,0 +1,70 @@
|
|||||||
|
#import "@preview/cetz:0.3.2": draw
|
||||||
|
// #import "iec_gate.typ" as iec-gate
|
||||||
|
#import "iec_gate.typ" as iec-gate
|
||||||
|
|
||||||
|
|
||||||
|
/// Draws an IEC-AND gate. This function is also available as `element.iec-gate-and()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-and
|
||||||
|
#let gate-iec-and(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
),
|
||||||
|
) = {
|
||||||
|
iec-gate.iec-gate(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: inverted,
|
||||||
|
debug: debug,
|
||||||
|
symbol: $amp$,
|
||||||
|
)
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Draws an IEC-NAND gate. This function is also available as `element.iec-gate-nand()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-nand
|
||||||
|
#let gate-iec-nand(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
),
|
||||||
|
) = {
|
||||||
|
gate-iec-and(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: if inverted != "all" {inverted + ("out",)} else {inverted},
|
||||||
|
debug: debug,
|
||||||
|
)
|
||||||
|
}
|
68
src/elements/logic/iec_buf.typ
Normal file
@ -0,0 +1,68 @@
|
|||||||
|
#import "@preview/cetz:0.3.2": draw
|
||||||
|
#import "iec_gate.typ" as iec-gate
|
||||||
|
|
||||||
|
|
||||||
|
/// Draws an IEC buffer gate. This function is also available as `element.iec-gate-buf()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-buf
|
||||||
|
#let gate-iec-buf(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false,
|
||||||
|
),
|
||||||
|
) = {
|
||||||
|
iec-gate.iec-gate(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: inverted,
|
||||||
|
debug: debug,
|
||||||
|
symbol: "1",
|
||||||
|
)
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Draws an IEC NOT gate. This function is also available as `element.iec-gate-not()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-not
|
||||||
|
#let gate-iec-not(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false,
|
||||||
|
),
|
||||||
|
) = {
|
||||||
|
gate-iec-buf(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: if inverted != "all" { inverted + ("out",) } else { inverted },
|
||||||
|
debug: debug,
|
||||||
|
)
|
||||||
|
}
|
148
src/elements/logic/iec_gate.typ
Normal file
@ -0,0 +1,148 @@
|
|||||||
|
#import "@preview/cetz:0.3.2": draw, coordinate
|
||||||
|
#import "../ports.typ": add-ports, add-port
|
||||||
|
#import "../element.typ"
|
||||||
|
|
||||||
|
#let default-draw-shape(id, tl, tr, br, bl, fill, stroke, symbol) = {
|
||||||
|
let (x, y) = bl
|
||||||
|
let (width, height) = (tr.at(0) - x, tr.at(1) - y)
|
||||||
|
|
||||||
|
let t = (x + width / 2, y + height)
|
||||||
|
let b = (x + width / 2, y)
|
||||||
|
|
||||||
|
let f = draw.group(
|
||||||
|
name: id,
|
||||||
|
{
|
||||||
|
draw.merge-path(
|
||||||
|
inset: 0.5em,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
name: id + "-path",
|
||||||
|
close: true,
|
||||||
|
{
|
||||||
|
draw.line(bl, tl, tr, br)
|
||||||
|
},
|
||||||
|
)
|
||||||
|
|
||||||
|
draw.content(
|
||||||
|
(x + width / 2, y + height / 2),
|
||||||
|
padding: 0.5em,
|
||||||
|
align(center)[*$ symbol $*],
|
||||||
|
)
|
||||||
|
|
||||||
|
draw.anchor("north", t)
|
||||||
|
draw.anchor("south", b)
|
||||||
|
},
|
||||||
|
)
|
||||||
|
return (f, tl, tr, br, bl)
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/// Draws a logic gate. This function is also available as `element.iec-gate()`
|
||||||
|
///
|
||||||
|
/// - draw-shape (function): see #doc-ref("element.elmt")
|
||||||
|
/// - x (number, dictionary): see #doc-ref("element.elmt")
|
||||||
|
/// - y (number, dictionary): see #doc-ref("element.elmt")
|
||||||
|
/// - w (number): see #doc-ref("element.elmt")
|
||||||
|
/// - h (number): see #doc-ref("element.elmt")
|
||||||
|
/// - inputs (int): The number of inputs
|
||||||
|
/// - fill (none, color): see #doc-ref("element.elmt")
|
||||||
|
/// - stroke (stroke): see #doc-ref("element.elmt")
|
||||||
|
/// - id (str): see #doc-ref("element.elmt")
|
||||||
|
/// - inverted (str, array): Either "all" or an array of port ids to display as inverted
|
||||||
|
/// - inverted-radius (number): The radius of inverted ports dot
|
||||||
|
/// - debug (dictionary): see #doc-ref("element.elmt")
|
||||||
|
/// - symbol (str): The symbol to display at the center of the gate
|
||||||
|
#let iec-gate(
|
||||||
|
draw-shape: default-draw-shape,
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
inverted-radius: 0.1,
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
),
|
||||||
|
symbol: "",
|
||||||
|
) = draw.get-ctx(ctx => {
|
||||||
|
let width = w
|
||||||
|
let height = h
|
||||||
|
|
||||||
|
let x = x
|
||||||
|
let y = y
|
||||||
|
if x == none { panic("Parameter x must be set") }
|
||||||
|
if y == none { panic("Parameter y must be set") }
|
||||||
|
if w == none { panic("Parameter w must be set") }
|
||||||
|
if h == none { panic("Parameter h must be set") }
|
||||||
|
|
||||||
|
if (type(x) == dictionary) {
|
||||||
|
let offset = x.rel
|
||||||
|
let to = x.to
|
||||||
|
let (ctx, to-pos) = coordinate.resolve(ctx, (rel: (offset, 0), to: to))
|
||||||
|
x = to-pos.at(0)
|
||||||
|
}
|
||||||
|
|
||||||
|
if (type(y) == dictionary) {
|
||||||
|
let from = y.from
|
||||||
|
let to = y.to
|
||||||
|
|
||||||
|
let dy
|
||||||
|
if to == "out" {
|
||||||
|
dy = height / 2
|
||||||
|
} else {
|
||||||
|
dy = height * (i + 0.5) / inputs
|
||||||
|
}
|
||||||
|
|
||||||
|
let (ctx, from-pos) = coordinate.resolve(ctx, from)
|
||||||
|
y = from-pos.at(1) + dy - height
|
||||||
|
}
|
||||||
|
|
||||||
|
let tl = (x, y + height)
|
||||||
|
let tr = (x + width, y + height)
|
||||||
|
let br = (x + width, y)
|
||||||
|
let bl = (x, y)
|
||||||
|
|
||||||
|
// Workaround because CeTZ needs to have all draw functions in the body
|
||||||
|
let func = {}
|
||||||
|
(func, tl, tr, br, bl) = draw-shape(id, tl, tr, br, bl, fill, stroke, symbol)
|
||||||
|
func
|
||||||
|
|
||||||
|
let space = 100% / inputs
|
||||||
|
for i in range(inputs) {
|
||||||
|
let pct = (i + 0.5) * space
|
||||||
|
let a = (tl, pct, bl)
|
||||||
|
let b = (tr, pct, br)
|
||||||
|
let int-name = id + "i" + str(i)
|
||||||
|
draw.intersections(
|
||||||
|
int-name,
|
||||||
|
func,
|
||||||
|
draw.hide(draw.line(a, b))
|
||||||
|
)
|
||||||
|
let port-name = "in" + str(i)
|
||||||
|
let port-pos = int-name + ".0"
|
||||||
|
if inverted == "all" or port-name in inverted {
|
||||||
|
draw.circle(port-pos, radius: inverted-radius, anchor: "east", stroke: stroke)
|
||||||
|
port-pos = (rel: (-2 * inverted-radius, 0), to: port-pos)
|
||||||
|
}
|
||||||
|
add-port(
|
||||||
|
id, "west",
|
||||||
|
(id: port-name), port-pos,
|
||||||
|
debug: debug.ports
|
||||||
|
)
|
||||||
|
}
|
||||||
|
|
||||||
|
let out-pos = id + ".east"
|
||||||
|
if inverted == "all" or "out" in inverted {
|
||||||
|
draw.circle(out-pos, radius: inverted-radius, anchor: "west", stroke: stroke)
|
||||||
|
out-pos = (rel: (2 * inverted-radius, 0), to: out-pos)
|
||||||
|
}
|
||||||
|
add-port(
|
||||||
|
id, "east",
|
||||||
|
(id: "out"), out-pos,
|
||||||
|
debug: debug.ports
|
||||||
|
)
|
||||||
|
})
|
67
src/elements/logic/iec_or.typ
Normal file
@ -0,0 +1,67 @@
|
|||||||
|
#import "@preview/cetz:0.3.2": draw
|
||||||
|
#import "iec_gate.typ" as iec-gate
|
||||||
|
|
||||||
|
/// Draws an IEC-OR gate. This function is also available as `element.iec-gate-or()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-or
|
||||||
|
#let gate-iec-or(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
)
|
||||||
|
) = {
|
||||||
|
iec-gate.iec-gate(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: inverted,
|
||||||
|
debug: debug,
|
||||||
|
symbol: $>= 1$,
|
||||||
|
)
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Draws an IEC-NOR gate. This function is also available as `element.iec-gate-nor()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-nor
|
||||||
|
#let gate-iec-nor(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
)
|
||||||
|
) = {
|
||||||
|
gate-iec-or(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: if inverted != "all" {inverted + ("out",)} else {inverted},
|
||||||
|
debug: debug
|
||||||
|
)
|
||||||
|
}
|
67
src/elements/logic/iec_xor.typ
Normal file
@ -0,0 +1,67 @@
|
|||||||
|
#import "@preview/cetz:0.3.2": draw
|
||||||
|
#import "iec_gate.typ" as iec-gate
|
||||||
|
|
||||||
|
/// Draws an IEC-XOR gate. This function is also available as `element.iec-gate-xor()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-xor
|
||||||
|
#let gate-iec-xor(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
)
|
||||||
|
) = {
|
||||||
|
iec-gate.iec-gate(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: inverted,
|
||||||
|
debug: debug,
|
||||||
|
symbol: $= 1$,
|
||||||
|
)
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Draws an IEC-NXOR gate. This function is also available as `element.iec-gate-nxor()`
|
||||||
|
///
|
||||||
|
/// For parameters, see #doc-ref("gates.iec-gate")
|
||||||
|
/// #examples.gate-iec-nxor
|
||||||
|
#let gate-iec-nxor(
|
||||||
|
x: none,
|
||||||
|
y: none,
|
||||||
|
w: none,
|
||||||
|
h: none,
|
||||||
|
inputs: 2,
|
||||||
|
fill: none,
|
||||||
|
stroke: black + 1pt,
|
||||||
|
id: "",
|
||||||
|
inverted: (),
|
||||||
|
debug: (
|
||||||
|
ports: false
|
||||||
|
)
|
||||||
|
) = {
|
||||||
|
gate-iec-xor(
|
||||||
|
x: x,
|
||||||
|
y: y,
|
||||||
|
w: w,
|
||||||
|
h: h,
|
||||||
|
inputs: inputs,
|
||||||
|
fill: fill,
|
||||||
|
stroke: stroke,
|
||||||
|
id: id,
|
||||||
|
inverted: if inverted != "all" {inverted + ("out",)} else {inverted},
|
||||||
|
debug: debug
|
||||||
|
)
|
||||||
|
}
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "gate.typ"
|
#import "gate.typ"
|
||||||
|
|
||||||
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
#let draw-shape(id, tl, tr, br, bl, fill, stroke) = {
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "gate.typ"
|
#import "gate.typ"
|
||||||
|
|
||||||
#let space = 10%
|
#let space = 10%
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "../util.typ"
|
#import "../util.typ"
|
||||||
#import "element.typ"
|
#import "element.typ"
|
||||||
#import "ports.typ": add-port
|
#import "ports.typ": add-port
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw
|
#import "@preview/cetz:0.3.2": draw
|
||||||
#import "../util.typ": rotate-anchor
|
#import "../util.typ": rotate-anchor
|
||||||
|
|
||||||
#let add-port(
|
#let add-port(
|
||||||
|
@ -2,4 +2,9 @@
|
|||||||
#import "elements/logic/and.typ": gate-and, gate-nand
|
#import "elements/logic/and.typ": gate-and, gate-nand
|
||||||
#import "elements/logic/or.typ": gate-or, gate-nor
|
#import "elements/logic/or.typ": gate-or, gate-nor
|
||||||
#import "elements/logic/xor.typ": gate-xor, gate-xnor
|
#import "elements/logic/xor.typ": gate-xor, gate-xnor
|
||||||
#import "elements/logic/buf.typ": gate-buf, gate-not
|
#import "elements/logic/buf.typ": gate-buf, gate-not
|
||||||
|
#import "elements/logic/iec_gate.typ": iec-gate
|
||||||
|
#import "elements/logic/iec_and.typ": gate-iec-and, gate-iec-nand
|
||||||
|
#import "elements/logic/iec_or.typ": gate-iec-or, gate-iec-nor
|
||||||
|
#import "elements/logic/iec_buf.typ": gate-iec-buf, gate-iec-not
|
||||||
|
#import "elements/logic/iec_xor.typ": gate-iec-xor, gate-iec-nxor
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#let version = version(0, 1, 0)
|
#let version = version(0, 2, 0)
|
||||||
|
|
||||||
#import "circuit.typ": circuit
|
#import "circuit.typ": circuit
|
||||||
#import "element.typ"
|
#import "element.typ"
|
||||||
|
@ -1,4 +1,4 @@
|
|||||||
#import "@preview/cetz:0.2.2": draw, coordinate
|
#import "@preview/cetz:0.3.2": draw, coordinate
|
||||||
#import "util.typ": opposite-anchor
|
#import "util.typ": opposite-anchor
|
||||||
|
|
||||||
/// List of valid wire styles
|
/// List of valid wire styles
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
[package]
|
[package]
|
||||||
name = "circuiteria"
|
name = "circuiteria"
|
||||||
version = "0.1.0"
|
version = "0.2.0"
|
||||||
compiler = "0.11.0"
|
compiler = "0.13.0"
|
||||||
repository = "https://git.kb28.ch/HEL/circuiteria"
|
repository = "https://git.kb28.ch/HEL/circuiteria"
|
||||||
entrypoint = "src/lib.typ"
|
entrypoint = "src/lib.typ"
|
||||||
authors = [
|
authors = [
|
||||||
@ -11,4 +11,4 @@ categories = [ "visualization" ]
|
|||||||
license = "Apache-2.0"
|
license = "Apache-2.0"
|
||||||
description = "Drawing block circuits with Typst made easy, using CeTZ"
|
description = "Drawing block circuits with Typst made easy, using CeTZ"
|
||||||
keywords = [ "circuit", "block", "draw" ]
|
keywords = [ "circuit", "block", "draw" ]
|
||||||
exclude = [ "gallery", "gallery.bash", "doc" ]
|
exclude = [ "gallery", "justfile", "doc" ]
|