1
0
mirror of https://github.com/Klagarge/Cursor.git synced 2024-11-22 17:43:26 +00:00

work with 2 small bugs

sometimes won't go back to pos2, and problem if many push in same button
This commit is contained in:
Rémi Heredero 2022-01-20 22:02:29 +01:00
parent e8427259ac
commit 042f09e0f1
97 changed files with 73520 additions and 9649 deletions

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@ -68,11 +68,11 @@ NET "LEDs<8>" LOC = "E8" ;
#-------------------------------------------------------------------------------
# LCD
#
NET "LCD_CS1_n" LOC = "A11";
NET "LCD_SCL" LOC = "D7" ;
NET "LCD_SI" LOC = "C7" ;
NET "LCD_A0" LOC = "A14";
NET "LCD_RST_n" LOC = "A13";
#NET "LCD_CS1_n" LOC = "A11";
#NET "LCD_SCL" LOC = "D7" ;
#NET "LCD_SI" LOC = "C7" ;
#NET "LCD_A0" LOC = "A14";
#NET "LCD_RST_n" LOC = "A13";
#-------------------------------------------------------------------------------
# Globals

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@ -1 +1 @@
DIALECT atom VHDL_ANY
DIALECT atom VHDL_2008

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@ -1 +1 @@
DIALECT atom VHDL_ANY
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@ -54,23 +54,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\button@diagram.bd.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\button@diagram.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\button@diagram.bd.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\button@diagram.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -90,27 +90,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock"
)
(vvPair
variable "date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "day"
value "mar."
value "sam."
)
(vvPair
variable "day_long"
value "mardi"
value "samedi"
)
(vvPair
variable "dd"
value "21"
value "15"
)
(vvPair
variable "entity_name"
@ -134,11 +134,11 @@ value "button@diagram"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -146,11 +146,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "15:26:48"
value "15:22:00"
)
(vvPair
variable "group"
@ -158,7 +158,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -174,7 +174,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -182,19 +182,19 @@ value "ButtonBlock"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\button@diagram.bd"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\button@diagram.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock\\buttonDiagram.bd"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock\\buttonDiagram.bd"
)
(vvPair
variable "package_name"
@ -222,7 +222,7 @@ value "buttonDiagram"
)
(vvPair
variable "time"
value "15:26:48"
value "15:22:00"
)
(vvPair
variable "unit"
@ -230,7 +230,7 @@ value "ButtonBlock"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -242,11 +242,11 @@ value "buttonDiagram"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -357,8 +357,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,1400,29500,2200"
st "button4 : std_ulogic
"
st "button4 : std_ulogic"
)
)
*4 (PortIoIn
@ -420,8 +419,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,2200,29500,3000"
st "clock : std_ulogic
"
st "clock : std_ulogic"
)
)
*6 (PortIoIn
@ -483,8 +481,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,3000,29500,3800"
st "go1 : std_uLogic
"
st "go1 : std_uLogic"
)
)
*8 (PortIoIn
@ -546,8 +543,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,3800,29500,4600"
st "go2 : std_uLogic
"
st "go2 : std_uLogic"
)
)
*10 (PortIoIn
@ -609,8 +605,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,5400,29500,6200"
st "restart : std_uLogic
"
st "restart : std_uLogic"
)
)
*12 (PortIoIn
@ -673,8 +668,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,6200,29500,7000"
st "unlock : std_ulogic
"
st "unlock : std_ulogic"
)
)
*14 (Grouping
@ -699,7 +693,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "27200,48000,36400,49000"
xt "27200,48000,37200,49000"
st "
by %user on %dd %month %year
"
@ -1070,8 +1064,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,4600,29500,5400"
st "reset : std_ulogic
"
st "reset : std_ulogic"
)
)
*27 (Blk
@ -1171,8 +1164,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "18000,7000,34500,7800"
st "button : unsigned(3 DOWNTO 0)
"
st "button : unsigned(3 DOWNTO 0)"
)
)
*32 (SaComponent
@ -1887,12 +1879,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1537,960"
viewArea "-13500,-5100,67658,43260"
windowSize "0,24,1540,960"
viewArea "-13500,-5100,67844,43260"
cachedDiagramExtent "-7600,-1000,67200,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-8000,-49000"
lastUid 672,0
lastUid 789,0
defaultCommentText (CommentText
shape (Rectangle
layer 0

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@ -11,9 +11,14 @@ unitName "std_logic_1164"
library "ieee"
unitName "numeric_std"
)
(DmPackageRef
library "gates"
unitName "gates"
)
]
libraryRefs [
"ieee"
"gates"
]
)
version "27.1"
@ -21,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 50,0
suid 82,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -68,11 +73,11 @@ decl (Decl
n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 8
suid 43,0
o 26
suid 75,0
)
)
uid 833,0
uid 1241,0
)
*15 (LogPort
port (LogicalPort
@ -81,65 +86,67 @@ decl (Decl
n "button4"
t "std_ulogic"
o 1
suid 44,0
suid 76,0
)
)
uid 835,0
uid 1243,0
)
*16 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 45,0
suid 77,0
)
)
uid 837,0
uid 1245,0
)
*17 (LogPort
port (LogicalPort
decl (Decl
n "go1"
t "std_uLogic"
o 3
suid 46,0
o 6
suid 78,0
)
)
uid 839,0
uid 1247,0
)
*18 (LogPort
port (LogicalPort
decl (Decl
n "go2"
t "std_uLogic"
o 4
suid 47,0
o 7
suid 79,0
)
)
uid 841,0
uid 1249,0
)
*19 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 5
suid 48,0
o 8
suid 80,0
)
)
uid 843,0
uid 1251,0
)
*20 (LogPort
port (LogicalPort
decl (Decl
n "restart"
t "std_uLogic"
o 6
suid 49,0
o 9
suid 81,0
)
)
uid 845,0
uid 1253,0
)
*21 (LogPort
port (LogicalPort
@ -147,11 +154,11 @@ lang 11
decl (Decl
n "unlock"
t "std_ulogic"
o 7
suid 50,0
o 27
suid 82,0
)
)
uid 847,0
uid 1255,0
)
]
)
@ -205,51 +212,51 @@ uid 127,0
)
*27 (MRCItem
litem &14
pos 7
pos 0
dimension 20
uid 834,0
uid 1242,0
)
*28 (MRCItem
litem &15
pos 0
pos 1
dimension 20
uid 836,0
uid 1244,0
)
*29 (MRCItem
litem &16
pos 1
pos 2
dimension 20
uid 838,0
uid 1246,0
)
*30 (MRCItem
litem &17
pos 2
pos 3
dimension 20
uid 840,0
uid 1248,0
)
*31 (MRCItem
litem &18
pos 3
pos 4
dimension 20
uid 842,0
uid 1250,0
)
*32 (MRCItem
litem &19
pos 4
pos 5
dimension 20
uid 844,0
uid 1252,0
)
*33 (MRCItem
litem &20
pos 5
pos 6
dimension 20
uid 846,0
uid 1254,0
)
*34 (MRCItem
litem &21
pos 6
pos 7
dimension 20
uid 848,0
uid 1256,0
)
]
)
@ -480,23 +487,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\interface.info"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\interface.user"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -516,27 +523,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock"
)
(vvPair
variable "date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "day"
value "mar."
value "jeu."
)
(vvPair
variable "day_long"
value "mardi"
value "jeudi"
)
(vvPair
variable "dd"
value "21"
value "20"
)
(vvPair
variable "entity_name"
@ -560,11 +567,11 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "remi.heredero"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -572,11 +579,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "graphical_source_time"
value "15:22:46"
value "17:47:43"
)
(vvPair
variable "group"
@ -584,7 +591,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "language"
@ -600,7 +607,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -608,19 +615,19 @@ value "ButtonBlock"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\interface"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@button@block\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock\\interface"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\ButtonBlock\\interface"
)
(vvPair
variable "package_name"
@ -648,7 +655,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:22:46"
value "17:47:43"
)
(vvPair
variable "unit"
@ -656,7 +663,7 @@ value "ButtonBlock"
)
(vvPair
variable "user"
value "remi"
value "remi.heredero"
)
(vvPair
variable "version"
@ -668,11 +675,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -683,10 +690,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*68 (CptPort
uid 793,0
uid 1201,0
ps "OnEdgeStrategy"
shape (Triangle
uid 794,0
uid 1202,0
ro 90
va (VaSet
vasetType 1
@ -695,11 +702,11 @@ fg "0,65535,0"
xt "23000,9625,23750,10375"
)
tg (CPTG
uid 795,0
uid 1203,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 796,0
uid 1204,0
va (VaSet
font "Verdana,12,0"
)
@ -711,12 +718,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 797,0
uid 1205,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,64500,8800"
st "button : OUT unsigned (3 DOWNTO 0)"
st "button : OUT unsigned (3 DOWNTO 0)
"
)
thePort (LogicalPort
lang 11
@ -725,16 +733,16 @@ decl (Decl
n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 8
suid 43,0
o 26
suid 75,0
)
)
)
*69 (CptPort
uid 798,0
uid 1206,0
ps "OnEdgeStrategy"
shape (Triangle
uid 799,0
uid 1207,0
ro 90
va (VaSet
vasetType 1
@ -743,11 +751,11 @@ fg "0,65535,0"
xt "14250,13625,15000,14375"
)
tg (CPTG
uid 800,0
uid 1208,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 801,0
uid 1209,0
va (VaSet
font "Verdana,12,0"
)
@ -758,12 +766,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 802,0
uid 1210,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,60500,3200"
st "button4 : IN std_ulogic ;"
st "button4 : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -771,15 +780,15 @@ decl (Decl
n "button4"
t "std_ulogic"
o 1
suid 44,0
suid 76,0
)
)
)
*70 (CptPort
uid 803,0
uid 1211,0
ps "OnEdgeStrategy"
shape (Triangle
uid 804,0
uid 1212,0
ro 90
va (VaSet
vasetType 1
@ -788,11 +797,11 @@ fg "0,65535,0"
xt "14250,16625,15000,17375"
)
tg (CPTG
uid 805,0
uid 1213,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 806,0
uid 1214,0
va (VaSet
font "Verdana,12,0"
)
@ -803,27 +812,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 807,0
uid 1215,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,60500,4000"
st "clock : IN std_ulogic ;"
st "clock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 45,0
suid 77,0
)
)
)
*71 (CptPort
uid 808,0
uid 1216,0
ps "OnEdgeStrategy"
shape (Triangle
uid 809,0
uid 1217,0
ro 90
va (VaSet
vasetType 1
@ -832,11 +843,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 810,0
uid 1218,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 811,0
uid 1219,0
va (VaSet
font "Verdana,12,0"
)
@ -847,27 +858,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 812,0
uid 1220,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,60500,4800"
st "go1 : IN std_uLogic ;"
st "go1 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "go1"
t "std_uLogic"
o 3
suid 46,0
o 6
suid 78,0
)
)
)
*72 (CptPort
uid 813,0
uid 1221,0
ps "OnEdgeStrategy"
shape (Triangle
uid 814,0
uid 1222,0
ro 90
va (VaSet
vasetType 1
@ -876,11 +888,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 815,0
uid 1223,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 816,0
uid 1224,0
va (VaSet
font "Verdana,12,0"
)
@ -891,27 +903,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 817,0
uid 1225,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,60500,5600"
st "go2 : IN std_uLogic ;"
st "go2 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "go2"
t "std_uLogic"
o 4
suid 47,0
o 7
suid 79,0
)
)
)
*73 (CptPort
uid 818,0
uid 1226,0
ps "OnEdgeStrategy"
shape (Triangle
uid 819,0
uid 1227,0
ro 90
va (VaSet
vasetType 1
@ -920,11 +933,11 @@ fg "0,65535,0"
xt "14250,17625,15000,18375"
)
tg (CPTG
uid 820,0
uid 1228,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 821,0
uid 1229,0
va (VaSet
font "Verdana,12,0"
)
@ -935,27 +948,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 822,0
uid 1230,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,60500,6400"
st "reset : IN std_ulogic ;"
st "reset : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 5
suid 48,0
o 8
suid 80,0
)
)
)
*74 (CptPort
uid 823,0
uid 1231,0
ps "OnEdgeStrategy"
shape (Triangle
uid 824,0
uid 1232,0
ro 90
va (VaSet
vasetType 1
@ -964,11 +979,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 825,0
uid 1233,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 826,0
uid 1234,0
va (VaSet
font "Verdana,12,0"
)
@ -979,27 +994,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 827,0
uid 1235,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,60500,7200"
st "restart : IN std_uLogic ;"
st "restart : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "restart"
t "std_uLogic"
o 6
suid 49,0
o 9
suid 81,0
)
)
)
*75 (CptPort
uid 828,0
uid 1236,0
ps "OnEdgeStrategy"
shape (Triangle
uid 829,0
uid 1237,0
ro 270
va (VaSet
vasetType 1
@ -1008,11 +1024,11 @@ fg "0,65535,0"
xt "23000,15625,23750,16375"
)
tg (CPTG
uid 830,0
uid 1238,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 831,0
uid 1239,0
va (VaSet
font "Verdana,12,0"
)
@ -1024,20 +1040,21 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 832,0
uid 1240,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,60500,8000"
st "unlock : IN std_ulogic ;"
st "unlock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "unlock"
t "std_ulogic"
o 7
suid 50,0
o 27
suid 82,0
)
)
)
@ -1061,18 +1078,18 @@ uid 11,0
va (VaSet
font "Verdana,9,1"
)
xt "16950,11300,20650,12500"
xt "15300,11300,19000,12500"
st "Cursor"
blo "16950,12300"
blo "15300,12300"
)
second (Text
uid 12,0
va (VaSet
font "Verdana,9,1"
)
xt "16950,12500,24350,13700"
xt "15300,12500,22700,13700"
st "ButtonBlock"
blo "16950,13500"
blo "15300,13500"
)
)
gi *76 (GenericInterface
@ -1126,7 +1143,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,48800,49000"
st "
by %user on %dd %month %year
"
@ -1467,10 +1484,12 @@ blo "0,1000"
uid 50,0
va (VaSet
)
xt "0,1200,17500,4800"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;"
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;"
tm "PackageList"
)
]
@ -1748,6 +1767,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 940,0
lastUid 1256,0
activeModelName "Symbol:CDM"
)

File diff suppressed because it is too large Load Diff

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
libraryRefs [
"ieee"
@ -30,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 6,0
suid 18,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,24 +69,23 @@ tm "EolColHdrMgr"
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 2
suid 1,0
suid 13,0
)
)
uid 81,0
uid 360,0
)
*15 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "down"
t "std_uLogic"
o 3
suid 2,0
suid 14,0
)
)
uid 83,0
uid 362,0
)
*16 (LogPort
port (LogicalPort
@ -101,10 +96,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 6
suid 3,0
suid 15,0
)
)
uid 85,0
uid 364,0
)
*17 (LogPort
port (LogicalPort
@ -113,34 +108,32 @@ decl (Decl
n "RaZ"
t "std_ulogic"
o 1
suid 4,0
suid 16,0
)
)
uid 87,0
uid 366,0
)
*18 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 4
suid 5,0
suid 17,0
)
)
uid 89,0
uid 368,0
)
*19 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "up"
t "std_uLogic"
o 5
suid 6,0
suid 18,0
)
)
uid 91,0
uid 370,0
)
]
)
@ -194,39 +187,39 @@ uid 113,0
)
*25 (MRCItem
litem &14
pos 1
pos 0
dimension 20
uid 82,0
uid 361,0
)
*26 (MRCItem
litem &15
pos 2
pos 1
dimension 20
uid 84,0
uid 363,0
)
*27 (MRCItem
litem &16
pos 5
pos 2
dimension 20
uid 86,0
uid 365,0
)
*28 (MRCItem
litem &17
pos 0
pos 3
dimension 20
uid 88,0
uid 367,0
)
*29 (MRCItem
litem &18
pos 3
pos 4
dimension 20
uid 90,0
uid 369,0
)
*30 (MRCItem
litem &19
pos 4
pos 5
dimension 20
uid 92,0
uid 371,0
)
]
)
@ -457,23 +450,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\interface.info"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\interface.user"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -493,15 +486,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Compteur"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\Compteur"
)
(vvPair
variable "date"
value "21.12.2021"
value "18.01.2022"
)
(vvPair
variable "day"
@ -513,7 +506,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "18"
)
(vvPair
variable "entity_name"
@ -537,11 +530,11 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "18.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -549,11 +542,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "graphical_source_time"
value "14:54:36"
value "14:53:08"
)
(vvPair
variable "group"
@ -561,7 +554,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "language"
@ -577,7 +570,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -585,19 +578,19 @@ value "Compteur"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\interface"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Compteur\\interface"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\Compteur\\interface"
)
(vvPair
variable "package_name"
@ -625,7 +618,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:54:36"
value "14:53:08"
)
(vvPair
variable "unit"
@ -633,7 +626,7 @@ value "Compteur"
)
(vvPair
variable "user"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "version"
@ -645,11 +638,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -660,10 +653,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*64 (CptPort
uid 51,0
uid 330,0
ps "OnEdgeStrategy"
shape (Triangle
uid 52,0
uid 331,0
ro 90
va (VaSet
vasetType 1
@ -672,11 +665,11 @@ fg "0,65535,0"
xt "14250,27625,15000,28375"
)
tg (CPTG
uid 53,0
uid 332,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 54,0
uid 333,0
va (VaSet
font "Verdana,12,0"
)
@ -687,27 +680,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 55,0
uid 334,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,61000,4000"
st "clock : IN std_ulogic ;"
st "clock : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 2
suid 1,0
suid 13,0
)
)
)
*65 (CptPort
uid 56,0
uid 335,0
ps "OnEdgeStrategy"
shape (Triangle
uid 57,0
uid 336,0
ro 90
va (VaSet
vasetType 1
@ -716,11 +710,11 @@ fg "0,65535,0"
xt "14250,12625,15000,13375"
)
tg (CPTG
uid 58,0
uid 337,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 59,0
uid 338,0
va (VaSet
font "Verdana,12,0"
)
@ -731,28 +725,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 60,0
uid 339,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,61000,4800"
st "down : IN std_uLogic ;"
st "down : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "down"
t "std_uLogic"
o 3
suid 2,0
suid 14,0
)
)
)
*66 (CptPort
uid 61,0
uid 340,0
ps "OnEdgeStrategy"
shape (Triangle
uid 62,0
uid 341,0
ro 90
va (VaSet
vasetType 1
@ -761,11 +755,11 @@ fg "0,65535,0"
xt "31000,17625,31750,18375"
)
tg (CPTG
uid 63,0
uid 342,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 64,0
uid 343,0
va (VaSet
font "Verdana,12,0"
)
@ -777,12 +771,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 65,0
uid 344,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,66000,7200"
st "Position : OUT unsigned (15 DOWNTO 0)"
st "Position : OUT unsigned (15 DOWNTO 0)
"
)
thePort (LogicalPort
lang 11
@ -792,15 +787,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 6
suid 3,0
suid 15,0
)
)
)
*67 (CptPort
uid 66,0
uid 345,0
ps "OnEdgeStrategy"
shape (Triangle
uid 67,0
uid 346,0
ro 90
va (VaSet
vasetType 1
@ -809,11 +804,11 @@ fg "0,65535,0"
xt "14250,24625,15000,25375"
)
tg (CPTG
uid 68,0
uid 347,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 69,0
uid 348,0
va (VaSet
font "Verdana,12,0"
)
@ -824,12 +819,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 70,0
uid 349,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,61000,3200"
st "RaZ : IN std_ulogic ;"
st "RaZ : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -837,15 +833,15 @@ decl (Decl
n "RaZ"
t "std_ulogic"
o 1
suid 4,0
suid 16,0
)
)
)
*68 (CptPort
uid 71,0
uid 350,0
ps "OnEdgeStrategy"
shape (Triangle
uid 72,0
uid 351,0
ro 90
va (VaSet
vasetType 1
@ -854,11 +850,11 @@ fg "0,65535,0"
xt "14250,29625,15000,30375"
)
tg (CPTG
uid 73,0
uid 352,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 74,0
uid 353,0
va (VaSet
font "Verdana,12,0"
)
@ -869,28 +865,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 75,0
uid 354,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,61000,5600"
st "reset : IN std_ulogic ;"
st "reset : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 4
suid 5,0
suid 17,0
)
)
)
*69 (CptPort
uid 76,0
uid 355,0
ps "OnEdgeStrategy"
shape (Triangle
uid 77,0
uid 356,0
ro 90
va (VaSet
vasetType 1
@ -899,11 +895,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 78,0
uid 357,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 79,0
uid 358,0
va (VaSet
font "Verdana,12,0"
)
@ -914,20 +910,20 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 80,0
uid 359,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,61000,6400"
st "up : IN std_uLogic ;"
st "up : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "up"
t "std_uLogic"
o 5
suid 6,0
suid 18,0
)
)
)
@ -1016,7 +1012,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,49600,49000"
st "
by %user on %dd %month %year
"
@ -1357,13 +1353,12 @@ blo "0,1000"
uid 50,0
va (VaSet
)
xt "0,1200,19000,8400"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "PackageList"
)
]
@ -1641,7 +1636,7 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 218,0
lastUid 394,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol:CDM"

View File

@ -83,19 +83,19 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\C
)
(vvPair
variable "date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "day"
value "mar."
value "sam."
)
(vvPair
variable "day_long"
value "mardi"
value "samedi"
)
(vvPair
variable "dd"
value "21"
value "15"
)
(vvPair
variable "entity_name"
@ -123,7 +123,7 @@ value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -135,7 +135,7 @@ value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:48:18"
value "19:09:27"
)
(vvPair
variable "group"
@ -159,7 +159,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -167,11 +167,11 @@ value "Counter_Controller"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -207,7 +207,7 @@ value "fsm"
)
(vvPair
variable "time"
value "13:48:18"
value "19:09:27"
)
(vvPair
variable "unit"
@ -227,11 +227,11 @@ value "fsm"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -300,28 +300,25 @@ shape (Rectangle
uid 52,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "42110,23140,52810,25740"
xt "38652,30203,49352,35603"
)
autoResize 1
tline (Line
uid 53,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "42210,23040,52710,23040"
xt "38752,32903,49252,32903"
pts [
"42210,23040"
"52710,23040"
"38752,32903"
"49252,32903"
]
)
bline (Line
@ -330,12 +327,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "42210,23340,52710,23340"
xt "38752,32503,49252,32503"
pts [
"42210,23340"
"52710,23340"
"38752,32503"
"49252,32503"
]
)
ttri (Triangle
@ -343,13 +340,12 @@ uid 55,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "41760,22665,42110,23015"
xt "38302,31328,38652,31678"
)
btri (Triangle
uid 56,0
@ -362,20 +358,22 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "41760,20865,42110,21215"
xt "38302,29328,38652,29678"
)
entryActions (MLText
uid 57,0
va (VaSet
)
xt "42210,22840,42210,22840"
xt "38752,30303,49252,32703"
st "resetSync <= '1' ;
enable <= '0';"
tm "Actions"
)
inActions (MLText
uid 58,0
va (VaSet
)
xt "42210,23240,52710,25640"
xt "38752,33103,49252,35503"
st "resetSync <= '1' ;
enable <= '0';"
tm "Actions"
@ -384,7 +382,7 @@ exitActions (MLText
uid 59,0
va (VaSet
)
xt "43460,21040,43460,21040"
xt "40002,29503,40002,29503"
tm "Actions"
)
)
@ -402,6 +400,7 @@ st "CASE: expr"
tm "SmCaseExpr"
)
)
execEntry 1
)
*3 (SmClockPoint
uid 60,0
@ -511,10 +510,10 @@ vasetType 3
)
xt "4150,19700,4749,20300"
pts [
"4749,20300"
"4449,20300"
"4749,19700"
"4449,19700"
"4150,19700"
"4449,20300"
"4150,20300"
]
)
(Line
@ -572,7 +571,7 @@ va (VaSet
isHidden 1
)
xt "2400,17800,9000,19000"
st "reset = '0'"
st "reset = '1'"
tm "SmControlConditionMgr"
)
)
@ -630,6 +629,7 @@ st "< Automatic >"
tm "Actions"
)
)
level 1
)
*5 (Link
uid 87,0
@ -787,7 +787,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,46000,46000,47000"
xt "36200,46000,46200,47000"
st "
by %user on %dd %month %year
"
@ -1182,7 +1182,7 @@ lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
)
xt "62920,24430,71520,25830"
xt "61870,23830,72570,26430"
)
autoResize 1
tline (Line
@ -1193,10 +1193,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "63020,24330,71420,24330"
xt "61970,23730,72470,23730"
pts [
"63020,24330"
"71420,24330"
"61970,23730"
"72470,23730"
]
)
bline (Line
@ -1207,10 +1207,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "63020,23730,71420,23730"
xt "61970,24030,72470,24030"
pts [
"63020,23730"
"71420,23730"
"61970,24030"
"72470,24030"
]
)
ttri (Triangle
@ -1224,7 +1224,7 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "62570,23955,62920,24305"
xt "61520,23355,61870,23705"
)
btri (Triangle
uid 179,0
@ -1237,21 +1237,22 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "62570,21555,62920,21905"
xt "61520,21555,61870,21905"
)
entryActions (MLText
uid 180,0
va (VaSet
)
xt "63020,24130,63020,24130"
xt "61970,23530,61970,23530"
tm "Actions"
)
inActions (MLText
uid 181,0
va (VaSet
)
xt "63020,24530,71420,25730"
st "enable <= '1';"
xt "61970,23930,72470,26330"
st "enable <= '1';
resetSync <= '0' ;"
tm "Actions"
)
exitActions (MLText
@ -1702,7 +1703,7 @@ start &4
end &5
ss 0
es 0
cond "reset = '0'"
cond "reset = '1'"
tb (TransitionBlock
uid 106,0
ps "CenterOffsetStrategy"
@ -1714,7 +1715,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "8150,18855,15750,21055"
xt "7331,20129,14931,22329"
)
autoResize 1
lineShape (Line
@ -1722,18 +1723,18 @@ uid 108,0
va (VaSet
vasetType 3
)
xt "8650,20455,15250,20455"
xt "7831,21729,14431,21729"
pts [
"8650,20455"
"15250,20455"
"7831,21729"
"14431,21729"
]
)
condition (MLText
uid 109,0
va (VaSet
)
xt "8650,18855,15250,20055"
st "reset = '0'"
xt "7831,20129,14431,21329"
st "reset = '1'"
tm "Condition"
)
actions (MLText
@ -1741,7 +1742,7 @@ uid 110,0
va (VaSet
isHidden 1
)
xt "7650,20855,16250,22055"
xt "6831,22129,15431,23329"
st "< Automatic >"
tm "Actions"
)
@ -1888,19 +1889,18 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "2600,27620,19000,29820"
xt "2600,27820,19000,31620"
)
autoResize 1
lineShape (Line
uid 232,0
va (VaSet
vasetType 3
isHidden 1
)
xt "5750,29720,5750,29720"
xt "3100,29720,18500,29720"
pts [
"5750,29720"
"5750,29720"
"3100,29720"
"18500,29720"
]
)
condition (MLText
@ -1915,7 +1915,8 @@ actions (MLText
uid 234,0
va (VaSet
)
xt "10800,29720,10800,29720"
xt "5700,30120,15900,31320"
st "resetSync <= '1';"
tm "Actions"
)
)
@ -2787,7 +2788,7 @@ stateOrder [
name "csm"
)
]
lastUid 375,0
lastUid 520,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *63 (LEmptyRow
@ -2879,8 +2880,8 @@ o 3
)
)
uid 160,0
cat 8
expr "reset = '0'"
cat 9
expr "reset = '1'"
)
*85 (LeafLogPort
port (LogicalPort
@ -4110,6 +4111,6 @@ pts [
]
)
)
activeModelName "StateMachine:CDM"
activeModelName "StateMachine"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -71,7 +71,7 @@ lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
o 1
suid 16,0
)
)
@ -83,7 +83,7 @@ decl (Decl
n "countOut"
t "unsigned"
b "(7 DOWNTO 0)"
o 12
o 2
suid 17,0
)
)
@ -95,7 +95,7 @@ m 1
decl (Decl
n "enable"
t "std_ulogic"
o 10
o 4
suid 18,0
)
)
@ -107,7 +107,7 @@ lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 5
o 3
suid 19,0
)
)
@ -119,7 +119,7 @@ m 1
decl (Decl
n "resetSync"
t "std_ulogic"
o 11
o 5
suid 20,0
)
)
@ -189,13 +189,13 @@ uid 448,0
)
*26 (MRCItem
litem &16
pos 2
pos 3
dimension 20
uid 450,0
)
*27 (MRCItem
litem &17
pos 3
pos 2
dimension 20
uid 452,0
)
@ -442,11 +442,11 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@counter_@controller\\interface.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@counter_@controller\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@counter_@controller\\interface.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@counter_@controller\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
@ -458,7 +458,7 @@ value "HDL Designer"
)
(vvPair
variable "arch_name"
value "interface"
value "symbol"
)
(vvPair
variable "concat_file"
@ -478,19 +478,19 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\C
)
(vvPair
variable "date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "day"
value "mar."
value "sam."
)
(vvPair
variable "day_long"
value "mardi"
value "samedi"
)
(vvPair
variable "dd"
value "21"
value "15"
)
(vvPair
variable "entity_name"
@ -502,15 +502,15 @@ value "<TBD>"
)
(vvPair
variable "f"
value "interface"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "interface"
value "symbol.sb"
)
(vvPair
variable "f_noext"
value "interface"
value "symbol"
)
(vvPair
variable "graphical_source_author"
@ -518,7 +518,7 @@ value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -530,7 +530,7 @@ value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:48:39"
value "18:49:36"
)
(vvPair
variable "group"
@ -554,7 +554,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -562,19 +562,19 @@ value "Counter_Controller"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@counter_@controller\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@counter_@controller\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Counter_Controller\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Counter_Controller\\symbol.sb"
)
(vvPair
variable "package_name"
@ -590,19 +590,19 @@ value "HDL Designer Series"
)
(vvPair
variable "this_ext"
value "<TBD>"
value "sb"
)
(vvPair
variable "this_file"
value "interface"
value "symbol"
)
(vvPair
variable "this_file_logical"
value "interface"
value "symbol"
)
(vvPair
variable "time"
value "13:48:39"
value "18:49:36"
)
(vvPair
variable "unit"
@ -618,15 +618,15 @@ value "2019.2 (Build 5)"
)
(vvPair
variable "view"
value "interface"
value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -677,7 +677,7 @@ lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
o 1
suid 16,0
)
)
@ -724,7 +724,7 @@ decl (Decl
n "countOut"
t "unsigned"
b "(7 DOWNTO 0)"
o 12
o 2
suid 17,0
)
)
@ -770,7 +770,7 @@ m 1
decl (Decl
n "enable"
t "std_ulogic"
o 10
o 4
suid 18,0
)
)
@ -816,7 +816,7 @@ lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 5
o 3
suid 19,0
)
)
@ -862,7 +862,7 @@ m 1
decl (Decl
n "resetSync"
t "std_ulogic"
o 11
o 5
suid 20,0
)
)
@ -1238,7 +1238,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,47000,49600,48000"
xt "36200,47000,49200,48000"
st "
%library/%unit/%view
"
@ -1576,6 +1576,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 454,0
lastUid 477,0
activeModelName "Symbol:CDM"
)

File diff suppressed because it is too large Load Diff

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 7,0
suid 8,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -79,7 +79,7 @@ m 1
decl (Decl
n "motorOn"
t "std_uLogic"
o 5
o 6
suid 2,0
)
)
@ -117,7 +117,7 @@ m 1
decl (Decl
n "side1"
t "std_uLogic"
o 6
o 7
suid 5,0
)
)
@ -130,7 +130,7 @@ m 1
decl (Decl
n "side2"
t "std_uLogic"
o 7
o 8
suid 6,0
)
)
@ -148,6 +148,19 @@ suid 7,0
)
uid 98,0
)
*21 (LogPort
port (LogicalPort
lang 11
m 1
decl (Decl
n "PWM_out"
t "std_ulogic"
o 5
suid 8,0
)
)
uid 1239,0
)
]
)
pdm (PhysicalDM
@ -155,7 +168,7 @@ displayShortBounds 1
editShortBounds 1
uid 115,0
optionalChildren [
*21 (Sheet
*22 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
@ -172,74 +185,80 @@ cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *22 (MRCItem
emptyMRCItem *23 (MRCItem
litem &1
pos 3
dimension 20
)
uid 117,0
optionalChildren [
*23 (MRCItem
*24 (MRCItem
litem &2
pos 0
dimension 20
uid 118,0
)
*24 (MRCItem
*25 (MRCItem
litem &3
pos 1
dimension 23
uid 119,0
)
*25 (MRCItem
*26 (MRCItem
litem &4
pos 2
hidden 1
dimension 20
uid 120,0
)
*26 (MRCItem
*27 (MRCItem
litem &14
pos 2
dimension 20
uid 87,0
)
*27 (MRCItem
*28 (MRCItem
litem &15
pos 3
dimension 20
uid 89,0
)
*28 (MRCItem
*29 (MRCItem
litem &16
pos 0
dimension 20
uid 91,0
)
*29 (MRCItem
*30 (MRCItem
litem &17
pos 4
dimension 20
uid 93,0
)
*30 (MRCItem
*31 (MRCItem
litem &18
pos 5
dimension 20
uid 95,0
)
*31 (MRCItem
*32 (MRCItem
litem &19
pos 6
dimension 20
uid 97,0
)
*32 (MRCItem
*33 (MRCItem
litem &20
pos 1
dimension 20
uid 99,0
)
*34 (MRCItem
litem &21
pos 7
dimension 20
uid 1238,0
)
]
)
sheetCol (SheetCol
@ -251,49 +270,49 @@ textAngle 90
)
uid 121,0
optionalChildren [
*33 (MRCItem
*35 (MRCItem
litem &5
pos 0
dimension 20
uid 122,0
)
*34 (MRCItem
*36 (MRCItem
litem &7
pos 1
dimension 50
uid 123,0
)
*35 (MRCItem
*37 (MRCItem
litem &8
pos 2
dimension 100
uid 124,0
)
*36 (MRCItem
*38 (MRCItem
litem &9
pos 3
dimension 50
uid 125,0
)
*37 (MRCItem
*39 (MRCItem
litem &10
pos 4
dimension 100
uid 126,0
)
*38 (MRCItem
*40 (MRCItem
litem &11
pos 5
dimension 100
uid 127,0
)
*39 (MRCItem
*41 (MRCItem
litem &12
pos 6
dimension 50
uid 128,0
)
*40 (MRCItem
*42 (MRCItem
litem &13
pos 7
dimension 80
@ -314,38 +333,38 @@ uid 101,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *41 (LEmptyRow
emptyRow *43 (LEmptyRow
)
uid 131,0
optionalChildren [
*42 (RefLabelRowHdr
*44 (RefLabelRowHdr
)
*43 (TitleRowHdr
*45 (TitleRowHdr
)
*44 (FilterRowHdr
*46 (FilterRowHdr
)
*45 (RefLabelColHdr
*47 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*46 (RowExpandColHdr
*48 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*47 (GroupColHdr
*49 (GroupColHdr
tm "GroupColHdrMgr"
)
*48 (NameColHdr
*50 (NameColHdr
tm "GenericNameColHdrMgr"
)
*49 (TypeColHdr
*51 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*50 (InitColHdr
*52 (InitColHdr
tm "GenericValueColHdrMgr"
)
*51 (PragmaColHdr
*53 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*52 (EolColHdr
*54 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
@ -355,7 +374,7 @@ displayShortBounds 1
editShortBounds 1
uid 143,0
optionalChildren [
*53 (Sheet
*55 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
@ -372,27 +391,27 @@ cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *54 (MRCItem
litem &41
emptyMRCItem *56 (MRCItem
litem &43
pos 3
dimension 20
)
uid 145,0
optionalChildren [
*55 (MRCItem
litem &42
*57 (MRCItem
litem &44
pos 0
dimension 20
uid 146,0
)
*56 (MRCItem
litem &43
*58 (MRCItem
litem &45
pos 1
dimension 23
uid 147,0
)
*57 (MRCItem
litem &44
*59 (MRCItem
litem &46
pos 2
hidden 1
dimension 20
@ -409,44 +428,44 @@ textAngle 90
)
uid 149,0
optionalChildren [
*58 (MRCItem
litem &45
*60 (MRCItem
litem &47
pos 0
dimension 20
uid 150,0
)
*59 (MRCItem
litem &47
*61 (MRCItem
litem &49
pos 1
dimension 50
uid 151,0
)
*60 (MRCItem
litem &48
*62 (MRCItem
litem &50
pos 2
dimension 100
uid 152,0
)
*61 (MRCItem
litem &49
*63 (MRCItem
litem &51
pos 3
dimension 100
uid 153,0
)
*62 (MRCItem
litem &50
*64 (MRCItem
litem &52
pos 4
dimension 50
uid 154,0
)
*63 (MRCItem
litem &51
*65 (MRCItem
litem &53
pos 5
dimension 50
uid 155,0
)
*64 (MRCItem
litem &52
*66 (MRCItem
litem &54
pos 6
dimension 80
uid 156,0
@ -469,23 +488,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver\\symbol.sb.info"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver\\symbol.sb.user"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -505,27 +524,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Driver"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\Driver"
)
(vvPair
variable "date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "day"
value "mar."
value "jeu."
)
(vvPair
variable "day_long"
value "mardi"
value "jeudi"
)
(vvPair
variable "dd"
value "21"
value "20"
)
(vvPair
variable "entity_name"
@ -549,11 +568,11 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi.heredero"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -561,11 +580,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "WE2332001"
)
(vvPair
variable "graphical_source_time"
value "13:48:40"
value "16:57:11"
)
(vvPair
variable "group"
@ -573,7 +592,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "WE2332001"
)
(vvPair
variable "language"
@ -589,7 +608,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -597,19 +616,19 @@ value "Driver"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver\\symbol.sb"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@driver\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Driver\\symbol.sb"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\Driver\\symbol.sb"
)
(vvPair
variable "package_name"
@ -637,7 +656,7 @@ value "symbol"
)
(vvPair
variable "time"
value "13:48:40"
value "16:57:11"
)
(vvPair
variable "unit"
@ -645,7 +664,7 @@ value "Driver"
)
(vvPair
variable "user"
value "Simon"
value "remi.heredero"
)
(vvPair
variable "version"
@ -657,21 +676,21 @@ value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
LanguageMgr "Vhdl2008LangMgr"
uid 100,0
optionalChildren [
*65 (SymbolBody
*67 (SymbolBody
uid 8,0
optionalChildren [
*66 (CptPort
*68 (CptPort
uid 51,0
ps "OnEdgeStrategy"
shape (Triangle
@ -716,7 +735,7 @@ suid 1,0
)
)
)
*67 (CptPort
*69 (CptPort
uid 56,0
ps "OnEdgeStrategy"
shape (Triangle
@ -726,7 +745,7 @@ va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "23000,6625,23750,7375"
xt "30000,6625,30750,7375"
)
tg (CPTG
uid 58,0
@ -737,10 +756,10 @@ uid 59,0
va (VaSet
font "Verdana,12,0"
)
xt "15700,6300,22000,7700"
xt "23700,6300,30000,7700"
st "motorOn"
ju 2
blo "22000,7500"
blo "30000,7500"
tm "CptPortNameMgr"
)
)
@ -749,7 +768,7 @@ uid 60,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,60500,6400"
xt "44000,6400,60500,7200"
st "motorOn : OUT std_uLogic ;"
)
thePort (LogicalPort
@ -758,12 +777,12 @@ m 1
decl (Decl
n "motorOn"
t "std_uLogic"
o 5
o 6
suid 2,0
)
)
)
*68 (CptPort
*70 (CptPort
uid 61,0
ps "OnEdgeStrategy"
shape (Triangle
@ -784,9 +803,9 @@ uid 64,0
va (VaSet
font "Verdana,12,0"
)
xt "16000,8300,20800,9700"
xt "15000,8300,19800,9700"
st "Power"
blo "16000,9500"
blo "15000,9500"
tm "CptPortNameMgr"
)
)
@ -809,7 +828,7 @@ suid 3,0
)
)
)
*69 (CptPort
*71 (CptPort
uid 66,0
ps "OnEdgeStrategy"
shape (Triangle
@ -854,7 +873,7 @@ suid 4,0
)
)
)
*70 (CptPort
*72 (CptPort
uid 71,0
ps "OnEdgeStrategy"
shape (Triangle
@ -864,7 +883,7 @@ va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "23000,14625,23750,15375"
xt "30000,14625,30750,15375"
)
tg (CPTG
uid 73,0
@ -875,10 +894,10 @@ uid 74,0
va (VaSet
font "Verdana,12,0"
)
xt "17800,14300,22000,15700"
xt "25800,14300,30000,15700"
st "side1"
ju 2
blo "22000,15500"
blo "30000,15500"
tm "CptPortNameMgr"
)
)
@ -887,7 +906,7 @@ uid 75,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,60500,7200"
xt "44000,7200,60500,8000"
st "side1 : OUT std_uLogic ;"
)
thePort (LogicalPort
@ -896,12 +915,12 @@ m 1
decl (Decl
n "side1"
t "std_uLogic"
o 6
o 7
suid 5,0
)
)
)
*71 (CptPort
*73 (CptPort
uid 76,0
ps "OnEdgeStrategy"
shape (Triangle
@ -911,7 +930,7 @@ va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "23000,12625,23750,13375"
xt "30000,12625,30750,13375"
)
tg (CPTG
uid 78,0
@ -922,10 +941,10 @@ uid 79,0
va (VaSet
font "Verdana,12,0"
)
xt "17800,12300,22000,13700"
xt "25800,12300,30000,13700"
st "side2"
ju 2
blo "22000,13500"
blo "30000,13500"
tm "CptPortNameMgr"
)
)
@ -934,7 +953,7 @@ uid 80,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,59500,8000"
xt "44000,8000,59500,8800"
st "side2 : OUT std_uLogic "
)
thePort (LogicalPort
@ -943,12 +962,12 @@ m 1
decl (Decl
n "side2"
t "std_uLogic"
o 7
o 8
suid 6,0
)
)
)
*72 (CptPort
*74 (CptPort
uid 81,0
ps "OnEdgeStrategy"
shape (Triangle
@ -969,9 +988,9 @@ uid 84,0
va (VaSet
font "Verdana,12,0"
)
xt "16000,12300,20200,13700"
xt "15000,12300,19200,13700"
st "SideL"
blo "16000,13500"
blo "15000,13500"
tm "CptPortNameMgr"
)
)
@ -993,16 +1012,62 @@ suid 7,0
)
)
)
*75 (CptPort
uid 1240,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1241,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "30000,17625,30750,18375"
)
tg (CPTG
uid 1242,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1243,0
va (VaSet
font "Verdana,12,0"
)
xt "22200,17300,29000,18700"
st "PWM_out"
ju 2
blo "29000,18500"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 1244,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,60500,6400"
st "PWM_out : OUT std_ulogic ;"
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "PWM_out"
t "std_ulogic"
o 5
suid 8,0
)
)
)
]
shape (Rectangle
uid 9,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,23000,20000"
xt "15000,6000,30000,20000"
)
biTextGroup (BiTextGroup
uid 10,0
@ -1013,21 +1078,21 @@ uid 11,0
va (VaSet
font "Verdana,9,1"
)
xt "17150,11800,20850,13000"
xt "15150,19800,18850,21000"
st "Cursor"
blo "17150,12800"
blo "15150,20800"
)
second (Text
uid 12,0
va (VaSet
font "Verdana,9,1"
)
xt "17150,13000,20750,14200"
xt "15150,21000,18750,22200"
st "Driver"
blo "17150,14000"
blo "15150,22000"
)
)
gi *73 (GenericInterface
gi *76 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
@ -1056,10 +1121,10 @@ sTC 0
sF 0
)
)
*74 (Grouping
*77 (Grouping
uid 16,0
optionalChildren [
*75 (CommentText
*78 (CommentText
uid 18,0
shape (Rectangle
uid 19,0
@ -1078,7 +1143,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,46000,49000"
xt "36200,48000,48800,49000"
st "
by %user on %dd %month %year
"
@ -1091,7 +1156,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*76 (CommentText
*79 (CommentText
uid 21,0
shape (Rectangle
uid 22,0
@ -1123,7 +1188,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*77 (CommentText
*80 (CommentText
uid 24,0
shape (Rectangle
uid 25,0
@ -1155,7 +1220,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*78 (CommentText
*81 (CommentText
uid 27,0
shape (Rectangle
uid 28,0
@ -1187,7 +1252,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*79 (CommentText
*82 (CommentText
uid 30,0
shape (Rectangle
uid 31,0
@ -1218,7 +1283,7 @@ visibleWidth 20000
ignorePrefs 1
titleBlock 1
)
*80 (CommentText
*83 (CommentText
uid 33,0
shape (Rectangle
uid 34,0
@ -1250,7 +1315,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*81 (CommentText
*84 (CommentText
uid 36,0
shape (Rectangle
uid 37,0
@ -1281,7 +1346,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*82 (CommentText
*85 (CommentText
uid 39,0
shape (Rectangle
uid 40,0
@ -1313,7 +1378,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*83 (CommentText
*86 (CommentText
uid 42,0
shape (Rectangle
uid 43,0
@ -1345,7 +1410,7 @@ position 1
ignorePrefs 1
titleBlock 1
)
*84 (CommentText
*87 (CommentText
uid 45,0
shape (Rectangle
uid 46,0
@ -1402,11 +1467,11 @@ xShown 1
yShown 1
color "65535,0,0"
)
packageList *85 (PackageList
packageList *88 (PackageList
uid 48,0
stg "VerticalLayoutStrategy"
textVec [
*86 (Text
*89 (Text
uid 49,0
va (VaSet
font "Verdana,9,1"
@ -1415,7 +1480,7 @@ xt "0,0,7600,1200"
st "Package List"
blo "0,1000"
)
*87 (MLText
*90 (MLText
uid 50,0
va (VaSet
)
@ -1541,7 +1606,7 @@ st "<cell>"
blo "26800,17000"
)
)
gi *88 (GenericInterface
gi *91 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
@ -1642,7 +1707,7 @@ o 0
)
)
)
DeclarativeBlock *89 (SymDeclBlock
DeclarativeBlock *92 (SymDeclBlock
uid 1,0
stg "SymDeclLayoutStrategy"
declLabel (Text
@ -1668,9 +1733,9 @@ uid 4,0
va (VaSet
font "Verdana,9,1"
)
xt "42000,8000,45200,9200"
xt "42000,8800,45200,10000"
st "User:"
blo "42000,9000"
blo "42000,9800"
)
internalLabel (Text
uid 6,0
@ -1687,7 +1752,7 @@ uid 5,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,9200,44000,9200"
xt "44000,10000,44000,10000"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
@ -1700,6 +1765,8 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 685,0
lastUid 1290,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol:CDM"
)

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
machine (Machine
name "csm"
@ -43,23 +39,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\encoder.sm.info"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\encoder.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\encoder.sm.user"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\encoder.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -79,15 +75,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder"
)
(vvPair
variable "date"
value "14.12.2021"
value "18.01.2022"
)
(vvPair
variable "day"
@ -99,7 +95,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "14"
value "18"
)
(vvPair
variable "entity_name"
@ -123,11 +119,11 @@ value "encoder"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "18.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -135,11 +131,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "graphical_source_time"
value "13:09:40"
value "15:19:09"
)
(vvPair
variable "group"
@ -147,7 +143,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "language"
@ -163,7 +159,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -171,19 +167,19 @@ value "Encoder"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\encoder.sm"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\encoder.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder\\encoder.sm"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder\\encoder.sm"
)
(vvPair
variable "package_name"
@ -211,7 +207,7 @@ value "encoder"
)
(vvPair
variable "time"
value "13:09:40"
value "15:19:09"
)
(vvPair
variable "unit"
@ -219,7 +215,7 @@ value "Encoder"
)
(vvPair
variable "user"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "version"
@ -231,11 +227,11 @@ value "encoder"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -304,28 +300,25 @@ shape (Rectangle
uid 52,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "38412,8524,46212,11124"
xt "38412,7124,46212,12524"
)
autoResize 1
tline (Line
uid 53,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "38512,8424,46112,8424"
xt "38512,9824,46112,9824"
pts [
"38512,8424"
"46112,8424"
"38512,9824"
"46112,9824"
]
)
bline (Line
@ -334,12 +327,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "38512,8724,46112,8724"
xt "38512,9424,46112,9424"
pts [
"38512,8724"
"46112,8724"
"38512,9424"
"46112,9424"
]
)
ttri (Triangle
@ -347,13 +340,12 @@ uid 55,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "38062,8049,38412,8399"
xt "38062,8249,38412,8599"
)
btri (Triangle
uid 56,0
@ -372,14 +364,16 @@ entryActions (MLText
uid 57,0
va (VaSet
)
xt "38512,8224,38512,8224"
xt "38512,7224,46112,9624"
st "down <= '0';
up <= '0';"
tm "Actions"
)
inActions (MLText
uid 58,0
va (VaSet
)
xt "38512,8624,46112,11024"
xt "38512,10024,46112,12424"
st "down <= '0';
up <= '0';"
tm "Actions"
@ -515,10 +509,10 @@ vasetType 3
)
xt "4150,19700,4749,20300"
pts [
"4749,20300"
"4449,20300"
"4749,19700"
"4449,19700"
"4150,19700"
"4449,20300"
"4150,20300"
]
)
(Line
@ -576,7 +570,7 @@ va (VaSet
isHidden 1
)
xt "2400,17800,9000,19000"
st "reset = '0'"
st "reset = '1'"
tm "SmControlConditionMgr"
)
)
@ -634,6 +628,7 @@ st "< Automatic >"
tm "Actions"
)
)
level 1
)
*5 (Link
uid 87,0
@ -789,7 +784,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,46000,45400,47000"
xt "36200,46000,46200,47000"
st "
by %user on %dd %month %year
"
@ -1158,28 +1153,25 @@ shape (Rectangle
uid 188,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "28184,19240,35984,21840"
xt "28184,17840,35984,23240"
)
autoResize 1
tline (Line
uid 189,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "28284,19140,35884,19140"
xt "28284,20540,35884,20540"
pts [
"28284,19140"
"35884,19140"
"28284,20540"
"35884,20540"
]
)
bline (Line
@ -1188,12 +1180,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "28284,19440,35884,19440"
xt "28284,20140,35884,20140"
pts [
"28284,19440"
"35884,19440"
"28284,20140"
"35884,20140"
]
)
ttri (Triangle
@ -1201,13 +1193,12 @@ uid 191,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "27834,18765,28184,19115"
xt "27834,18965,28184,19315"
)
btri (Triangle
uid 192,0
@ -1226,14 +1217,16 @@ entryActions (MLText
uid 193,0
va (VaSet
)
xt "28284,18940,28284,18940"
xt "28284,17940,35884,20340"
st "down <= '0';
up <= '0';"
tm "Actions"
)
inActions (MLText
uid 194,0
va (VaSet
)
xt "28284,19340,35884,21740"
xt "28284,20740,35884,23140"
st "down <= '0';
up <= '0';"
tm "Actions"
@ -1318,28 +1311,25 @@ shape (Rectangle
uid 205,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "38480,30112,46280,32712"
xt "38480,28712,46280,34112"
)
autoResize 1
tline (Line
uid 206,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "38580,30012,46180,30012"
xt "38580,31412,46180,31412"
pts [
"38580,30012"
"46180,30012"
"38580,31412"
"46180,31412"
]
)
bline (Line
@ -1348,12 +1338,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "38580,30312,46180,30312"
xt "38580,31012,46180,31012"
pts [
"38580,30312"
"46180,30312"
"38580,31012"
"46180,31012"
]
)
ttri (Triangle
@ -1361,13 +1351,12 @@ uid 208,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "38130,29637,38480,29987"
xt "38130,29837,38480,30187"
)
btri (Triangle
uid 209,0
@ -1386,14 +1375,16 @@ entryActions (MLText
uid 210,0
va (VaSet
)
xt "38580,29812,38580,29812"
xt "38580,28812,46180,31212"
st "down <= '0';
up <= '0';"
tm "Actions"
)
inActions (MLText
uid 211,0
va (VaSet
)
xt "38580,30212,46180,32612"
xt "38580,31612,46180,34012"
st "down <= '0';
up <= '0';"
tm "Actions"
@ -1478,28 +1469,25 @@ shape (Rectangle
uid 222,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "48776,19672,56576,22272"
xt "48776,18272,56576,23672"
)
autoResize 1
tline (Line
uid 223,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "48876,19572,56476,19572"
xt "48876,20972,56476,20972"
pts [
"48876,19572"
"56476,19572"
"48876,20972"
"56476,20972"
]
)
bline (Line
@ -1508,12 +1496,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "48876,19872,56476,19872"
xt "48876,20572,56476,20572"
pts [
"48876,19872"
"56476,19872"
"48876,20572"
"56476,20572"
]
)
ttri (Triangle
@ -1521,13 +1509,12 @@ uid 225,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "48426,19197,48776,19547"
xt "48426,19397,48776,19747"
)
btri (Triangle
uid 226,0
@ -1546,14 +1533,16 @@ entryActions (MLText
uid 227,0
va (VaSet
)
xt "48876,19372,48876,19372"
xt "48876,18372,56476,20772"
st "down <= '0';
up <= '0';"
tm "Actions"
)
inActions (MLText
uid 228,0
va (VaSet
)
xt "48876,19772,56476,22172"
xt "48876,21172,56476,23572"
st "down <= '0';
up <= '0';"
tm "Actions"
@ -1598,7 +1587,7 @@ start &4
end &5
ss 0
es 0
cond "reset = '0'"
cond "reset = '1'"
tb (TransitionBlock
uid 106,0
ps "CenterOffsetStrategy"
@ -1629,7 +1618,7 @@ uid 109,0
va (VaSet
)
xt "8650,18900,15250,20100"
st "reset = '0'"
st "reset = '1'"
tm "Condition"
)
actions (MLText
@ -1811,8 +1800,8 @@ actions (MLText
uid 236,0
va (VaSet
)
xt "48762,4921,55062,6121"
st "up <= '1';"
xt "48112,4921,55712,6121"
st "down <= '1';"
tm "Actions"
)
)
@ -1896,8 +1885,8 @@ actions (MLText
uid 246,0
va (VaSet
)
xt "55843,25806,62143,27006"
st "up <= '1';"
xt "55193,25806,62793,27006"
st "down <= '1';"
tm "Actions"
)
)
@ -1981,8 +1970,8 @@ actions (MLText
uid 256,0
va (VaSet
)
xt "21845,28363,28145,29563"
st "up <= '1';"
xt "21195,28363,28795,29563"
st "down <= '1';"
tm "Actions"
)
)
@ -2066,8 +2055,8 @@ actions (MLText
uid 266,0
va (VaSet
)
xt "25043,5792,31343,6992"
st "up <= '1';"
xt "24393,5792,31993,6992"
st "down <= '1';"
tm "Actions"
)
)
@ -2125,7 +2114,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "18696,9513,28396,13313"
xt "18696,9313,28396,13513"
)
autoResize 1
lineShape (Line
@ -2151,8 +2140,8 @@ actions (MLText
uid 286,0
va (VaSet
)
xt "19746,11813,27346,13013"
st "down <= '1';"
xt "20396,11813,26696,13013"
st "up <= '1';"
tm "Actions"
)
)
@ -2236,8 +2225,8 @@ actions (MLText
uid 296,0
va (VaSet
)
xt "25089,34766,32689,35966"
st "down <= '1';"
xt "25739,34766,32039,35966"
st "up <= '1';"
tm "Actions"
)
)
@ -2295,7 +2284,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "49149,29354,58849,33154"
xt "49149,29154,58849,33354"
)
autoResize 1
lineShape (Line
@ -2321,8 +2310,8 @@ actions (MLText
uid 306,0
va (VaSet
)
xt "50199,31654,57799,32854"
st "down <= '1';"
xt "50849,31654,57149,32854"
st "up <= '1';"
tm "Actions"
)
)
@ -2380,7 +2369,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "53685,11593,63485,15393"
xt "53685,11393,63485,15593"
)
autoResize 1
lineShape (Line
@ -2406,8 +2395,8 @@ actions (MLText
uid 316,0
va (VaSet
)
xt "54785,13893,62385,15093"
st "down <= '1';"
xt "55435,13893,61735,15093"
st "up <= '1';"
tm "Actions"
)
)
@ -2466,13 +2455,12 @@ blo "0,3064"
uid 33,0
va (VaSet
)
xt "0,3264,19000,10464"
xt "0,3264,17500,9264"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "SmPackageListTextMgr"
)
]
@ -2550,8 +2538,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "5,0,1542,926"
viewArea "-17300,-8300,78257,49954"
windowSize "5,0,1546,926"
viewArea "-17300,-8300,78549,49954"
cachedDiagramExtent "-506,-1000,86600,47000"
hasePageBreakOrigin 1
pageBreakOrigin "-3000,-2000"
@ -2927,7 +2915,7 @@ stateOrder [
name "csm"
)
]
lastUid 388,0
lastUid 504,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *64 (LEmptyRow
@ -3009,7 +2997,7 @@ uid 158,0
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 1
)
)
@ -3033,13 +3021,13 @@ scheme 0
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 4
)
)
uid 164,0
cat 8
expr "reset = '0'"
cat 9
expr "reset = '1'"
)
*88 (LeafLogPort
port (LogicalPort

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
libraryRefs [
"ieee"
@ -30,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 12,0
suid 24,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,12 +69,12 @@ tm "EolColHdrMgr"
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 1
suid 7,0
suid 19,0
)
)
uid 364,0
uid 586,0
)
*15 (LogPort
port (LogicalPort
@ -87,10 +83,10 @@ decl (Decl
n "down"
t "std_uLogic"
o 5
suid 8,0
suid 20,0
)
)
uid 366,0
uid 588,0
)
*16 (LogPort
port (LogicalPort
@ -98,10 +94,10 @@ decl (Decl
n "encoderA"
t "std_uLogic"
o 2
suid 9,0
suid 21,0
)
)
uid 368,0
uid 590,0
)
*17 (LogPort
port (LogicalPort
@ -109,21 +105,21 @@ decl (Decl
n "encoderB"
t "std_uLogic"
o 3
suid 10,0
suid 22,0
)
)
uid 370,0
uid 592,0
)
*18 (LogPort
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 4
suid 11,0
suid 23,0
)
)
uid 372,0
uid 594,0
)
*19 (LogPort
port (LogicalPort
@ -132,10 +128,10 @@ decl (Decl
n "up"
t "std_uLogic"
o 6
suid 12,0
suid 24,0
)
)
uid 374,0
uid 596,0
)
]
)
@ -191,37 +187,37 @@ uid 113,0
litem &14
pos 0
dimension 20
uid 365,0
uid 587,0
)
*26 (MRCItem
litem &15
pos 1
dimension 20
uid 367,0
uid 589,0
)
*27 (MRCItem
litem &16
pos 2
dimension 20
uid 369,0
uid 591,0
)
*28 (MRCItem
litem &17
pos 3
dimension 20
uid 371,0
uid 593,0
)
*29 (MRCItem
litem &18
pos 4
dimension 20
uid 373,0
uid 595,0
)
*30 (MRCItem
litem &19
pos 5
dimension 20
uid 375,0
uid 597,0
)
]
)
@ -452,23 +448,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\interface.info"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\interface.user"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -488,15 +484,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder"
)
(vvPair
variable "date"
value "21.12.2021"
value "18.01.2022"
)
(vvPair
variable "day"
@ -508,7 +504,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "18"
)
(vvPair
variable "entity_name"
@ -532,11 +528,11 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "18.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -544,11 +540,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "graphical_source_time"
value "14:54:36"
value "15:19:09"
)
(vvPair
variable "group"
@ -556,7 +552,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "language"
@ -572,7 +568,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -580,19 +576,19 @@ value "Encoder"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\interface"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@encoder\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder\\interface"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\Encoder\\interface"
)
(vvPair
variable "package_name"
@ -620,7 +616,7 @@ value "interface"
)
(vvPair
variable "time"
value "14:54:36"
value "15:19:09"
)
(vvPair
variable "unit"
@ -628,7 +624,7 @@ value "Encoder"
)
(vvPair
variable "user"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "version"
@ -640,11 +636,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -655,10 +651,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*64 (CptPort
uid 334,0
uid 556,0
ps "OnEdgeStrategy"
shape (Triangle
uid 335,0
uid 557,0
ro 90
va (VaSet
vasetType 1
@ -667,11 +663,11 @@ fg "0,65535,0"
xt "14250,16625,15000,17375"
)
tg (CPTG
uid 336,0
uid 558,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 337,0
uid 559,0
va (VaSet
font "Verdana,12,0"
)
@ -682,27 +678,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 338,0
uid 560,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,61000,3200"
st "clock : IN std_ulogic ;"
st "clock : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 1
suid 7,0
suid 19,0
)
)
)
*65 (CptPort
uid 339,0
uid 561,0
ps "OnEdgeStrategy"
shape (Triangle
uid 340,0
uid 562,0
ro 90
va (VaSet
vasetType 1
@ -711,11 +708,11 @@ fg "0,65535,0"
xt "23000,12625,23750,13375"
)
tg (CPTG
uid 341,0
uid 563,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 342,0
uid 564,0
va (VaSet
font "Verdana,12,0"
)
@ -727,12 +724,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 343,0
uid 565,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,61000,6400"
st "down : OUT std_uLogic ;"
st "down : OUT std_uLogic ;
"
)
thePort (LogicalPort
m 1
@ -740,15 +738,15 @@ decl (Decl
n "down"
t "std_uLogic"
o 5
suid 8,0
suid 20,0
)
)
)
*66 (CptPort
uid 344,0
uid 566,0
ps "OnEdgeStrategy"
shape (Triangle
uid 345,0
uid 567,0
ro 90
va (VaSet
vasetType 1
@ -757,11 +755,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 346,0
uid 568,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 347,0
uid 569,0
va (VaSet
font "Verdana,12,0"
)
@ -772,27 +770,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 348,0
uid 570,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,61000,4000"
st "encoderA : IN std_uLogic ;"
st "encoderA : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "encoderA"
t "std_uLogic"
o 2
suid 9,0
suid 21,0
)
)
)
*67 (CptPort
uid 349,0
uid 571,0
ps "OnEdgeStrategy"
shape (Triangle
uid 350,0
uid 572,0
ro 90
va (VaSet
vasetType 1
@ -801,11 +800,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 351,0
uid 573,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 352,0
uid 574,0
va (VaSet
font "Verdana,12,0"
)
@ -816,27 +815,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 353,0
uid 575,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,61000,4800"
st "encoderB : IN std_uLogic ;"
st "encoderB : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "encoderB"
t "std_uLogic"
o 3
suid 10,0
suid 22,0
)
)
)
*68 (CptPort
uid 354,0
uid 576,0
ps "OnEdgeStrategy"
shape (Triangle
uid 355,0
uid 577,0
ro 90
va (VaSet
vasetType 1
@ -845,11 +845,11 @@ fg "0,65535,0"
xt "14250,18625,15000,19375"
)
tg (CPTG
uid 356,0
uid 578,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 357,0
uid 579,0
va (VaSet
font "Verdana,12,0"
)
@ -860,27 +860,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 358,0
uid 580,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,61000,5600"
st "reset : IN std_ulogic ;"
st "reset : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
t "std_uLogic"
o 4
suid 11,0
suid 23,0
)
)
)
*69 (CptPort
uid 359,0
uid 581,0
ps "OnEdgeStrategy"
shape (Triangle
uid 360,0
uid 582,0
ro 90
va (VaSet
vasetType 1
@ -889,11 +890,11 @@ fg "0,65535,0"
xt "23000,10625,23750,11375"
)
tg (CPTG
uid 361,0
uid 583,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 362,0
uid 584,0
va (VaSet
font "Verdana,12,0"
)
@ -905,12 +906,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 363,0
uid 585,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,60000,7200"
st "up : OUT std_uLogic "
st "up : OUT std_uLogic
"
)
thePort (LogicalPort
m 1
@ -918,7 +920,7 @@ decl (Decl
n "up"
t "std_uLogic"
o 6
suid 12,0
suid 24,0
)
)
)
@ -1007,7 +1009,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,49600,49000"
st "
by %user on %dd %month %year
"
@ -1348,13 +1350,12 @@ blo "0,1000"
uid 50,0
va (VaSet
)
xt "0,1200,19000,8400"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "PackageList"
)
]
@ -1632,7 +1633,7 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 444,0
lastUid 620,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol:CDM"

15064
Cursor/hds/@main/fsm.sm Normal file

File diff suppressed because it is too large Load Diff

View File

@ -175,19 +175,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -215,7 +215,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -227,7 +227,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:59:21"
value "14:05:30"
)
(vvPair
variable "group"
@ -251,7 +251,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -259,11 +259,11 @@ value "Main"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -299,7 +299,7 @@ value "struct"
)
(vvPair
variable "time"
value "15:59:21"
value "14:05:30"
)
(vvPair
variable "unit"
@ -319,11 +319,11 @@ value "struct"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -1083,7 +1083,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "27200,49000,36400,50000"
xt "27200,49000,36600,50000"
st "
by %user on %dd %month %year
"
@ -1836,7 +1836,7 @@ uid 535,0
lang 11
decl (Decl
n "power_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 22
suid 24,0
@ -1960,7 +1960,7 @@ uid 629,0
lang 11
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 35,0
@ -1978,7 +1978,7 @@ uid 631,0
lang 11
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 36,0
@ -2341,7 +2341,7 @@ uid 1348,0
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 51,0
@ -2359,7 +2359,7 @@ uid 1350,0
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 52,0
@ -3068,43 +3068,6 @@ uid 72,0
va (VaSet
vasetType 3
)
xt "95000,22000,115000,22000"
pts [
"115000,22000"
"95000,22000"
]
)
start &9
end &38
sat 32
eat 2
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
isHidden 1
)
xt "114000,20800,116700,22000"
st "RaZ"
blo "114000,21800"
tm "WireNameMgr"
)
)
on &10
)
*112 (Wire
uid 71,0
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
)
xt "35000,40000,114000,45000"
pts [
"114000,45000"
@ -3137,6 +3100,43 @@ tm "WireNameMgr"
)
on &16
)
*112 (Wire
uid 71,0
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
)
xt "95000,22000,115000,22000"
pts [
"115000,22000"
"95000,22000"
]
)
start &9
end &38
sat 32
eat 2
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
isHidden 1
)
xt "114000,20800,116700,22000"
st "RaZ"
blo "114000,21800"
tm "WireNameMgr"
)
)
on &10
)
*113 (Wire
uid 85,0
optionalChildren [
@ -5641,12 +5641,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1537,960"
viewArea "13668,16080,70937,51255"
windowSize "836,123,2376,1083"
viewArea "6200,-8119,96728,49289"
cachedDiagramExtent "-37000,-20200,122900,50000"
hasePageBreakOrigin 1
pageBreakOrigin "-82000,-49000"
lastUid 5444,0
lastUid 6005,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -6873,7 +6873,7 @@ lang 11
m 4
decl (Decl
n "power_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 22
suid 24,0
@ -6969,7 +6969,7 @@ lang 11
m 4
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 35,0
@ -6983,7 +6983,7 @@ lang 11
m 4
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 36,0
@ -7073,7 +7073,7 @@ lang 11
m 4
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 51,0
@ -7087,7 +7087,7 @@ lang 11
m 4
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 52,0

View File

@ -78,7 +78,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 3
suid 76,0
)
@ -130,7 +130,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_uLogic"
o 4
suid 80,0
)
@ -262,61 +262,61 @@ uid 155,0
)
*31 (MRCItem
litem &14
pos 0
pos 1
dimension 20
uid 940,0
)
*32 (MRCItem
litem &15
pos 1
pos 2
dimension 20
uid 942,0
)
*33 (MRCItem
litem &16
pos 2
pos 0
dimension 20
uid 944,0
)
*34 (MRCItem
litem &17
pos 3
pos 7
dimension 20
uid 946,0
)
*35 (MRCItem
litem &18
pos 4
pos 8
dimension 20
uid 948,0
)
*36 (MRCItem
litem &19
pos 5
pos 3
dimension 20
uid 950,0
)
*37 (MRCItem
litem &20
pos 6
pos 4
dimension 20
uid 952,0
)
*38 (MRCItem
litem &21
pos 7
pos 5
dimension 20
uid 954,0
)
*39 (MRCItem
litem &22
pos 8
pos 9
dimension 20
uid 956,0
)
*40 (MRCItem
litem &23
pos 9
pos 6
dimension 20
uid 958,0
)
@ -561,23 +561,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -597,15 +597,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Main"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Main"
)
(vvPair
variable "date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "day"
@ -617,7 +617,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "11"
)
(vvPair
variable "entity_name"
@ -641,11 +641,11 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -653,11 +653,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "15:58:06"
value "14:45:52"
)
(vvPair
variable "group"
@ -665,7 +665,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -681,7 +681,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -689,19 +689,19 @@ value "Main"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@main\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Main\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Main\\symbol.sb"
)
(vvPair
variable "package_name"
@ -729,7 +729,7 @@ value "symbol"
)
(vvPair
variable "time"
value "15:58:06"
value "14:45:52"
)
(vvPair
variable "unit"
@ -737,7 +737,7 @@ value "Main"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -749,11 +749,11 @@ value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -842,15 +842,15 @@ uid 888,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,60000,4800"
st "clk : IN unsigned ;
xt "44000,4000,61000,4800"
st "clk : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 3
suid 76,0
)
@ -1031,15 +1031,15 @@ uid 908,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,60000,5600"
st "rst : IN unsigned ;
xt "44000,4800,61000,5600"
st "rst : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_uLogic"
o 4
suid 80,0
)
@ -1409,7 +1409,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,46200,49000"
st "
by %user on %dd %month %year
"
@ -2031,6 +2031,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1215,0
lastUid 1353,0
activeModelName "Symbol:CDM"
)

15509
Cursor/hds/@main2/fsm.sm Normal file

File diff suppressed because it is too large Load Diff

1972
Cursor/hds/@main2/interface Normal file

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -71,7 +71,7 @@ lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
o 4
suid 22,0
)
)
@ -84,7 +84,7 @@ decl (Decl
n "Power"
t "unsigned"
b "(7 DOWNTO 0)"
o 1
o 2
suid 23,0
)
)
@ -96,7 +96,7 @@ lang 11
decl (Decl
n "PWM_out"
t "std_ulogic"
o 12
o 1
suid 24,0
)
)
@ -146,7 +146,7 @@ lang 11
decl (Decl
n "SideL"
t "std_ulogic"
o 2
o 3
suid 28,0
)
)
@ -204,19 +204,19 @@ uid 113,0
)
*26 (MRCItem
litem &14
pos 0
pos 2
dimension 20
uid 475,0
)
*27 (MRCItem
litem &15
pos 1
pos 6
dimension 20
uid 477,0
)
*28 (MRCItem
litem &16
pos 2
pos 0
dimension 20
uid 479,0
)
@ -240,7 +240,7 @@ uid 485,0
)
*32 (MRCItem
litem &20
pos 6
pos 1
dimension 20
uid 487,0
)
@ -481,11 +481,11 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@motor_side\\interface.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@motor_side\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@motor_side\\interface.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@motor_side\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
@ -497,7 +497,7 @@ value "HDL Designer"
)
(vvPair
variable "arch_name"
value "interface"
value "symbol"
)
(vvPair
variable "concat_file"
@ -517,19 +517,19 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\M
)
(vvPair
variable "date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "day"
value "mar."
value "sam."
)
(vvPair
variable "day_long"
value "mardi"
value "samedi"
)
(vvPair
variable "dd"
value "21"
value "15"
)
(vvPair
variable "entity_name"
@ -541,15 +541,15 @@ value "<TBD>"
)
(vvPair
variable "f"
value "interface"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "interface"
value "symbol.sb"
)
(vvPair
variable "f_noext"
value "interface"
value "symbol"
)
(vvPair
variable "graphical_source_author"
@ -557,7 +557,7 @@ value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -569,7 +569,7 @@ value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:44:20"
value "18:50:01"
)
(vvPair
variable "group"
@ -593,7 +593,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -601,19 +601,19 @@ value "Motor_side"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@motor_side\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@motor_side\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Motor_side\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\Motor_side\\symbol.sb"
)
(vvPair
variable "package_name"
@ -629,19 +629,19 @@ value "HDL Designer Series"
)
(vvPair
variable "this_ext"
value "<TBD>"
value "sb"
)
(vvPair
variable "this_file"
value "interface"
value "symbol"
)
(vvPair
variable "this_file_logical"
value "interface"
value "symbol"
)
(vvPair
variable "time"
value "13:44:20"
value "18:50:01"
)
(vvPair
variable "unit"
@ -657,15 +657,15 @@ value "2019.2 (Build 5)"
)
(vvPair
variable "view"
value "interface"
value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -718,7 +718,7 @@ lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
o 4
suid 22,0
)
)
@ -765,7 +765,7 @@ decl (Decl
n "Power"
t "unsigned"
b "(7 DOWNTO 0)"
o 1
o 2
suid 23,0
)
)
@ -811,7 +811,7 @@ lang 11
decl (Decl
n "PWM_out"
t "std_ulogic"
o 12
o 1
suid 24,0
)
)
@ -1001,7 +1001,7 @@ lang 11
decl (Decl
n "SideL"
t "std_ulogic"
o 2
o 3
suid 28,0
)
)
@ -1377,7 +1377,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,47000,46900,48000"
xt "36200,47000,46500,48000"
st "
%library/%unit/%view
"
@ -1715,6 +1715,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 487,0
lastUid 510,0
activeModelName "Symbol:CDM"
)

View File

@ -39,23 +39,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m\\fsm.sm.info"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m\\fsm.sm.user"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -75,27 +75,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\PWM"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\PWM"
)
(vvPair
variable "date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "day"
value "mar."
value "jeu."
)
(vvPair
variable "day_long"
value "mardi"
value "jeudi"
)
(vvPair
variable "dd"
value "21"
value "20"
)
(vvPair
variable "entity_name"
@ -119,11 +119,11 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi.heredero"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -131,11 +131,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "WE2332001"
)
(vvPair
variable "graphical_source_time"
value "13:48:37"
value "15:10:10"
)
(vvPair
variable "group"
@ -143,7 +143,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "WE2332001"
)
(vvPair
variable "language"
@ -159,7 +159,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -167,19 +167,19 @@ value "PWM"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m\\fsm.sm"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@p@w@m\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\PWM\\fsm.sm"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\PWM\\fsm.sm"
)
(vvPair
variable "package_name"
@ -207,7 +207,7 @@ value "fsm"
)
(vvPair
variable "time"
value "13:48:37"
value "15:10:10"
)
(vvPair
variable "unit"
@ -215,7 +215,7 @@ value "PWM"
)
(vvPair
variable "user"
value "Simon"
value "remi.heredero"
)
(vvPair
variable "version"
@ -227,11 +227,11 @@ value "fsm"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -300,28 +300,25 @@ shape (Rectangle
uid 52,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "33850,18700,44150,20100"
xt "24802,22134,35102,25134"
)
autoResize 1
tline (Line
uid 53,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "33950,18600,44050,18600"
xt "24902,23634,35002,23634"
pts [
"33950,18600"
"44050,18600"
"24902,23634"
"35002,23634"
]
)
bline (Line
@ -330,12 +327,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "33950,18000,44050,18000"
xt "24902,22634,35002,22634"
pts [
"33950,18000"
"44050,18000"
"24902,22634"
"35002,22634"
]
)
ttri (Triangle
@ -343,13 +340,12 @@ uid 55,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "33500,18225,33850,18575"
xt "24452,22659,24802,23009"
)
btri (Triangle
uid 56,0
@ -362,20 +358,21 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "33500,15825,33850,16175"
xt "24452,20059,24802,20409"
)
entryActions (MLText
uid 57,0
va (VaSet
)
xt "33950,18400,33950,18400"
xt "24902,22234,35002,23434"
st "PWM_out <= '0' ;"
tm "Actions"
)
inActions (MLText
uid 58,0
va (VaSet
)
xt "33950,18800,44050,20000"
xt "24902,23834,35002,25034"
st "PWM_out <= '0' ;"
tm "Actions"
)
@ -383,7 +380,7 @@ exitActions (MLText
uid 59,0
va (VaSet
)
xt "35000,16000,35000,16000"
xt "25952,20234,25952,20234"
tm "Actions"
)
)
@ -510,10 +507,10 @@ vasetType 3
)
xt "4150,19700,4749,20300"
pts [
"4749,20300"
"4449,20300"
"4749,19700"
"4449,19700"
"4150,19700"
"4449,20300"
"4150,20300"
]
)
(Line
@ -571,7 +568,7 @@ va (VaSet
isHidden 1
)
xt "2400,17800,9000,19000"
st "reset = '0'"
st "reset = '1'"
tm "SmControlConditionMgr"
)
)
@ -629,6 +626,7 @@ st "< Automatic >"
tm "Actions"
)
)
level 1
)
*5 (Link
uid 87,0
@ -784,7 +782,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,46000,46000,47000"
xt "36200,46000,46200,47000"
st "
by %user on %dd %month %year
"
@ -1153,28 +1151,25 @@ shape (Rectangle
uid 275,0
va (VaSet
vasetType 1
transparent 1
fg "65535,65535,65535"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
lineWidth 2
)
xt "55390,18175,65690,19575"
xt "64844,14881,75144,17881"
)
autoResize 1
tline (Line
uid 276,0
va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "55490,18075,65590,18075"
xt "64944,16381,75044,16381"
pts [
"55490,18075"
"65590,18075"
"64944,16381"
"75044,16381"
]
)
bline (Line
@ -1183,12 +1178,12 @@ va (VaSet
vasetType 3
isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
lineWidth 2
)
xt "55490,17475,65590,17475"
xt "64944,15381,75044,15381"
pts [
"55490,17475"
"65590,17475"
"64944,15381"
"75044,15381"
]
)
ttri (Triangle
@ -1196,13 +1191,12 @@ uid 278,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,32768,49152"
bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "55040,17700,55390,18050"
xt "64494,15406,64844,15756"
)
btri (Triangle
uid 279,0
@ -1215,20 +1209,21 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "55040,15300,55390,15650"
xt "64494,12806,64844,13156"
)
entryActions (MLText
uid 280,0
va (VaSet
)
xt "55490,17875,55490,17875"
xt "64944,14981,75044,16181"
st "PWM_out <= '1' ;"
tm "Actions"
)
inActions (MLText
uid 281,0
va (VaSet
)
xt "55490,18275,65590,19475"
xt "64944,16581,75044,17781"
st "PWM_out <= '1' ;"
tm "Actions"
)
@ -1236,7 +1231,7 @@ exitActions (MLText
uid 282,0
va (VaSet
)
xt "56540,15475,56540,15475"
xt "65994,12981,65994,12981"
tm "Actions"
)
)
@ -1272,7 +1267,7 @@ start &4
end &5
ss 0
es 0
cond "reset = '0'"
cond "reset = '1'"
tb (TransitionBlock
uid 106,0
ps "CenterOffsetStrategy"
@ -1284,7 +1279,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "8150,18900,15750,21100"
xt "6584,19654,14184,21854"
)
autoResize 1
lineShape (Line
@ -1292,18 +1287,18 @@ uid 108,0
va (VaSet
vasetType 3
)
xt "8650,20500,15250,20500"
xt "7084,21254,13684,21254"
pts [
"8650,20500"
"15250,20500"
"7084,21254"
"13684,21254"
]
)
condition (MLText
uid 109,0
va (VaSet
)
xt "8650,18900,15250,20100"
st "reset = '0'"
xt "7084,19654,13684,20854"
st "reset = '1'"
tm "Condition"
)
actions (MLText
@ -1311,7 +1306,7 @@ uid 110,0
va (VaSet
isHidden 1
)
xt "7650,20900,16250,22100"
xt "6084,21654,14684,22854"
st "< Automatic >"
tm "Actions"
)
@ -1447,7 +1442,7 @@ arrow 1
)
start &2
end &19
cond "countOut <= Power"
cond "countOut = \"00000000\""
tb (TransitionBlock
uid 285,0
ps "CenterOffsetStrategy"
@ -1459,7 +1454,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "39834,8420,51934,10620"
xt "38094,7492,53794,9692"
)
autoResize 1
lineShape (Line
@ -1468,25 +1463,25 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "42984,10520,42984,10520"
xt "41244,9592,41244,9592"
pts [
"42984,10520"
"42984,10520"
"41244,9592"
"41244,9592"
]
)
condition (MLText
uid 288,0
va (VaSet
)
xt "40334,8920,51434,10120"
st "countOut <= Power"
xt "38594,7992,53294,9192"
st "countOut = \"00000000\""
tm "Condition"
)
actions (MLText
uid 289,0
va (VaSet
)
xt "45884,10520,45884,10520"
xt "45944,9592,45944,9592"
tm "Actions"
)
)
@ -1534,7 +1529,7 @@ arrow 1
)
start &19
end &2
cond "countOut < Power"
cond "countOut >= Power"
tb (TransitionBlock
uid 295,0
ps "CenterOffsetStrategy"
@ -1546,7 +1541,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "41526,21311,52926,23511"
xt "41004,21543,53104,23743"
)
autoResize 1
lineShape (Line
@ -1555,25 +1550,25 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "44676,23411,44676,23411"
xt "44154,23643,44154,23643"
pts [
"44676,23411"
"44676,23411"
"44154,23643"
"44154,23643"
]
)
condition (MLText
uid 298,0
va (VaSet
)
xt "42026,21811,52426,23011"
st "countOut < Power"
xt "41504,22043,52604,23243"
st "countOut >= Power"
tm "Condition"
)
actions (MLText
uid 299,0
va (VaSet
)
xt "47226,23411,47226,23411"
xt "47054,23643,47054,23643"
tm "Actions"
)
)
@ -1717,8 +1712,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1715,1119"
viewArea "-4300,-4700,81946,51154"
windowSize "0,0,1716,1080"
viewArea "-4300,-4700,82004,50516"
cachedDiagramExtent "-650,-1000,86600,47000"
hasePageBreakOrigin 1
pageBreakOrigin "-1000,-2000"
@ -2091,7 +2086,7 @@ stateOrder [
name "csm"
)
]
lastUid 360,0
lastUid 534,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *56 (LEmptyRow
@ -2195,8 +2190,8 @@ o 4
)
)
uid 162,0
cat 8
expr "reset = '0'"
cat 9
expr "reset = '1'"
)
*79 (LeafLogPort
port (LogicalPort
@ -3415,6 +3410,6 @@ pts [
]
)
)
activeModelName "StateMachine:CDM"
activeModelName "StateMachine"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -71,7 +71,7 @@ lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
o 2
suid 27,0
)
)
@ -83,7 +83,7 @@ decl (Decl
n "countOut"
t "unsigned"
b "(7 DOWNTO 0)"
o 12
o 3
suid 28,0
)
)
@ -109,7 +109,7 @@ m 1
decl (Decl
n "PWM_out"
t "std_ulogic"
o 12
o 5
suid 30,0
)
)
@ -121,7 +121,7 @@ lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 5
o 4
suid 31,0
)
)
@ -179,31 +179,31 @@ uid 113,0
)
*24 (MRCItem
litem &14
pos 0
pos 1
dimension 20
uid 546,0
)
*25 (MRCItem
litem &15
pos 1
pos 2
dimension 20
uid 548,0
)
*26 (MRCItem
litem &16
pos 2
pos 0
dimension 20
uid 550,0
)
*27 (MRCItem
litem &17
pos 3
pos 4
dimension 20
uid 552,0
)
*28 (MRCItem
litem &18
pos 4
pos 3
dimension 20
uid 554,0
)
@ -480,7 +480,7 @@ value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\P
)
(vvPair
variable "date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "day"
@ -492,7 +492,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "11"
)
(vvPair
variable "entity_name"
@ -520,7 +520,7 @@ value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -532,7 +532,7 @@ value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:48:40"
value "14:04:37"
)
(vvPair
variable "group"
@ -556,7 +556,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -564,11 +564,11 @@ value "PWM"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -604,7 +604,7 @@ value "interface"
)
(vvPair
variable "time"
value "13:48:40"
value "14:04:37"
)
(vvPair
variable "unit"
@ -624,11 +624,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -681,7 +681,7 @@ lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
o 2
suid 27,0
)
)
@ -727,7 +727,7 @@ decl (Decl
n "countOut"
t "unsigned"
b "(7 DOWNTO 0)"
o 12
o 3
suid 28,0
)
)
@ -822,7 +822,7 @@ m 1
decl (Decl
n "PWM_out"
t "std_ulogic"
o 12
o 5
suid 30,0
)
)
@ -870,7 +870,7 @@ lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 5
o 4
suid 31,0
)
)
@ -1584,6 +1584,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 554,0
lastUid 577,0
activeModelName "Symbol:CDM"
)

View File

@ -11,9 +11,14 @@ unitName "std_logic_1164"
library "ieee"
unitName "numeric_std"
)
(DmPackageRef
library "gates"
unitName "gates"
)
]
libraryRefs [
"ieee"
"gates"
]
)
version "27.1"
@ -21,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 19,0
suid 33,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -62,14 +67,15 @@ tm "EolColHdrMgr"
)
*14 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 13,0
suid 27,0
)
)
uid 342,0
uid 785,0
)
*15 (LogPort
port (LogicalPort
@ -77,10 +83,10 @@ decl (Decl
n "encoderA"
t "std_uLogic"
o 3
suid 14,0
suid 28,0
)
)
uid 344,0
uid 787,0
)
*16 (LogPort
port (LogicalPort
@ -88,10 +94,10 @@ decl (Decl
n "encoderB"
t "std_uLogic"
o 4
suid 15,0
suid 29,0
)
)
uid 346,0
uid 789,0
)
*17 (LogPort
port (LogicalPort
@ -99,10 +105,10 @@ decl (Decl
n "encoderI"
t "std_uLogic"
o 5
suid 16,0
suid 30,0
)
)
uid 348,0
uid 791,0
)
*18 (LogPort
port (LogicalPort
@ -112,11 +118,11 @@ decl (Decl
n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 7
suid 17,0
o 22
suid 31,0
)
)
uid 350,0
uid 793,0
)
*19 (LogPort
port (LogicalPort
@ -124,22 +130,23 @@ lang 11
decl (Decl
n "RaZ"
t "std_ulogic"
o 1
suid 18,0
o 24
suid 32,0
)
)
uid 352,0
uid 795,0
)
*20 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 6
suid 19,0
o 8
suid 33,0
)
)
uid 354,0
uid 797,0
)
]
)
@ -195,43 +202,43 @@ uid 106,0
litem &14
pos 0
dimension 20
uid 343,0
uid 786,0
)
*27 (MRCItem
litem &15
pos 1
dimension 20
uid 345,0
uid 788,0
)
*28 (MRCItem
litem &16
pos 2
dimension 20
uid 347,0
uid 790,0
)
*29 (MRCItem
litem &17
pos 3
dimension 20
uid 349,0
uid 792,0
)
*30 (MRCItem
litem &18
pos 4
dimension 20
uid 351,0
uid 794,0
)
*31 (MRCItem
litem &19
pos 5
dimension 20
uid 353,0
uid 796,0
)
*32 (MRCItem
litem &20
pos 6
dimension 20
uid 355,0
uid 798,0
)
]
)
@ -462,23 +469,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\interface.info"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\interface.user"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -498,27 +505,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock"
)
(vvPair
variable "date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "day"
value "mar."
value "jeu."
)
(vvPair
variable "day_long"
value "mardi"
value "jeudi"
)
(vvPair
variable "dd"
value "21"
value "20"
)
(vvPair
variable "entity_name"
@ -542,11 +549,11 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "remi.heredero"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -554,11 +561,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "graphical_source_time"
value "15:01:17"
value "17:47:43"
)
(vvPair
variable "group"
@ -566,7 +573,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "language"
@ -582,7 +589,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -590,19 +597,19 @@ value "PositionBlock"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\interface"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock\\interface"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock\\interface"
)
(vvPair
variable "package_name"
@ -630,7 +637,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:01:17"
value "17:47:43"
)
(vvPair
variable "unit"
@ -638,7 +645,7 @@ value "PositionBlock"
)
(vvPair
variable "user"
value "remi"
value "remi.heredero"
)
(vvPair
variable "version"
@ -650,11 +657,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -665,10 +672,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*66 (CptPort
uid 307,0
uid 750,0
ps "OnEdgeStrategy"
shape (Triangle
uid 308,0
uid 751,0
ro 90
va (VaSet
vasetType 1
@ -677,11 +684,11 @@ fg "0,65535,0"
xt "14250,13625,15000,14375"
)
tg (CPTG
uid 309,0
uid 752,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 310,0
uid 753,0
va (VaSet
font "Verdana,12,0"
)
@ -692,27 +699,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 311,0
uid 754,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,61000,4000"
st "clock : IN std_ulogic ;"
st "clock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 13,0
suid 27,0
)
)
)
*67 (CptPort
uid 312,0
uid 755,0
ps "OnEdgeStrategy"
shape (Triangle
uid 313,0
uid 756,0
ro 90
va (VaSet
vasetType 1
@ -721,11 +730,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 314,0
uid 757,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 315,0
uid 758,0
va (VaSet
font "Verdana,12,0"
)
@ -736,27 +745,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 316,0
uid 759,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,61000,4800"
st "encoderA : IN std_uLogic ;"
st "encoderA : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "encoderA"
t "std_uLogic"
o 3
suid 14,0
suid 28,0
)
)
)
*68 (CptPort
uid 317,0
uid 760,0
ps "OnEdgeStrategy"
shape (Triangle
uid 318,0
uid 761,0
ro 90
va (VaSet
vasetType 1
@ -765,11 +775,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 319,0
uid 762,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 320,0
uid 763,0
va (VaSet
font "Verdana,12,0"
)
@ -780,27 +790,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 321,0
uid 764,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,61000,5600"
st "encoderB : IN std_uLogic ;"
st "encoderB : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "encoderB"
t "std_uLogic"
o 4
suid 15,0
suid 29,0
)
)
)
*69 (CptPort
uid 322,0
uid 765,0
ps "OnEdgeStrategy"
shape (Triangle
uid 323,0
uid 766,0
ro 90
va (VaSet
vasetType 1
@ -809,11 +820,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 324,0
uid 767,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 325,0
uid 768,0
va (VaSet
font "Verdana,12,0"
)
@ -824,27 +835,28 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 326,0
uid 769,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,61000,6400"
st "encoderI : IN std_uLogic ;"
st "encoderI : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
n "encoderI"
t "std_uLogic"
o 5
suid 16,0
suid 30,0
)
)
)
*70 (CptPort
uid 327,0
uid 770,0
ps "OnEdgeStrategy"
shape (Triangle
uid 328,0
uid 771,0
ro 90
va (VaSet
vasetType 1
@ -853,11 +865,11 @@ fg "0,65535,0"
xt "23000,7625,23750,8375"
)
tg (CPTG
uid 329,0
uid 772,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 330,0
uid 773,0
va (VaSet
font "Verdana,12,0"
)
@ -869,12 +881,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 331,0
uid 774,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,66000,8000"
st "Position : OUT unsigned (15 DOWNTO 0)"
st "Position : OUT unsigned (15 DOWNTO 0)
"
)
thePort (LogicalPort
lang 11
@ -883,16 +896,16 @@ decl (Decl
n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 7
suid 17,0
o 22
suid 31,0
)
)
)
*71 (CptPort
uid 332,0
uid 775,0
ps "OnEdgeStrategy"
shape (Triangle
uid 333,0
uid 776,0
ro 270
va (VaSet
vasetType 1
@ -901,11 +914,11 @@ fg "0,65535,0"
xt "23000,14625,23750,15375"
)
tg (CPTG
uid 334,0
uid 777,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 335,0
uid 778,0
va (VaSet
font "Verdana,12,0"
)
@ -917,28 +930,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 336,0
uid 779,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,61000,3200"
st "RaZ : IN std_ulogic ;"
st "RaZ : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "RaZ"
t "std_ulogic"
o 1
suid 18,0
o 24
suid 32,0
)
)
)
*72 (CptPort
uid 337,0
uid 780,0
ps "OnEdgeStrategy"
shape (Triangle
uid 338,0
uid 781,0
ro 90
va (VaSet
vasetType 1
@ -947,11 +961,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 339,0
uid 782,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 340,0
uid 783,0
va (VaSet
font "Verdana,12,0"
)
@ -962,19 +976,21 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 341,0
uid 784,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,61000,7200"
st "reset : IN std_ulogic ;"
st "reset : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 6
suid 19,0
o 8
suid 33,0
)
)
)
@ -998,18 +1014,18 @@ uid 11,0
va (VaSet
font "Verdana,9,1"
)
xt "16650,9800,20350,11000"
xt "15000,9800,18700,11000"
st "Cursor"
blo "16650,10800"
blo "15000,10800"
)
second (Text
uid 12,0
va (VaSet
font "Verdana,9,1"
)
xt "16650,11000,24650,12200"
xt "15000,11000,23000,12200"
st "PositionBlock"
blo "16650,12000"
blo "15000,12000"
)
)
gi *73 (GenericInterface
@ -1063,7 +1079,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,49600,49000"
st "
by %user on %dd %month %year
"
@ -1404,10 +1420,12 @@ blo "0,1000"
uid 50,0
va (VaSet
)
xt "0,1200,17500,4800"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;"
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;"
tm "PackageList"
)
]
@ -1685,6 +1703,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 585,0
lastUid 798,0
activeModelName "Symbol:CDM"
)

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
instances [
(Instance
@ -53,23 +49,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\position@diagram.bd.info"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\position@diagram.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\position@diagram.bd.user"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\position@diagram.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -89,15 +85,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock"
)
(vvPair
variable "date"
value "21.12.2021"
value "18.01.2022"
)
(vvPair
variable "day"
@ -109,7 +105,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "18"
)
(vvPair
variable "entity_name"
@ -133,11 +129,11 @@ value "position@diagram"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "18.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -145,11 +141,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "graphical_source_time"
value "15:01:17"
value "14:29:46"
)
(vvPair
variable "group"
@ -157,7 +153,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WEA20306"
)
(vvPair
variable "language"
@ -173,7 +169,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -181,19 +177,19 @@ value "PositionBlock"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\position@diagram.bd"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\@position@block\\position@diagram.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock\\positionDiagram.bd"
value "Y:\\simon.donnetmo\\Cursor\\Prefs\\..\\Cursor\\hds\\PositionBlock\\positionDiagram.bd"
)
(vvPair
variable "package_name"
@ -221,7 +217,7 @@ value "positionDiagram"
)
(vvPair
variable "time"
value "15:01:17"
value "14:29:46"
)
(vvPair
variable "unit"
@ -229,7 +225,7 @@ value "PositionBlock"
)
(vvPair
variable "user"
value "remi"
value "simon.donnetmo"
)
(vvPair
variable "version"
@ -241,11 +237,11 @@ value "positionDiagram"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -301,7 +297,7 @@ tm "WireNameMgr"
uid 21,0
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 2
suid 1,0
)
@ -311,7 +307,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,3200,34000,4000"
st "clock : std_ulogic"
st "clock : std_uLogic
"
)
)
*3 (PortIoIn
@ -373,7 +370,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,4000,34000,4800"
st "encoderA : std_uLogic"
st "encoderA : std_uLogic
"
)
)
*5 (PortIoIn
@ -435,7 +433,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,4800,34000,5600"
st "encoderB : std_uLogic"
st "encoderB : std_uLogic
"
)
)
*7 (PortIoIn
@ -497,7 +496,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,5600,34000,6400"
st "encoderI : std_uLogic"
st "encoderI : std_uLogic
"
)
)
*9 (Grouping
@ -522,7 +522,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "27200,48000,36400,49000"
xt "27200,48000,37200,49000"
st "
by %user on %dd %month %year
"
@ -894,7 +894,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,7200,39500,8000"
st "Position : unsigned(15 DOWNTO 0)"
st "Position : unsigned(15 DOWNTO 0)
"
)
)
*22 (PortIoIn
@ -957,7 +958,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,2400,34000,3200"
st "RaZ : std_ulogic"
st "RaZ : std_ulogic
"
)
)
*24 (PortIoIn
@ -1009,8 +1011,8 @@ tm "WireNameMgr"
uid 235,0
decl (Decl
n "reset"
t "std_ulogic"
o 8
t "std_uLogic"
o 6
suid 8,0
)
declText (MLText
@ -1019,7 +1021,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,6400,34000,7200"
st "reset : std_ulogic"
st "reset : std_uLogic
"
)
)
*26 (Blk
@ -1108,7 +1111,7 @@ uid 540,0
decl (Decl
n "up"
t "std_uLogic"
o 8
o 9
suid 11,0
)
declText (MLText
@ -1117,7 +1120,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,10000,37500,10800"
st "SIGNAL up : std_uLogic"
st "SIGNAL up : std_uLogic
"
)
)
*31 (Net
@ -1125,7 +1129,7 @@ uid 548,0
decl (Decl
n "down"
t "std_uLogic"
o 9
o 8
suid 12,0
)
declText (MLText
@ -1134,7 +1138,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,9200,37500,10000"
st "SIGNAL down : std_uLogic"
st "SIGNAL down : std_uLogic
"
)
)
*32 (Blk
@ -1649,13 +1654,12 @@ blo "0,1000"
uid 123,0
va (VaSet
)
xt "0,1200,19000,8400"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "PackageList"
)
]
@ -1733,12 +1737,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,40,1537,960"
viewArea "-23700,-7200,73166,51408"
windowSize "0,40,1540,960"
viewArea "-23700,-7200,73388,51408"
cachedDiagramExtent "-8500,0,64000,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-9000,0"
lastUid 748,0
lastUid 907,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -2854,7 +2858,7 @@ uid 83,0
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
t "std_uLogic"
o 2
suid 1,0
)
@ -2891,8 +2895,8 @@ uid 192,0
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 8
t "std_uLogic"
o 6
suid 8,0
)
)
@ -2904,7 +2908,7 @@ m 4
decl (Decl
n "up"
t "std_uLogic"
o 8
o 9
suid 11,0
)
)
@ -2916,7 +2920,7 @@ m 4
decl (Decl
n "down"
t "std_uLogic"
o 9
o 8
suid 12,0
)
)

File diff suppressed because it is too large Load Diff

2
Cursor/hds/_driver2._epf Normal file
View File

@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom struct
DEFAULT_FILE atom driver2/struct.bd

2
Cursor/hds/_if0._epf Normal file
View File

@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom fsm
DEFAULT_FILE atom if0/fsm.sm

2
Cursor/hds/_if1._epf Normal file
View File

@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom fsm
DEFAULT_FILE atom if1/fsm.sm

View File

@ -1,2 +1,2 @@
DEFAULT_ARCHITECTURE atom struct
DEFAULT_FILE atom @main/struct.bd
DEFAULT_ARCHITECTURE atom fsm
DEFAULT_FILE atom @main/fsm.sm

2
Cursor/hds/_main2._epf Normal file
View File

@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom fsm
DEFAULT_FILE atom @main2/fsm.sm

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 129,0
suid 136,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -65,12 +65,12 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 123,0
suid 130,0
)
)
uid 1549,0
uid 1621,0
)
*15 (LogPort
port (LogicalPort
@ -79,10 +79,10 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 124,0
suid 131,0
)
)
uid 1551,0
uid 1623,0
)
*16 (LogPort
port (LogicalPort
@ -92,10 +92,10 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
suid 125,0
suid 132,0
)
)
uid 1553,0
uid 1625,0
)
*17 (LogPort
port (LogicalPort
@ -105,10 +105,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 126,0
suid 133,0
)
)
uid 1555,0
uid 1627,0
)
*18 (LogPort
port (LogicalPort
@ -119,22 +119,22 @@ n "power_acceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 127,0
suid 134,0
)
)
uid 1557,0
uid 1629,0
)
*19 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 128,0
suid 135,0
)
)
uid 1559,0
uid 1631,0
)
*20 (LogPort
port (LogicalPort
@ -143,10 +143,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 129,0
suid 136,0
)
)
uid 1561,0
uid 1633,0
)
]
)
@ -202,43 +202,43 @@ uid 106,0
litem &14
pos 0
dimension 20
uid 1550,0
uid 1622,0
)
*27 (MRCItem
litem &15
pos 1
dimension 20
uid 1552,0
uid 1624,0
)
*28 (MRCItem
litem &16
pos 2
dimension 20
uid 1554,0
uid 1626,0
)
*29 (MRCItem
litem &17
pos 3
dimension 20
uid 1556,0
uid 1628,0
)
*30 (MRCItem
litem &18
pos 4
dimension 20
uid 1558,0
uid 1630,0
)
*31 (MRCItem
litem &19
pos 5
dimension 20
uid 1560,0
uid 1632,0
)
*32 (MRCItem
litem &20
pos 6
dimension 20
uid 1562,0
uid 1634,0
)
]
)
@ -513,19 +513,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -553,7 +553,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -565,7 +565,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:59:07"
value "14:00:32"
)
(vvPair
variable "group"
@ -589,7 +589,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -597,11 +597,11 @@ value "accelerator"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -637,7 +637,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:59:07"
value "14:00:32"
)
(vvPair
variable "unit"
@ -657,11 +657,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -672,10 +672,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*66 (CptPort
uid 1514,0
uid 1586,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1515,0
uid 1587,0
ro 90
va (VaSet
vasetType 1
@ -684,11 +684,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 1516,0
uid 1588,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1517,0
uid 1589,0
va (VaSet
font "Verdana,12,0"
)
@ -699,26 +699,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1518,0
uid 1590,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,66500,4000"
st "clk : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 123,0
suid 130,0
)
)
)
*67 (CptPort
uid 1519,0
uid 1591,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1520,0
uid 1592,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -726,11 +729,11 @@ fg "0,65535,0"
xt "19625,16000,20375,16750"
)
tg (CPTG
uid 1521,0
uid 1593,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1522,0
uid 1594,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -742,10 +745,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1523,0
uid 1595,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,66500,4800"
st "end_acceleration : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -753,15 +759,15 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 124,0
suid 131,0
)
)
)
*68 (CptPort
uid 1524,0
uid 1596,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1525,0
uid 1597,0
ro 90
va (VaSet
vasetType 1
@ -770,11 +776,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1526,0
uid 1598,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1527,0
uid 1599,0
va (VaSet
font "Verdana,12,0"
)
@ -785,10 +791,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1528,0
uid 1600,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,72000,5600"
st "info_acceleration : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -797,15 +806,15 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
suid 125,0
suid 132,0
)
)
)
*69 (CptPort
uid 1529,0
uid 1601,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1530,0
uid 1602,0
ro 90
va (VaSet
vasetType 1
@ -814,11 +823,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 1531,0
uid 1603,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1532,0
uid 1604,0
va (VaSet
font "Verdana,12,0"
)
@ -829,10 +838,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1533,0
uid 1605,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -841,15 +853,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 126,0
suid 133,0
)
)
)
*70 (CptPort
uid 1534,0
uid 1606,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1535,0
uid 1607,0
ro 90
va (VaSet
vasetType 1
@ -858,11 +870,11 @@ fg "0,65535,0"
xt "23000,7625,23750,8375"
)
tg (CPTG
uid 1536,0
uid 1608,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1537,0
uid 1609,0
va (VaSet
font "Verdana,12,0"
)
@ -874,10 +886,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1538,0
uid 1610,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,70500,8000"
st "power_acceleration : OUT unsigned (7 DOWNTO 0)
"
)
thePort (LogicalPort
lang 11
@ -887,15 +902,15 @@ n "power_acceleration"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 127,0
suid 134,0
)
)
)
*71 (CptPort
uid 1539,0
uid 1611,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1540,0
uid 1612,0
ro 90
va (VaSet
vasetType 1
@ -904,11 +919,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 1541,0
uid 1613,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1542,0
uid 1614,0
va (VaSet
font "Verdana,12,0"
)
@ -919,26 +934,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1543,0
uid 1615,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,66500,6400"
st "rst : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 128,0
suid 135,0
)
)
)
*72 (CptPort
uid 1544,0
uid 1616,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1545,0
uid 1617,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -946,11 +964,11 @@ fg "0,65535,0"
xt "17625,16000,18375,16750"
)
tg (CPTG
uid 1546,0
uid 1618,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1547,0
uid 1619,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -962,10 +980,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1548,0
uid 1620,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,66500,7200"
st "sideL_acceleration : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -973,7 +994,7 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 129,0
suid 136,0
)
)
)
@ -1684,6 +1705,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1562,0
lastUid 1634,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,27 +70,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
)
(vvPair
variable "date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "day"
value "mar."
value "sam."
)
(vvPair
variable "day_long"
value "mardi"
value "samedi"
)
(vvPair
variable "dd"
value "21"
value "15"
)
(vvPair
variable "entity_name"
@ -114,11 +114,11 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "15.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "15:26:45"
value "15:21:55"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -154,7 +154,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -162,19 +162,19 @@ value "button_position"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "15:26:45"
value "15:21:55"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "button_position"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -222,11 +222,11 @@ value "fsm"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -468,14 +468,14 @@ vasetType 1
fg "65535,65535,65535"
lineColor "0,32768,49152"
)
xt "5500,10300,22800,11700"
xt "5500,10373,22800,11773"
)
autoResize 1
cond (MLText
uid 69,0
va (VaSet
)
xt "5600,10400,22700,11600"
xt "5600,10473,22700,11673"
st "clock'EVENT AND clock = '1'"
tm "SmControlConditionMgr"
)
@ -505,10 +505,10 @@ vasetType 3
)
xt "4150,19700,4749,20300"
pts [
"4749,20300"
"4449,20300"
"4749,19700"
"4449,19700"
"4150,19700"
"4449,20300"
"4150,20300"
]
)
(Line
@ -566,7 +566,7 @@ va (VaSet
isHidden 1
)
xt "2400,17800,9000,19000"
st "reset = '0'"
st "reset = '1'"
tm "SmControlConditionMgr"
)
)
@ -624,6 +624,7 @@ st "< Automatic >"
tm "Actions"
)
)
level 1
)
*5 (Link
uid 87,0
@ -779,7 +780,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,46000,45400,47000"
xt "36200,46000,46200,47000"
st "
by %user on %dd %month %year
"
@ -1224,7 +1225,7 @@ uid 185,0
va (VaSet
)
xt "64978,22604,75078,23804"
st "button <= \"001\";"
st "button <= \"100\";"
tm "Actions"
)
exitActions (MLText
@ -1419,18 +1420,18 @@ fg "0,65535,65535"
lineColor "0,32768,49152"
lineWidth 2
)
xt "18557,27341,25659,34443"
radius 3551
xt "15159,26133,28181,39155"
radius 6511
)
name (Text
uid 206,0
va (VaSet
font "Verdana,12,1"
)
xt "20108,30192,24108,31592"
st "start"
xt "15770,31944,27570,33344"
st "remise_a_zero"
ju 0
blo "22108,31392"
blo "21670,33144"
tm "ONodeName"
)
wait (TextAssociate
@ -1443,9 +1444,9 @@ isHidden 1
fg "0,0,32768"
font "Verdana,12,1"
)
xt "21858,31092,26958,32492"
xt "21420,32844,26520,34244"
st "wait 2"
blo "21858,32292"
blo "21420,34044"
tm "SmWaitText"
)
)
@ -1455,8 +1456,8 @@ va (VaSet
isHidden 1
font "Verdana,9,1"
)
xt "22108,31992,22108,31992"
blo "22108,31992"
xt "21670,33744,21670,33744"
blo "21670,33744"
tm "SmEncodingMgr"
)
actionBlk (SmStateActionsBlock
@ -1473,7 +1474,7 @@ lineColor "39936,56832,65280"
lineWidth -1
fillStyle 1
)
xt "20022,31504,30322,32904"
xt "19584,33256,29884,34656"
)
autoResize 1
tline (Line
@ -1484,10 +1485,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "20122,31404,30222,31404"
xt "19684,33156,29784,33156"
pts [
"20122,31404"
"30222,31404"
"19684,33156"
"29784,33156"
]
)
bline (Line
@ -1498,10 +1499,10 @@ isHidden 1
lineColor "39936,56832,65280"
lineWidth -1
)
xt "20122,30804,30222,30804"
xt "19684,32556,29784,32556"
pts [
"20122,30804"
"30222,30804"
"19684,32556"
"29784,32556"
]
)
ttri (Triangle
@ -1515,7 +1516,7 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "19672,31029,20022,31379"
xt "19234,32781,19584,33131"
)
btri (Triangle
uid 217,0
@ -1528,28 +1529,28 @@ bg "0,0,0"
lineColor "39936,56832,65280"
lineWidth -1
)
xt "19672,28629,20022,28979"
xt "19234,30381,19584,30731"
)
entryActions (MLText
uid 218,0
va (VaSet
)
xt "20122,31204,20122,31204"
xt "19684,32956,19684,32956"
tm "Actions"
)
inActions (MLText
uid 219,0
va (VaSet
)
xt "20122,31604,30222,32804"
st "button <= \"100\";"
xt "19684,33356,29784,34556"
st "button <= \"001\";"
tm "Actions"
)
exitActions (MLText
uid 220,0
va (VaSet
)
xt "21172,28804,21172,28804"
xt "20734,30556,20734,30556"
tm "Actions"
)
)
@ -1562,7 +1563,7 @@ va (VaSet
isHidden 1
font "Verdana,9,1"
)
xt "20008,32092,26708,33292"
xt "19570,33844,26270,35044"
st "CASE: expr"
tm "SmCaseExpr"
)
@ -1585,7 +1586,7 @@ start &4
end &5
ss 0
es 0
cond "reset = '0'"
cond "reset = '1'"
tb (TransitionBlock
uid 106,0
ps "CenterOffsetStrategy"
@ -1616,7 +1617,7 @@ uid 109,0
va (VaSet
)
xt "8650,18900,15250,20100"
st "reset = '0'"
st "reset = '1'"
tm "Condition"
)
actions (MLText
@ -1871,10 +1872,10 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "53973,20743,53973,20743"
xt "49923,20743,60023,20743"
pts [
"53973,20743"
"53973,20743"
"49923,20743"
"60023,20743"
]
)
condition (MLText
@ -1889,7 +1890,7 @@ actions (MLText
uid 297,0
va (VaSet
)
xt "54973,20743,54973,20743"
xt "49923,20743,60023,21943"
tm "Actions"
)
)
@ -2049,10 +2050,10 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "39021,20581,39021,20581"
xt "34971,20581,45071,20581"
pts [
"39021,20581"
"39021,20581"
"34971,20581"
"45071,20581"
]
)
condition (MLText
@ -2067,7 +2068,7 @@ actions (MLText
uid 317,0
va (VaSet
)
xt "40021,20581,40021,20581"
xt "34971,20581,45071,21781"
tm "Actions"
)
)
@ -2106,11 +2107,11 @@ uid 322,0
va (VaSet
vasetType 3
)
xt "24650,11137,35434,28413"
xt "26203,11141,35448,27971"
pts [
"35434,11137"
"32486,20769"
"24650,28413"
"35448,11141"
"32243,21744"
"26203,27971"
]
arrow 1
)
@ -2130,7 +2131,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "28602,21565,37002,23765"
xt "28359,22540,36759,24740"
)
autoResize 1
lineShape (Line
@ -2139,17 +2140,17 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "31752,23665,31752,23665"
xt "31509,24640,31509,24640"
pts [
"31752,23665"
"31752,23665"
"31509,24640"
"31509,24640"
]
)
condition (MLText
uid 326,0
va (VaSet
)
xt "29102,22065,36502,23265"
xt "28859,23040,36259,24240"
st "restart = '1'"
tm "Condition"
)
@ -2157,7 +2158,7 @@ actions (MLText
uid 327,0
va (VaSet
)
xt "32802,23665,32802,23665"
xt "32559,24640,32559,24640"
tm "Actions"
)
)
@ -2171,17 +2172,17 @@ vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "33896,12130,36022,14256"
xt "33895,11999,36021,14125"
radius 1063
)
pr (Text
uid 330,0
va (VaSet
)
xt "34259,12593,35659,13793"
xt "34258,12462,35658,13662"
st "3"
ju 0
blo "34959,13593"
blo "34958,13462"
tm "TransitionPriority"
)
padding "100,100"
@ -2194,11 +2195,11 @@ uid 332,0
va (VaSet
vasetType 3
)
xt "22966,10054,33662,27447"
xt "23245,10160,33769,26327"
pts [
"22966,27447"
"25268,18215"
"33662,10054"
"23245,26327"
"24989,19333"
"33769,10160"
]
arrow 1
)
@ -2218,7 +2219,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "24120,15123,32420,17323"
xt "23841,16241,32141,18441"
)
autoResize 1
lineShape (Line
@ -2227,17 +2228,17 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "27270,17223,27270,17223"
xt "22941,18341,33041,18341"
pts [
"27270,17223"
"27270,17223"
"22941,18341"
"33041,18341"
]
)
condition (MLText
uid 336,0
va (VaSet
)
xt "24620,15623,31920,16823"
xt "24341,16741,31641,17941"
st "unlock = '1'"
tm "Condition"
)
@ -2245,7 +2246,7 @@ actions (MLText
uid 337,0
va (VaSet
)
xt "28270,17223,28270,17223"
xt "22941,18341,33041,19541"
tm "Actions"
)
)
@ -2260,7 +2261,7 @@ isHidden 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "22229,24278,24355,26404"
xt "22396,23273,24522,25399"
radius 1063
)
pr (Text
@ -2268,10 +2269,10 @@ uid 340,0
va (VaSet
isHidden 1
)
xt "22592,24741,23992,25941"
xt "22759,23736,24159,24936"
st "1"
ju 0
blo "23292,25741"
blo "23459,24736"
tm "TransitionPriority"
)
padding "100,100"
@ -2387,8 +2388,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1537,960"
viewArea "-7600,-9100,87957,47840"
windowSize "0,24,1541,960"
viewArea "-7600,-9100,88249,47840"
cachedDiagramExtent "-650,-1000,86600,47000"
hasePageBreakOrigin 1
pageBreakOrigin "-1000,-2000"
@ -2763,7 +2764,7 @@ stateOrder [
name "csm"
)
]
lastUid 496,0
lastUid 612,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *62 (LEmptyRow
@ -2862,8 +2863,8 @@ o 4
)
)
uid 162,0
cat 8
expr "reset = '0'"
cat 9
expr "reset = '1'"
)
*85 (LeafLogPort
port (LogicalPort

View File

@ -73,7 +73,7 @@ decl (Decl
n "button"
t "unsigned"
b "(2 DOWNTO 0)"
o 8
o 7
suid 51,0
)
)
@ -84,7 +84,7 @@ port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
o 1
suid 52,0
)
)
@ -95,7 +95,7 @@ port (LogicalPort
decl (Decl
n "go1"
t "std_uLogic"
o 3
o 2
suid 53,0
)
)
@ -106,7 +106,7 @@ port (LogicalPort
decl (Decl
n "go2"
t "std_uLogic"
o 4
o 3
suid 54,0
)
)
@ -117,7 +117,7 @@ port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 5
o 4
suid 55,0
)
)
@ -128,7 +128,7 @@ port (LogicalPort
decl (Decl
n "restart"
t "std_uLogic"
o 6
o 5
suid 56,0
)
)
@ -140,7 +140,7 @@ lang 11
decl (Decl
n "unlock"
t "std_ulogic"
o 7
o 6
suid 57,0
)
)
@ -198,43 +198,43 @@ uid 120,0
)
*26 (MRCItem
litem &14
pos 0
pos 6
dimension 20
uid 885,0
)
*27 (MRCItem
litem &15
pos 1
pos 0
dimension 20
uid 887,0
)
*28 (MRCItem
litem &16
pos 2
pos 1
dimension 20
uid 889,0
)
*29 (MRCItem
litem &17
pos 3
pos 2
dimension 20
uid 891,0
)
*30 (MRCItem
litem &18
pos 4
pos 3
dimension 20
uid 893,0
)
*31 (MRCItem
litem &19
pos 5
pos 4
dimension 20
uid 895,0
)
*32 (MRCItem
litem &20
pos 6
pos 5
dimension 20
uid 897,0
)
@ -467,23 +467,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -503,15 +503,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position"
)
(vvPair
variable "date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "day"
@ -523,7 +523,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "11"
)
(vvPair
variable "entity_name"
@ -547,11 +547,11 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -559,11 +559,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "15:26:48"
value "14:08:24"
)
(vvPair
variable "group"
@ -571,7 +571,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -587,7 +587,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -595,19 +595,19 @@ value "button_position"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\button_position\\interface"
)
(vvPair
variable "package_name"
@ -635,7 +635,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:26:48"
value "14:08:24"
)
(vvPair
variable "unit"
@ -643,7 +643,7 @@ value "button_position"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -655,11 +655,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -713,7 +713,7 @@ decl (Decl
n "button"
t "unsigned"
b "(2 DOWNTO 0)"
o 8
o 7
suid 51,0
)
)
@ -758,7 +758,7 @@ thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
o 1
suid 52,0
)
)
@ -803,7 +803,7 @@ thePort (LogicalPort
decl (Decl
n "go1"
t "std_uLogic"
o 3
o 2
suid 53,0
)
)
@ -848,7 +848,7 @@ thePort (LogicalPort
decl (Decl
n "go2"
t "std_uLogic"
o 4
o 3
suid 54,0
)
)
@ -893,7 +893,7 @@ thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 5
o 4
suid 55,0
)
)
@ -938,7 +938,7 @@ thePort (LogicalPort
decl (Decl
n "restart"
t "std_uLogic"
o 6
o 5
suid 56,0
)
)
@ -984,7 +984,7 @@ lang 11
decl (Decl
n "unlock"
t "std_ulogic"
o 7
o 6
suid 57,0
)
)
@ -1698,7 +1698,7 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 897,0
lastUid 920,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol:CDM"

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
instances [
(Instance
@ -133,23 +129,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -169,27 +165,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
)
(vvPair
variable "date"
value "14.12.2021"
value "15.01.2022"
)
(vvPair
variable "day"
value "mar."
value "sam."
)
(vvPair
variable "day_long"
value "mardi"
value "samedi"
)
(vvPair
variable "dd"
value "14"
value "15"
)
(vvPair
variable "entity_name"
@ -213,11 +209,11 @@ value "struct"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "15.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -225,11 +221,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:58:26"
value "21:26:49"
)
(vvPair
variable "group"
@ -237,7 +233,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -253,7 +249,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -261,19 +257,19 @@ value "cpt1bit"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\struct.bd"
)
(vvPair
variable "package_name"
@ -301,7 +297,7 @@ value "struct"
)
(vvPair
variable "time"
value "13:58:26"
value "21:26:49"
)
(vvPair
variable "unit"
@ -309,7 +305,7 @@ value "cpt1bit"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -321,11 +317,11 @@ value "struct"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -800,7 +796,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "29200,48000,38400,49000"
xt "29200,48000,39200,49000"
st "
by %user on %dd %month %year
"
@ -2705,24 +2701,6 @@ sT 1
archFileType "UNKNOWN"
)
*77 (Net
uid 442,0
decl (Decl
n "out1"
t "std_uLogic"
o 8
suid 8,0
)
declText (MLText
uid 443,0
va (VaSet
font "Courier New,8,0"
)
xt "41000,6200,56000,7000"
st "SIGNAL out1 : std_uLogic
"
)
)
*78 (Net
uid 448,0
decl (Decl
n "xorOut"
@ -2740,7 +2718,7 @@ st "SIGNAL xorOut : std_ulogic
"
)
)
*79 (Net
*78 (Net
uid 454,0
decl (Decl
n "out2"
@ -2758,7 +2736,7 @@ st "SIGNAL out2 : std_uLogic
"
)
)
*80 (Net
*79 (Net
uid 466,0
decl (Decl
n "out3"
@ -2776,7 +2754,7 @@ st "SIGNAL out3 : std_uLogic
"
)
)
*81 (Net
*80 (Net
uid 472,0
decl (Decl
n "xorOut1"
@ -2794,6 +2772,24 @@ st "SIGNAL xorOut1 : std_ulogic
"
)
)
*81 (Net
uid 586,0
decl (Decl
n "out1"
t "std_uLogic"
o 12
suid 13,0
)
declText (MLText
uid 587,0
va (VaSet
font "Courier New,8,0"
)
xt "41000,6200,56000,7000"
st "SIGNAL out1 : std_uLogic
"
)
)
*82 (Wire
uid 15,0
shape (OrthoPolyLine
@ -3092,52 +3088,6 @@ tm "WireNameMgr"
on &14
)
*91 (Wire
uid 444,0
shape (OrthoPolyLine
uid 445,0
va (VaSet
vasetType 3
)
xt "17750,15000,20382,15000"
pts [
"17750,15000"
"20382,15000"
]
)
start &65
end &45
sat 32
eat 32
stc 0
sf 1
si 0
tg (WTG
uid 446,0
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 447,0
va (VaSet
isHidden 1
)
xt "19750,13800,22750,15000"
st "out1"
blo "19750,14800"
tm "WireNameMgr"
)
s (Text
uid 529,0
va (VaSet
isHidden 1
)
xt "19750,15000,19750,15000"
blo "19750,15000"
tm "SignalTypeMgr"
)
)
on &77
)
*92 (Wire
uid 450,0
shape (OrthoPolyLine
uid 451,0
@ -3183,9 +3133,9 @@ blo "30000,17000"
tm "SignalTypeMgr"
)
)
on &78
on &77
)
*93 (Wire
*92 (Wire
uid 456,0
shape (OrthoPolyLine
uid 457,0
@ -3229,9 +3179,9 @@ blo "44950,35000"
tm "SignalTypeMgr"
)
)
on &79
on &78
)
*94 (Wire
*93 (Wire
uid 468,0
shape (OrthoPolyLine
uid 469,0
@ -3275,9 +3225,9 @@ blo "32750,37000"
tm "SignalTypeMgr"
)
)
on &80
on &79
)
*95 (Wire
*94 (Wire
uid 474,0
shape (OrthoPolyLine
uid 475,0
@ -3323,9 +3273,9 @@ blo "30000,28000"
tm "SignalTypeMgr"
)
)
on &81
on &80
)
*96 (Wire
*95 (Wire
uid 478,0
shape (OrthoPolyLine
uid 479,0
@ -3363,10 +3313,10 @@ tm "WireNameMgr"
)
on &4
)
*97 (Wire
*96 (Wire
uid 484,0
optionalChildren [
*98 (BdJunction
*97 (BdJunction
uid 494,0
ps "OnConnectorStrategy"
shape (Circle
@ -3417,7 +3367,7 @@ tm "WireNameMgr"
)
on &6
)
*99 (Wire
*98 (Wire
uid 490,0
shape (OrthoPolyLine
uid 491,0
@ -3432,7 +3382,7 @@ pts [
]
)
start &38
end &98
end &97
sat 32
eat 32
stc 0
@ -3455,6 +3405,51 @@ tm "WireNameMgr"
)
on &6
)
*99 (Wire
uid 588,0
shape (OrthoPolyLine
uid 589,0
va (VaSet
vasetType 3
)
xt "17750,15000,20382,15000"
pts [
"17750,15000"
"20382,15000"
]
)
start &65
end &45
sat 32
eat 32
stc 0
sf 1
si 0
tg (WTG
uid 590,0
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 591,0
va (VaSet
isHidden 1
)
xt "19750,13800,22750,15000"
st "out1"
blo "19750,14800"
tm "WireNameMgr"
)
s (Text
va (VaSet
isHidden 1
)
xt "19750,15000,19750,15000"
blo "19750,15000"
tm "SignalTypeMgr"
)
)
on &81
)
]
bg "65535,65535,65535"
grid (Grid
@ -3484,13 +3479,12 @@ blo "1000,-1400"
uid 155,0
va (VaSet
)
xt "1000,-1200,20000,6000"
xt "1000,-1200,18500,4800"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "PackageList"
)
]
@ -3568,12 +3562,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "-8,-8,1544,928"
viewArea "-30688,-5947,66758,53522"
windowSize "93,70,1647,1006"
viewArea "-19230,-5900,78894,51820"
cachedDiagramExtent "-6400,-3000,67100,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-7000,0"
lastUid 533,0
pageBreakOrigin "-7000,-49000"
lastUid 593,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -4613,7 +4607,7 @@ tm "BdDeclarativeTextMgr"
)
commonDM (CommonDM
ldm (LogicalDM
suid 12,0
suid 13,0
usingSuid 1
emptyRow *131 (LEmptyRow
)
@ -4742,18 +4736,6 @@ uid 119,0
port (LogicalPort
m 4
decl (Decl
n "out1"
t "std_uLogic"
o 8
suid 8,0
)
)
uid 460,0
)
*152 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "xorOut"
t "std_ulogic"
o 11
@ -4762,7 +4744,7 @@ suid 9,0
)
uid 462,0
)
*153 (LeafLogPort
*152 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
@ -4774,7 +4756,7 @@ suid 10,0
)
uid 464,0
)
*154 (LeafLogPort
*153 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
@ -4786,7 +4768,7 @@ suid 11,0
)
uid 496,0
)
*155 (LeafLogPort
*154 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
@ -4798,6 +4780,18 @@ suid 12,0
)
uid 498,0
)
*155 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "out1"
t "std_uLogic"
o 12
suid 13,0
)
)
uid 592,0
)
]
)
pdm (PhysicalDM
@ -4894,31 +4888,31 @@ uid 120,0
litem &151
pos 7
dimension 20
uid 461,0
uid 463,0
)
*169 (MRCItem
litem &152
pos 8
dimension 20
uid 463,0
uid 465,0
)
*170 (MRCItem
litem &153
pos 9
dimension 20
uid 465,0
uid 497,0
)
*171 (MRCItem
litem &154
pos 10
dimension 20
uid 497,0
uid 499,0
)
*172 (MRCItem
litem &155
pos 11
dimension 20
uid 499,0
uid 593,0
)
]
)

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
libraryRefs [
"ieee"
@ -181,7 +177,7 @@ font "Tahoma,10,0"
)
emptyMRCItem *22 (MRCItem
litem &1
pos 3
pos 7
dimension 20
)
uid 117,0
@ -381,7 +377,7 @@ font "Tahoma,10,0"
)
emptyMRCItem *54 (MRCItem
litem &41
pos 3
pos 0
dimension 20
)
uid 145,0
@ -476,23 +472,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -512,23 +508,23 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit"
)
(vvPair
variable "date"
value "14.12.2021"
value "14.01.2022"
)
(vvPair
variable "day"
value "mar."
value "ven."
)
(vvPair
variable "day_long"
value "mardi"
value "vendredi"
)
(vvPair
variable "dd"
@ -556,11 +552,11 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "14.12.2021"
value "14.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -568,11 +564,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "14:02:22"
value "09:12:22"
)
(vvPair
variable "group"
@ -580,7 +576,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -596,7 +592,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -604,19 +600,19 @@ value "cpt1bit"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt1bit\\symbol.sb"
)
(vvPair
variable "package_name"
@ -644,7 +640,7 @@ value "symbol"
)
(vvPair
variable "time"
value "14:02:22"
value "09:12:22"
)
(vvPair
variable "unit"
@ -652,7 +648,7 @@ value "cpt1bit"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -664,11 +660,11 @@ value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -1021,6 +1017,7 @@ xt "15000,2000,26000,16000"
)
]
shape (Rectangle
uid 256,0
va (VaSet
vasetType 1
transparent 1
@ -1446,21 +1443,21 @@ blo "0,1000"
uid 50,0
va (VaSet
)
xt "0,1200,19000,8400"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "PackageList"
)
]
)
windowSize "0,0,1015,690"
viewArea "0,0,0,0"
cachedDiagramExtent "0,0,0,0"
pageBreakOrigin "0,0"
windowSize "170,114,1186,804"
viewArea "-500,-500,70420,50080"
cachedDiagramExtent "-10500,0,73000,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-11000,0"
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -1730,8 +1727,8 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 232,0
lastUid 256,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol:CDM"
activeModelName "Symbol"
)

View File

@ -3,22 +3,6 @@ Header (DocumentHdr
version 2
dialect 11
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "ieee"
unitName "numeric_std"
)
(DmPackageRef
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
instances [
(Instance
@ -58,10 +42,6 @@ mwi 0
uid 347,0
)
]
libraryRefs [
"ieee"
"gates"
]
)
version "32.1"
appVersion "2019.2 (Build 5)"
@ -71,23 +51,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -107,15 +87,15 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
)
(vvPair
variable "date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "day"
@ -127,7 +107,7 @@ value "mardi"
)
(vvPair
variable "dd"
value "21"
value "11"
)
(vvPair
variable "entity_name"
@ -151,11 +131,11 @@ value "struct"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "11.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -163,11 +143,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:37:10"
value "16:06:42"
)
(vvPair
variable "group"
@ -175,7 +155,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -191,7 +171,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -199,19 +179,19 @@ value "cpt4bit"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\struct.bd"
)
(vvPair
variable "package_name"
@ -239,7 +219,7 @@ value "struct"
)
(vvPair
variable "time"
value "13:37:10"
value "16:06:42"
)
(vvPair
variable "unit"
@ -247,7 +227,7 @@ value "cpt4bit"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -259,11 +239,11 @@ value "struct"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -330,8 +310,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-7800,32000,-7000"
st "clock : std_ulogic
"
st "clock : std_ulogic"
)
)
*3 (PortIoIn
@ -394,8 +373,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-7000,32000,-6200"
st "eni : std_ulogic
"
st "eni : std_ulogic"
)
)
*5 (PortIoOut
@ -458,8 +436,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-4600,37500,-3800"
st "Qi : unsigned(3 DOWNTO 0)
"
st "Qi : unsigned(3 DOWNTO 0)"
)
)
*7 (PortIoIn
@ -522,8 +499,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-8600,32000,-7800"
st "RaZ : std_ulogic
"
st "RaZ : std_ulogic"
)
)
*9 (PortIoOut
@ -585,8 +561,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-3800,32000,-3000"
st "RCOi : std_ulogic
"
st "RCOi : std_ulogic"
)
)
*11 (PortIoIn
@ -649,8 +624,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-6200,32000,-5400"
st "reset : std_ulogic
"
st "reset : std_ulogic"
)
)
*13 (PortIoIn
@ -713,8 +687,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-5400,32000,-4600"
st "up : std_ulogic
"
st "up : std_ulogic"
)
)
*15 (Grouping
@ -741,7 +714,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "29200,48000,38400,49000"
xt "29200,48000,39200,49000"
st "
by %user on %dd %month %year
"
@ -2542,8 +2515,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-1800,36000,-1000"
st "SIGNAL RCOi1 : std_ulogic
"
st "SIGNAL RCOi1 : std_ulogic"
)
)
*75 (Net
@ -2561,8 +2533,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-1000,36000,-200"
st "SIGNAL RCOi2 : std_ulogic
"
st "SIGNAL RCOi2 : std_ulogic"
)
)
*76 (Net
@ -2580,8 +2551,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "22000,-200,36000,600"
st "SIGNAL RCOi3 : std_ulogic
"
st "SIGNAL RCOi3 : std_ulogic"
)
)
*77 (Wire
@ -3763,13 +3733,7 @@ blo "0,1000"
uid 155,0
va (VaSet
)
xt "0,1200,19000,8400"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
xt "0,1200,17500,7200"
tm "PackageList"
)
]
@ -3847,12 +3811,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,24,1537,960"
viewArea "-30700,-7300,91037,67844"
windowSize "0,24,1539,960"
viewArea "-30700,-29580,91223,45564"
cachedDiagramExtent "-7200,-11000,66000,76600"
hasePageBreakOrigin 1
pageBreakOrigin "-80000,-49000"
lastUid 751,0
lastUid 881,0
defaultCommentText (CommentText
shape (Rectangle
layer 0

View File

@ -15,10 +15,6 @@ unitName "numeric_std"
library "gates"
unitName "gates"
)
(DmPackageRef
library "ieee"
unitName "NUMERIC_SIGNED"
)
]
libraryRefs [
"ieee"
@ -182,7 +178,7 @@ font "Tahoma,10,0"
)
emptyMRCItem *22 (MRCItem
litem &1
pos 3
pos 7
dimension 20
)
uid 117,0
@ -382,7 +378,7 @@ font "Tahoma,10,0"
)
emptyMRCItem *54 (MRCItem
litem &41
pos 3
pos 0
dimension 20
)
uid 145,0
@ -477,23 +473,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -513,27 +509,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit"
)
(vvPair
variable "date"
value "21.12.2021"
value "14.01.2022"
)
(vvPair
variable "day"
value "mar."
value "ven."
)
(vvPair
variable "day_long"
value "mardi"
value "vendredi"
)
(vvPair
variable "dd"
value "21"
value "14"
)
(vvPair
variable "entity_name"
@ -557,11 +553,11 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "14.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -569,11 +565,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "13:37:10"
value "09:12:41"
)
(vvPair
variable "group"
@ -581,7 +577,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "PC-SDM"
)
(vvPair
variable "language"
@ -597,7 +593,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -605,19 +601,19 @@ value "cpt4bit"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\cpt4bit\\symbol.sb"
)
(vvPair
variable "package_name"
@ -645,7 +641,7 @@ value "symbol"
)
(vvPair
variable "time"
value "13:37:10"
value "09:12:41"
)
(vvPair
variable "unit"
@ -653,7 +649,7 @@ value "cpt4bit"
)
(vvPair
variable "user"
value "remi"
value "Simon"
)
(vvPair
variable "version"
@ -665,11 +661,11 @@ value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -712,8 +708,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,59500,4000"
st "clock : IN std_ulogic ;
"
st "clock : IN std_ulogic ;"
)
thePort (LogicalPort
lang 11
@ -758,8 +753,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,59500,4800"
st "eni : IN std_ulogic ;
"
st "eni : IN std_ulogic ;"
)
thePort (LogicalPort
lang 11
@ -805,8 +799,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,64500,7200"
st "Qi : OUT unsigned (3 DOWNTO 0) ;
"
st "Qi : OUT unsigned (3 DOWNTO 0) ;"
)
thePort (LogicalPort
lang 11
@ -853,8 +846,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,59500,3200"
st "RaZ : IN std_ulogic ;
"
st "RaZ : IN std_ulogic ;"
)
thePort (LogicalPort
lang 11
@ -900,8 +892,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,58500,8000"
st "RCOi : OUT std_ulogic
"
st "RCOi : OUT std_ulogic "
)
thePort (LogicalPort
lang 11
@ -947,8 +938,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,59500,5600"
st "reset : IN std_ulogic ;
"
st "reset : IN std_ulogic ;"
)
thePort (LogicalPort
lang 11
@ -993,8 +983,7 @@ va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,59500,6400"
st "up : IN std_ulogic ;
"
st "up : IN std_ulogic ;"
)
thePort (LogicalPort
lang 11
@ -1432,21 +1421,21 @@ blo "0,1000"
uid 50,0
va (VaSet
)
xt "0,1200,19000,8400"
xt "0,1200,17500,7200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY gates;
USE gates.gates.all;
USE ieee.NUMERIC_SIGNED.all;"
USE gates.gates.all;"
tm "PackageList"
)
]
)
windowSize "0,0,1015,690"
viewArea "0,0,0,0"
cachedDiagramExtent "0,0,0,0"
pageBreakOrigin "0,0"
windowSize "255,171,1271,861"
viewArea "-500,-500,70420,50080"
cachedDiagramExtent "-10500,-1750,73000,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-11000,-2000"
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -1716,8 +1705,8 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 249,0
lastUid 272,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol:CDM"
activeModelName "Symbol"
)

File diff suppressed because it is too large Load Diff

View File

@ -86,9 +86,10 @@ uid 329,0
)
*7 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_uLogic"
t "std_ulogic"
o 8
suid 2,0
)
@ -97,9 +98,10 @@ uid 330,0
)
*8 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_uLogic"
t "std_ulogic"
o 2
suid 1,0
)
@ -295,7 +297,7 @@ m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 DOWNTO 0)"
b "(1 to 16)"
o 21
suid 2022,0
)
@ -793,23 +795,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\symbol.sb.info"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\symbol.sb.user"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -829,27 +831,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit"
)
(vvPair
variable "date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "day"
value "mar."
value "jeu."
)
(vvPair
variable "day_long"
value "mardi"
value "jeudi"
)
(vvPair
variable "dd"
value "21"
value "20"
)
(vvPair
variable "designName"
@ -877,11 +879,11 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "remi.heredero"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -889,11 +891,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "graphical_source_time"
value "14:54:18"
value "17:47:44"
)
(vvPair
variable "group"
@ -901,7 +903,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "language"
@ -933,7 +935,7 @@ value "D:\\Users\\Syslo\\Chronometer\\Synthesis"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -941,19 +943,19 @@ value "cursorCircuit"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\symbol.sb"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\cursor@circuit\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit\\symbol.sb"
value "U:\\Cursor\\Prefs\\..\\Cursor\\hds\\cursorCircuit\\symbol.sb"
)
(vvPair
variable "package_name"
@ -1029,7 +1031,7 @@ value "symbol"
)
(vvPair
variable "time"
value "14:54:18"
value "17:47:44"
)
(vvPair
variable "unit"
@ -1037,7 +1039,7 @@ value "cursorCircuit"
)
(vvPair
variable "user"
value "remi"
value "remi.heredero"
)
(vvPair
variable "version"
@ -1049,11 +1051,11 @@ value "symbol"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -1089,15 +1091,6 @@ st "clock"
blo "41000,30500"
tm "CptPortNameMgr"
)
s (Text
uid 717,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,30700,41000,30700"
blo "41000,30700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 56,0
@ -1105,12 +1098,14 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,12700,19000,13500"
st "clock : IN std_uLogic ;"
st "clock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_uLogic"
t "std_ulogic"
o 2
suid 1,0
)
@ -1142,15 +1137,6 @@ st "reset"
blo "41000,32500"
tm "CptPortNameMgr"
)
s (Text
uid 718,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,32700,41000,32700"
blo "41000,32700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 66,0
@ -1158,12 +1144,14 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,17500,19000,18300"
st "reset : IN std_uLogic ;"
st "reset : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_uLogic"
t "std_ulogic"
o 8
suid 2,0
)
@ -1196,16 +1184,6 @@ ju 2
blo "55000,8600"
tm "CptPortNameMgr"
)
s (Text
uid 719,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,8800,55000,8800"
ju 2
blo "55000,8800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 109,0
@ -1213,7 +1191,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,26300,19000,27100"
st "side1 : OUT std_uLogic ;"
st "side1 : OUT std_uLogic ;
"
)
thePort (LogicalPort
m 1
@ -1251,15 +1230,6 @@ st "restart"
blo "41000,6500"
tm "CptPortNameMgr"
)
s (Text
uid 720,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,6700,41000,6700"
blo "41000,6700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 135,0
@ -1267,7 +1237,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,18300,19000,19100"
st "restart : IN std_uLogic ;"
st "restart : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1304,15 +1275,6 @@ st "go2"
blo "41000,10500"
tm "CptPortNameMgr"
)
s (Text
uid 721,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,10700,41000,10700"
blo "41000,10700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 178,0
@ -1320,7 +1282,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,16700,19000,17500"
st "go2 : IN std_uLogic ;"
st "go2 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1358,16 +1321,6 @@ ju 2
blo "55000,14600"
tm "CptPortNameMgr"
)
s (Text
uid 722,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,14800,55000,14800"
ju 2
blo "55000,14800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 198,0
@ -1375,7 +1328,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,19100,19000,19900"
st "sensor1 : IN std_uLogic ;"
st "sensor1 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1412,15 +1366,6 @@ st "testMode"
blo "41000,28500"
tm "CptPortNameMgr"
)
s (Text
uid 723,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,28700,41000,28700"
blo "41000,28700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 204,0
@ -1428,7 +1373,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,20700,19000,21500"
st "testMode : IN std_uLogic ;"
st "testMode : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1465,15 +1411,6 @@ st "go1"
blo "41000,8500"
tm "CptPortNameMgr"
)
s (Text
uid 725,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,8700,41000,8700"
blo "41000,8700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 214,0
@ -1481,7 +1418,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,15900,19000,16700"
st "go1 : IN std_uLogic ;"
st "go1 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1519,16 +1457,6 @@ ju 2
blo "55000,10600"
tm "CptPortNameMgr"
)
s (Text
uid 726,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,10800,55000,10800"
ju 2
blo "55000,10800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 219,0
@ -1536,7 +1464,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,27100,19000,27900"
st "side2 : OUT std_uLogic ;"
st "side2 : OUT std_uLogic ;
"
)
thePort (LogicalPort
m 1
@ -1575,16 +1504,6 @@ ju 2
blo "55000,16500"
tm "CptPortNameMgr"
)
s (Text
uid 727,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,16700,55000,16700"
ju 2
blo "55000,16700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 224,0
@ -1592,7 +1511,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,19900,19000,20700"
st "sensor2 : IN std_uLogic ;"
st "sensor2 : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1630,16 +1550,6 @@ ju 2
blo "55000,6600"
tm "CptPortNameMgr"
)
s (Text
uid 728,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,6800,55000,6800"
ju 2
blo "55000,6800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 229,0
@ -1647,7 +1557,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,25500,19000,26300"
st "motorOn : OUT std_uLogic ;"
st "motorOn : OUT std_uLogic ;
"
)
thePort (LogicalPort
m 1
@ -1686,16 +1597,6 @@ ju 2
blo "55000,20600"
tm "CptPortNameMgr"
)
s (Text
uid 729,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,20800,55000,20800"
ju 2
blo "55000,20800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 234,0
@ -1703,7 +1604,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,13500,19000,14300"
st "encoderA : IN std_uLogic ;"
st "encoderA : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1741,16 +1643,6 @@ ju 2
blo "55000,22600"
tm "CptPortNameMgr"
)
s (Text
uid 730,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,22800,55000,22800"
ju 2
blo "55000,22800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 239,0
@ -1758,7 +1650,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,14300,19000,15100"
st "encoderB : IN std_uLogic ;"
st "encoderB : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1796,16 +1689,6 @@ ju 2
blo "55000,24600"
tm "CptPortNameMgr"
)
s (Text
uid 731,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,24800,55000,24800"
ju 2
blo "55000,24800"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 244,0
@ -1813,7 +1696,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,15100,19000,15900"
st "encoderI : IN std_uLogic ;"
st "encoderI : IN std_uLogic ;
"
)
thePort (LogicalPort
decl (Decl
@ -1850,15 +1734,6 @@ st "button4"
blo "41000,12500"
tm "CptPortNameMgr"
)
s (Text
uid 732,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,12700,41000,12700"
blo "41000,12700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 249,0
@ -1866,7 +1741,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,11900,19000,12700"
st "button4 : IN std_ulogic ;"
st "button4 : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -1904,15 +1780,6 @@ st "CS1_n"
blo "41000,16500"
tm "CptPortNameMgr"
)
s (Text
uid 772,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,16700,41000,16700"
blo "41000,16700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 773,0
@ -1920,7 +1787,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,22300,19000,23100"
st "CS1_n : OUT std_ulogic ;"
st "CS1_n : OUT std_ulogic ;
"
)
thePort (LogicalPort
m 1
@ -1958,15 +1826,6 @@ st "SCL"
blo "41000,18500"
tm "CptPortNameMgr"
)
s (Text
uid 778,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,18700,41000,18700"
blo "41000,18700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 779,0
@ -1974,7 +1833,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,23900,19000,24700"
st "SCL : OUT std_ulogic ;"
st "SCL : OUT std_ulogic ;
"
)
thePort (LogicalPort
m 1
@ -2012,15 +1872,6 @@ st "SI"
blo "41000,20500"
tm "CptPortNameMgr"
)
s (Text
uid 784,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,20700,41000,20700"
blo "41000,20700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 785,0
@ -2028,7 +1879,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,24700,19000,25500"
st "SI : OUT std_ulogic ;"
st "SI : OUT std_ulogic ;
"
)
thePort (LogicalPort
m 1
@ -2066,15 +1918,6 @@ st "A0"
blo "41000,22500"
tm "CptPortNameMgr"
)
s (Text
uid 790,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,22700,41000,22700"
blo "41000,22700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 791,0
@ -2082,7 +1925,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,21500,19000,22300"
st "A0 : OUT std_ulogic ;"
st "A0 : OUT std_ulogic ;
"
)
thePort (LogicalPort
m 1
@ -2120,15 +1964,6 @@ st "RST_n"
blo "41000,24500"
tm "CptPortNameMgr"
)
s (Text
uid 796,0
va (VaSet
font "Verdana,12,0"
)
xt "41000,24700,41000,24700"
blo "41000,24700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 797,0
@ -2136,7 +1971,8 @@ va (VaSet
font "Courier New,8,0"
)
xt "2000,23100,19000,23900"
st "RST_n : OUT std_ulogic ;"
st "RST_n : OUT std_ulogic ;
"
)
thePort (LogicalPort
m 1
@ -2153,12 +1989,11 @@ uid 942,0
ps "OnEdgeStrategy"
shape (Triangle
uid 943,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "56000,25625,56750,26375"
xt "47625,1250,48375,2000"
)
tg (CPTG
uid 944,0
@ -2166,40 +2001,32 @@ ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 945,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "49400,25300,55000,26700"
xt "47300,3000,48700,8600"
st "testOut"
ju 2
blo "55000,26500"
blo "48500,3000"
tm "CptPortNameMgr"
)
s (Text
uid 946,0
va (VaSet
font "Verdana,12,0"
)
xt "55000,26700,55000,26700"
ju 2
blo "55000,26700"
tm "CptPortTypeMgr"
)
)
dt (MLText
uid 947,0
va (VaSet
font "Courier New,8,0"
)
xt "2000,27900,28000,28700"
st "testOut : OUT std_uLogic_vector (1 DOWNTO 0)"
xt "2000,27900,26500,28700"
st "testOut : OUT std_uLogic_vector (1 to 16)
"
)
thePort (LogicalPort
m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 DOWNTO 0)"
b "(1 to 16)"
o 21
suid 2022,0
)
@ -2207,7 +2034,7 @@ suid 2022,0
)
]
shape (Rectangle
uid 9,0
uid 1178,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -2216,7 +2043,6 @@ lineWidth 2
)
xt "40000,2000,56000,34000"
)
oxt "15000,6000,47000,26000"
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
@ -2301,8 +2127,8 @@ sTC 0
sT 1
)
portVis (PortSigDisplay
disp 1
sTC 0
sT 1
)
)
*128 (Grouping
@ -2945,7 +2771,7 @@ xt "0,9900,0,9900"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1108,0
lastUid 1201,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol"

1710
Cursor/hds/driver2/interface Normal file

File diff suppressed because it is too large Load Diff

4913
Cursor/hds/driver2/struct.bd Normal file

File diff suppressed because it is too large Load Diff

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 106,0
suid 114,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -65,12 +65,12 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 99,0
suid 107,0
)
)
uid 1225,0
uid 1304,0
)
*15 (LogPort
port (LogicalPort
@ -80,10 +80,10 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 100,0
suid 108,0
)
)
uid 1227,0
uid 1306,0
)
*16 (LogPort
port (LogicalPort
@ -93,10 +93,10 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
suid 101,0
suid 109,0
)
)
uid 1229,0
uid 1308,0
)
*17 (LogPort
port (LogicalPort
@ -106,22 +106,22 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 102,0
suid 110,0
)
)
uid 1231,0
uid 1310,0
)
*18 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 103,0
suid 111,0
)
)
uid 1233,0
uid 1312,0
)
*19 (LogPort
port (LogicalPort
@ -130,10 +130,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 104,0
suid 112,0
)
)
uid 1235,0
uid 1314,0
)
*20 (LogPort
port (LogicalPort
@ -142,10 +142,10 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 5
suid 105,0
suid 113,0
)
)
uid 1237,0
uid 1316,0
)
*21 (LogPort
port (LogicalPort
@ -154,10 +154,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 6
suid 106,0
suid 114,0
)
)
uid 1239,0
uid 1318,0
)
]
)
@ -213,49 +213,49 @@ uid 99,0
litem &14
pos 0
dimension 20
uid 1226,0
uid 1305,0
)
*28 (MRCItem
litem &15
pos 1
dimension 20
uid 1228,0
uid 1307,0
)
*29 (MRCItem
litem &16
pos 2
dimension 20
uid 1230,0
uid 1309,0
)
*30 (MRCItem
litem &17
pos 3
dimension 20
uid 1232,0
uid 1311,0
)
*31 (MRCItem
litem &18
pos 4
dimension 20
uid 1234,0
uid 1313,0
)
*32 (MRCItem
litem &19
pos 5
dimension 20
uid 1236,0
uid 1315,0
)
*33 (MRCItem
litem &20
pos 6
dimension 20
uid 1238,0
uid 1317,0
)
*34 (MRCItem
litem &21
pos 7
dimension 20
uid 1240,0
uid 1319,0
)
]
)
@ -530,19 +530,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -570,7 +570,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -582,7 +582,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:59:07"
value "14:00:32"
)
(vvPair
variable "group"
@ -606,7 +606,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -614,11 +614,11 @@ value "enable_acceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -654,7 +654,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:59:07"
value "14:00:32"
)
(vvPair
variable "unit"
@ -674,11 +674,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -689,10 +689,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*68 (CptPort
uid 1185,0
uid 1264,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1186,0
uid 1265,0
ro 90
va (VaSet
vasetType 1
@ -701,11 +701,11 @@ fg "0,65535,0"
xt "14250,13625,15000,14375"
)
tg (CPTG
uid 1187,0
uid 1266,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1188,0
uid 1267,0
va (VaSet
font "Verdana,12,0"
)
@ -716,26 +716,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1189,0
uid 1268,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,66500,4000"
st "clk : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 99,0
suid 107,0
)
)
)
*69 (CptPort
uid 1190,0
uid 1269,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1191,0
uid 1270,0
ro 90
va (VaSet
vasetType 1
@ -744,11 +747,11 @@ fg "0,65535,0"
xt "23000,14625,23750,15375"
)
tg (CPTG
uid 1192,0
uid 1271,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1193,0
uid 1272,0
va (VaSet
font "Verdana,12,0"
)
@ -760,10 +763,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1194,0
uid 1273,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,65000,8800"
st "end_acceleration : OUT std_ulogic
"
)
thePort (LogicalPort
lang 11
@ -772,15 +778,15 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 7
suid 100,0
suid 108,0
)
)
)
*70 (CptPort
uid 1195,0
uid 1274,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1196,0
uid 1275,0
ro 90
va (VaSet
vasetType 1
@ -789,11 +795,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 1197,0
uid 1276,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1198,0
uid 1277,0
va (VaSet
font "Verdana,12,0"
)
@ -804,10 +810,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1199,0
uid 1278,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,72000,4800"
st "info_acceleration : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -816,15 +825,15 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
suid 101,0
suid 109,0
)
)
)
*71 (CptPort
uid 1200,0
uid 1279,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1201,0
uid 1280,0
ro 90
va (VaSet
vasetType 1
@ -833,11 +842,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 1202,0
uid 1281,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1203,0
uid 1282,0
va (VaSet
font "Verdana,12,0"
)
@ -848,10 +857,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1204,0
uid 1283,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -860,15 +872,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 102,0
suid 110,0
)
)
)
*72 (CptPort
uid 1205,0
uid 1284,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1206,0
uid 1285,0
ro 90
va (VaSet
vasetType 1
@ -877,11 +889,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 1207,0
uid 1286,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1208,0
uid 1287,0
va (VaSet
font "Verdana,12,0"
)
@ -892,26 +904,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1209,0
uid 1288,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,66500,5600"
st "rst : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 103,0
suid 111,0
)
)
)
*73 (CptPort
uid 1210,0
uid 1289,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1211,0
uid 1290,0
ro 90
va (VaSet
vasetType 1
@ -920,11 +935,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1212,0
uid 1291,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1213,0
uid 1292,0
va (VaSet
font "Verdana,12,0"
)
@ -935,10 +950,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1214,0
uid 1293,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,66500,6400"
st "sideL_acceleration : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -946,15 +964,15 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 104,0
suid 112,0
)
)
)
*74 (CptPort
uid 1215,0
uid 1294,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1216,0
uid 1295,0
ro 90
va (VaSet
vasetType 1
@ -963,11 +981,11 @@ fg "0,65535,0"
xt "14250,12625,15000,13375"
)
tg (CPTG
uid 1217,0
uid 1296,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1218,0
uid 1297,0
va (VaSet
font "Verdana,12,0"
)
@ -978,10 +996,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1219,0
uid 1298,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,66500,7200"
st "skip_acceleration : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -989,15 +1010,15 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 5
suid 105,0
suid 113,0
)
)
)
*75 (CptPort
uid 1220,0
uid 1299,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1221,0
uid 1300,0
ro 90
va (VaSet
vasetType 1
@ -1006,11 +1027,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 1222,0
uid 1301,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1223,0
uid 1302,0
va (VaSet
font "Verdana,12,0"
)
@ -1021,10 +1042,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1224,0
uid 1303,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,66500,8000"
st "unlock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -1032,7 +1056,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 6
suid 106,0
suid 114,0
)
)
)
@ -1743,6 +1767,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1240,0
lastUid 1319,0
activeModelName "Symbol:CDM"
)

3404
Cursor/hds/if0/fsm.sm Normal file

File diff suppressed because it is too large Load Diff

1522
Cursor/hds/if0/symbol.sb Normal file

File diff suppressed because it is too large Load Diff

3027
Cursor/hds/if1/fsm.sm Normal file

File diff suppressed because it is too large Load Diff

1521
Cursor/hds/if1/interface Normal file

File diff suppressed because it is too large Load Diff

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 255,0
suid 311,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 242,0
suid 298,0
)
)
uid 2371,0
uid 2855,0
)
*15 (LogPort
port (LogicalPort
@ -84,10 +84,10 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 13
suid 243,0
suid 299,0
)
)
uid 2373,0
uid 2857,0
)
*16 (LogPort
port (LogicalPort
@ -96,10 +96,10 @@ decl (Decl
n "end_cruse"
t "std_ulogic"
o 14
suid 244,0
suid 300,0
)
)
uid 2375,0
uid 2859,0
)
*17 (LogPort
port (LogicalPort
@ -108,10 +108,10 @@ decl (Decl
n "end_deceleration"
t "std_ulogic"
o 15
suid 245,0
suid 301,0
)
)
uid 2377,0
uid 2861,0
)
*18 (LogPort
port (LogicalPort
@ -122,23 +122,23 @@ n "Power"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 246,0
suid 302,0
)
)
uid 2379,0
uid 2863,0
)
*19 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "power_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 22
suid 247,0
suid 303,0
)
)
uid 2381,0
uid 2865,0
)
*20 (LogPort
port (LogicalPort
@ -148,10 +148,10 @@ n "power_cruse"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 23
suid 248,0
suid 304,0
)
)
uid 2383,0
uid 2867,0
)
*21 (LogPort
port (LogicalPort
@ -161,10 +161,10 @@ n "power_deceleration"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 24
suid 249,0
suid 305,0
)
)
uid 2385,0
uid 2869,0
)
*22 (LogPort
port (LogicalPort
@ -173,10 +173,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 250,0
suid 306,0
)
)
uid 2387,0
uid 2871,0
)
*23 (LogPort
port (LogicalPort
@ -186,10 +186,10 @@ decl (Decl
n "SideL"
t "std_ulogic"
o 10
suid 251,0
suid 307,0
)
)
uid 2389,0
uid 2873,0
)
*24 (LogPort
port (LogicalPort
@ -198,10 +198,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 26
suid 252,0
suid 308,0
)
)
uid 2391,0
uid 2875,0
)
*25 (LogPort
port (LogicalPort
@ -210,10 +210,10 @@ decl (Decl
n "sideL_cruse"
t "std_ulogic"
o 27
suid 253,0
suid 309,0
)
)
uid 2393,0
uid 2877,0
)
*26 (LogPort
port (LogicalPort
@ -222,10 +222,10 @@ decl (Decl
n "sideL_deceleration"
t "std_ulogic"
o 28
suid 254,0
suid 310,0
)
)
uid 2395,0
uid 2879,0
)
*27 (LogPort
port (LogicalPort
@ -235,10 +235,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 255,0
suid 311,0
)
)
uid 2397,0
uid 2881,0
)
]
)
@ -294,85 +294,85 @@ uid 162,0
litem &14
pos 0
dimension 20
uid 2372,0
uid 2856,0
)
*34 (MRCItem
litem &15
pos 1
dimension 20
uid 2374,0
uid 2858,0
)
*35 (MRCItem
litem &16
pos 2
dimension 20
uid 2376,0
uid 2860,0
)
*36 (MRCItem
litem &17
pos 3
dimension 20
uid 2378,0
uid 2862,0
)
*37 (MRCItem
litem &18
pos 4
dimension 20
uid 2380,0
uid 2864,0
)
*38 (MRCItem
litem &19
pos 5
dimension 20
uid 2382,0
uid 2866,0
)
*39 (MRCItem
litem &20
pos 6
dimension 20
uid 2384,0
uid 2868,0
)
*40 (MRCItem
litem &21
pos 7
dimension 20
uid 2386,0
uid 2870,0
)
*41 (MRCItem
litem &22
pos 8
dimension 20
uid 2388,0
uid 2872,0
)
*42 (MRCItem
litem &23
pos 9
dimension 20
uid 2390,0
uid 2874,0
)
*43 (MRCItem
litem &24
pos 10
dimension 20
uid 2392,0
uid 2876,0
)
*44 (MRCItem
litem &25
pos 11
dimension 20
uid 2394,0
uid 2878,0
)
*45 (MRCItem
litem &26
pos 12
dimension 20
uid 2396,0
uid 2880,0
)
*46 (MRCItem
litem &27
pos 13
dimension 20
uid 2398,0
uid 2882,0
)
]
)
@ -647,19 +647,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -687,7 +687,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -699,7 +699,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -723,7 +723,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -731,11 +731,11 @@ value "move"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -771,7 +771,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -791,11 +791,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -806,10 +806,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*80 (CptPort
uid 2301,0
uid 2785,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2302,0
uid 2786,0
ro 90
va (VaSet
vasetType 1
@ -818,11 +818,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 2303,0
uid 2787,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2304,0
uid 2788,0
va (VaSet
font "Verdana,12,0"
)
@ -833,7 +833,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2305,0
uid 2789,0
va (VaSet
font "Courier New,8,0"
)
@ -847,15 +847,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 242,0
suid 298,0
)
)
)
*81 (CptPort
uid 2306,0
uid 2790,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2307,0
uid 2791,0
ro 180
va (VaSet
vasetType 1
@ -864,11 +864,11 @@ fg "0,65535,0"
xt "35625,5250,36375,6000"
)
tg (CPTG
uid 2308,0
uid 2792,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2309,0
uid 2793,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -881,7 +881,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2310,0
uid 2794,0
va (VaSet
font "Courier New,8,0"
)
@ -895,15 +895,15 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 13
suid 243,0
suid 299,0
)
)
)
*82 (CptPort
uid 2311,0
uid 2795,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2312,0
uid 2796,0
ro 180
va (VaSet
vasetType 1
@ -912,11 +912,11 @@ fg "0,65535,0"
xt "62625,5250,63375,6000"
)
tg (CPTG
uid 2313,0
uid 2797,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2314,0
uid 2798,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -929,7 +929,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2315,0
uid 2799,0
va (VaSet
font "Courier New,8,0"
)
@ -943,15 +943,15 @@ decl (Decl
n "end_cruse"
t "std_ulogic"
o 14
suid 244,0
suid 300,0
)
)
)
*83 (CptPort
uid 2316,0
uid 2800,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2317,0
uid 2801,0
ro 180
va (VaSet
vasetType 1
@ -960,11 +960,11 @@ fg "0,65535,0"
xt "89625,5250,90375,6000"
)
tg (CPTG
uid 2318,0
uid 2802,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2319,0
uid 2803,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -977,7 +977,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2320,0
uid 2804,0
va (VaSet
font "Courier New,8,0"
)
@ -991,15 +991,15 @@ decl (Decl
n "end_deceleration"
t "std_ulogic"
o 15
suid 245,0
suid 301,0
)
)
)
*84 (CptPort
uid 2321,0
uid 2805,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2322,0
uid 2806,0
ro 180
va (VaSet
vasetType 1
@ -1008,11 +1008,11 @@ fg "0,65535,0"
xt "33625,12000,34375,12750"
)
tg (CPTG
uid 2323,0
uid 2807,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2324,0
uid 2808,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1024,7 +1024,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2325,0
uid 2809,0
va (VaSet
font "Courier New,8,0"
)
@ -1040,15 +1040,15 @@ n "Power"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 246,0
suid 302,0
)
)
)
*85 (CptPort
uid 2326,0
uid 2810,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2327,0
uid 2811,0
ro 180
va (VaSet
vasetType 1
@ -1057,11 +1057,11 @@ fg "0,65535,0"
xt "33625,5250,34375,6000"
)
tg (CPTG
uid 2328,0
uid 2812,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2329,0
uid 2813,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1074,30 +1074,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2330,0
uid 2814,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,71500,6400"
st "power_acceleration : IN unsigned (7 DOWNTO 0) ;
xt "44000,5600,76000,6400"
st "power_acceleration : IN std_ulogic_vector (7 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "power_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 22
suid 247,0
suid 303,0
)
)
)
*86 (CptPort
uid 2331,0
uid 2815,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2332,0
uid 2816,0
ro 180
va (VaSet
vasetType 1
@ -1106,11 +1106,11 @@ fg "0,65535,0"
xt "60625,5250,61375,6000"
)
tg (CPTG
uid 2333,0
uid 2817,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2334,0
uid 2818,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1123,7 +1123,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2335,0
uid 2819,0
va (VaSet
font "Courier New,8,0"
)
@ -1138,15 +1138,15 @@ n "power_cruse"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 23
suid 248,0
suid 304,0
)
)
)
*87 (CptPort
uid 2336,0
uid 2820,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2337,0
uid 2821,0
ro 180
va (VaSet
vasetType 1
@ -1155,11 +1155,11 @@ fg "0,65535,0"
xt "87625,5250,88375,6000"
)
tg (CPTG
uid 2338,0
uid 2822,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2339,0
uid 2823,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1172,7 +1172,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2340,0
uid 2824,0
va (VaSet
font "Courier New,8,0"
)
@ -1187,15 +1187,15 @@ n "power_deceleration"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 24
suid 249,0
suid 305,0
)
)
)
*88 (CptPort
uid 2341,0
uid 2825,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2342,0
uid 2826,0
ro 90
va (VaSet
vasetType 1
@ -1204,11 +1204,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 2343,0
uid 2827,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2344,0
uid 2828,0
va (VaSet
font "Verdana,12,0"
)
@ -1219,7 +1219,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2345,0
uid 2829,0
va (VaSet
font "Courier New,8,0"
)
@ -1233,15 +1233,15 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 250,0
suid 306,0
)
)
)
*89 (CptPort
uid 2346,0
uid 2830,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2347,0
uid 2831,0
ro 180
va (VaSet
vasetType 1
@ -1250,11 +1250,11 @@ fg "0,65535,0"
xt "31625,12000,32375,12750"
)
tg (CPTG
uid 2348,0
uid 2832,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2349,0
uid 2833,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1266,7 +1266,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2350,0
uid 2834,0
va (VaSet
font "Courier New,8,0"
)
@ -1281,15 +1281,15 @@ decl (Decl
n "SideL"
t "std_ulogic"
o 10
suid 251,0
suid 307,0
)
)
)
*90 (CptPort
uid 2351,0
uid 2835,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2352,0
uid 2836,0
ro 180
va (VaSet
vasetType 1
@ -1298,11 +1298,11 @@ fg "0,65535,0"
xt "31625,5250,32375,6000"
)
tg (CPTG
uid 2353,0
uid 2837,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2354,0
uid 2838,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1315,7 +1315,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2355,0
uid 2839,0
va (VaSet
font "Courier New,8,0"
)
@ -1329,15 +1329,15 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 26
suid 252,0
suid 308,0
)
)
)
*91 (CptPort
uid 2356,0
uid 2840,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2357,0
uid 2841,0
ro 180
va (VaSet
vasetType 1
@ -1346,11 +1346,11 @@ fg "0,65535,0"
xt "58625,5250,59375,6000"
)
tg (CPTG
uid 2358,0
uid 2842,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2359,0
uid 2843,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1363,7 +1363,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2360,0
uid 2844,0
va (VaSet
font "Courier New,8,0"
)
@ -1377,15 +1377,15 @@ decl (Decl
n "sideL_cruse"
t "std_ulogic"
o 27
suid 253,0
suid 309,0
)
)
)
*92 (CptPort
uid 2361,0
uid 2845,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2362,0
uid 2846,0
ro 180
va (VaSet
vasetType 1
@ -1394,11 +1394,11 @@ fg "0,65535,0"
xt "85625,5250,86375,6000"
)
tg (CPTG
uid 2363,0
uid 2847,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2364,0
uid 2848,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1411,7 +1411,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2365,0
uid 2849,0
va (VaSet
font "Courier New,8,0"
)
@ -1425,15 +1425,15 @@ decl (Decl
n "sideL_deceleration"
t "std_ulogic"
o 28
suid 254,0
suid 310,0
)
)
)
*93 (CptPort
uid 2366,0
uid 2850,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2367,0
uid 2851,0
ro 90
va (VaSet
vasetType 1
@ -1442,11 +1442,11 @@ fg "0,65535,0"
xt "93000,9625,93750,10375"
)
tg (CPTG
uid 2368,0
uid 2852,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2369,0
uid 2853,0
va (VaSet
font "Verdana,12,0"
)
@ -1458,7 +1458,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2370,0
uid 2854,0
va (VaSet
font "Courier New,8,0"
)
@ -1473,7 +1473,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 255,0
suid 311,0
)
)
)
@ -1562,7 +1562,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -2186,6 +2186,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 2398,0
lastUid 2882,0
activeModelName "Symbol:CDM"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 210,0
suid 237,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 202,0
suid 229,0
)
)
uid 2457,0
uid 2738,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 13
suid 203,0
suid 230,0
)
)
uid 2459,0
uid 2740,0
)
*16 (LogPort
port (LogicalPort
@ -98,10 +98,10 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 16
suid 204,0
suid 231,0
)
)
uid 2461,0
uid 2742,0
)
*17 (LogPort
port (LogicalPort
@ -111,10 +111,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 205,0
suid 232,0
)
)
uid 2463,0
uid 2744,0
)
*18 (LogPort
port (LogicalPort
@ -122,13 +122,13 @@ lang 11
m 1
decl (Decl
n "power_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 22
suid 206,0
suid 233,0
)
)
uid 2465,0
uid 2746,0
)
*19 (LogPort
port (LogicalPort
@ -137,10 +137,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 207,0
suid 234,0
)
)
uid 2467,0
uid 2748,0
)
*20 (LogPort
port (LogicalPort
@ -150,10 +150,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 26
suid 208,0
suid 235,0
)
)
uid 2469,0
uid 2750,0
)
*21 (LogPort
port (LogicalPort
@ -162,10 +162,10 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 209,0
suid 236,0
)
)
uid 2471,0
uid 2752,0
)
*22 (LogPort
port (LogicalPort
@ -174,10 +174,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 210,0
suid 237,0
)
)
uid 2473,0
uid 2754,0
)
]
)
@ -233,55 +233,55 @@ uid 106,0
litem &14
pos 0
dimension 20
uid 2458,0
uid 2739,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 2460,0
uid 2741,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 2462,0
uid 2743,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 2464,0
uid 2745,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 2466,0
uid 2747,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 2468,0
uid 2749,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 2470,0
uid 2751,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 2472,0
uid 2753,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 2474,0
uid 2755,0
)
]
)
@ -556,19 +556,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -596,7 +596,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -608,7 +608,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -632,7 +632,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -640,11 +640,11 @@ value "process_acceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -680,7 +680,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -700,11 +700,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -715,10 +715,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 2412,0
uid 2693,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2413,0
uid 2694,0
ro 90
va (VaSet
vasetType 1
@ -727,11 +727,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 2414,0
uid 2695,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2415,0
uid 2696,0
va (VaSet
font "Verdana,12,0"
)
@ -742,7 +742,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2416,0
uid 2697,0
va (VaSet
font "Courier New,8,0"
)
@ -756,15 +756,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 202,0
suid 229,0
)
)
)
*71 (CptPort
uid 2417,0
uid 2698,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2418,0
uid 2699,0
ro 180
va (VaSet
vasetType 1
@ -773,11 +773,11 @@ fg "0,65535,0"
xt "33625,15000,34375,15750"
)
tg (CPTG
uid 2419,0
uid 2700,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2420,0
uid 2701,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -789,7 +789,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2421,0
uid 2702,0
va (VaSet
font "Courier New,8,0"
)
@ -804,15 +804,15 @@ decl (Decl
n "end_acceleration"
t "std_ulogic"
o 13
suid 203,0
suid 230,0
)
)
)
*72 (CptPort
uid 2422,0
uid 2703,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2423,0
uid 2704,0
ro 180
va (VaSet
vasetType 1
@ -821,11 +821,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 2424,0
uid 2705,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2425,0
uid 2706,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -838,7 +838,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2426,0
uid 2707,0
va (VaSet
font "Courier New,8,0"
)
@ -853,15 +853,15 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 16
suid 204,0
suid 231,0
)
)
)
*73 (CptPort
uid 2427,0
uid 2708,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2428,0
uid 2709,0
ro 180
va (VaSet
vasetType 1
@ -870,11 +870,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 2429,0
uid 2710,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2430,0
uid 2711,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -887,7 +887,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2431,0
uid 2712,0
va (VaSet
font "Courier New,8,0"
)
@ -902,15 +902,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 205,0
suid 232,0
)
)
)
*74 (CptPort
uid 2432,0
uid 2713,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2433,0
uid 2714,0
ro 180
va (VaSet
vasetType 1
@ -919,11 +919,11 @@ fg "0,65535,0"
xt "31625,15000,32375,15750"
)
tg (CPTG
uid 2434,0
uid 2715,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2435,0
uid 2716,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -935,12 +935,12 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2436,0
uid 2717,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,71500,8800"
st "power_acceleration : OUT unsigned (7 DOWNTO 0) ;
xt "44000,8000,76000,8800"
st "power_acceleration : OUT std_ulogic_vector (7 DOWNTO 0) ;
"
)
thePort (LogicalPort
@ -948,18 +948,18 @@ lang 11
m 1
decl (Decl
n "power_acceleration"
t "unsigned"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 22
suid 206,0
suid 233,0
)
)
)
*75 (CptPort
uid 2437,0
uid 2718,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2438,0
uid 2719,0
ro 90
va (VaSet
vasetType 1
@ -968,11 +968,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 2439,0
uid 2720,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2440,0
uid 2721,0
va (VaSet
font "Verdana,12,0"
)
@ -983,7 +983,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2441,0
uid 2722,0
va (VaSet
font "Courier New,8,0"
)
@ -997,15 +997,15 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 207,0
suid 234,0
)
)
)
*76 (CptPort
uid 2442,0
uid 2723,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2443,0
uid 2724,0
ro 180
va (VaSet
vasetType 1
@ -1014,11 +1014,11 @@ fg "0,65535,0"
xt "29625,15000,30375,15750"
)
tg (CPTG
uid 2444,0
uid 2725,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 2445,0
uid 2726,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1030,7 +1030,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2446,0
uid 2727,0
va (VaSet
font "Courier New,8,0"
)
@ -1045,15 +1045,15 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 26
suid 208,0
suid 235,0
)
)
)
*77 (CptPort
uid 2447,0
uid 2728,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2448,0
uid 2729,0
ro 180
va (VaSet
vasetType 1
@ -1062,11 +1062,11 @@ fg "0,65535,0"
xt "23625,5250,24375,6000"
)
tg (CPTG
uid 2449,0
uid 2730,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2450,0
uid 2731,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1079,7 +1079,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2451,0
uid 2732,0
va (VaSet
font "Courier New,8,0"
)
@ -1093,15 +1093,15 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 209,0
suid 236,0
)
)
)
*78 (CptPort
uid 2452,0
uid 2733,0
ps "OnEdgeStrategy"
shape (Triangle
uid 2453,0
uid 2734,0
ro 270
va (VaSet
vasetType 1
@ -1110,11 +1110,11 @@ fg "0,65535,0"
xt "36000,11625,36750,12375"
)
tg (CPTG
uid 2454,0
uid 2735,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 2455,0
uid 2736,0
va (VaSet
font "Verdana,12,0"
)
@ -1126,7 +1126,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 2456,0
uid 2737,0
va (VaSet
font "Courier New,8,0"
)
@ -1140,7 +1140,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 210,0
suid 237,0
)
)
)
@ -1229,7 +1229,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1853,6 +1853,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 2474,0
lastUid 2755,0
activeModelName "Symbol:CDM"
)

View File

@ -97,19 +97,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -137,7 +137,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -149,7 +149,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:59:07"
value "14:00:49"
)
(vvPair
variable "group"
@ -173,7 +173,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -181,11 +181,11 @@ value "process_acceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -221,7 +221,7 @@ value "struct1"
)
(vvPair
variable "time"
value "15:59:07"
value "14:00:49"
)
(vvPair
variable "unit"
@ -241,11 +241,11 @@ value "struct1"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -302,7 +302,7 @@ uid 21,0
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 1,0
)
@ -623,7 +623,7 @@ uid 91,0
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 6,0
)
@ -724,7 +724,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "22200,48000,31400,49000"
xt "22200,48000,31600,49000"
st "
by %user on %dd %month %year
"
@ -2563,12 +2563,12 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1537,960"
viewArea "-30000,-15600,79956,51936"
windowSize "816,192,2354,1152"
viewArea "-30000,-15600,80040,54288"
cachedDiagramExtent "-15300,-6200,59400,49000"
hasePageBreakOrigin 1
pageBreakOrigin "-87000,-49000"
lastUid 1867,0
lastUid 1946,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
@ -3721,7 +3721,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 1,0
)
@ -3733,7 +3733,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 6,0
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 126,0
suid 162,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 118,0
suid 154,0
)
)
uid 1478,0
uid 1822,0
)
*15 (LogPort
port (LogicalPort
@ -85,23 +85,23 @@ decl (Decl
n "end_cruse"
t "std_ulogic"
o 14
suid 119,0
suid 155,0
)
)
uid 1480,0
uid 1824,0
)
*16 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 120,0
suid 156,0
)
)
uid 1482,0
uid 1826,0
)
*17 (LogPort
port (LogicalPort
@ -111,10 +111,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 121,0
suid 157,0
)
)
uid 1484,0
uid 1828,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "power_cruse"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 23
suid 122,0
suid 158,0
)
)
uid 1486,0
uid 1830,0
)
*19 (LogPort
port (LogicalPort
@ -137,10 +137,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 123,0
suid 159,0
)
)
uid 1488,0
uid 1832,0
)
*20 (LogPort
port (LogicalPort
@ -150,10 +150,10 @@ n "sensor_bus"
t "std_ulogic_vector"
b "(1 DOWNTO 0)"
o 25
suid 124,0
suid 160,0
)
)
uid 1490,0
uid 1834,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "sideL_cruse"
t "std_ulogic"
o 27
suid 125,0
suid 161,0
)
)
uid 1492,0
uid 1836,0
)
*22 (LogPort
port (LogicalPort
@ -175,10 +175,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 126,0
suid 162,0
)
)
uid 1494,0
uid 1838,0
)
]
)
@ -234,55 +234,55 @@ uid 120,0
litem &14
pos 0
dimension 20
uid 1479,0
uid 1823,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 1481,0
uid 1825,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 1483,0
uid 1827,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 1485,0
uid 1829,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 1487,0
uid 1831,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 1489,0
uid 1833,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 1491,0
uid 1835,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 1493,0
uid 1837,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 1495,0
uid 1839,0
)
]
)
@ -557,19 +557,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -597,7 +597,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -609,7 +609,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -633,7 +633,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -641,11 +641,11 @@ value "process_cruse"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -681,7 +681,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -701,11 +701,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -716,10 +716,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 1433,0
uid 1777,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1434,0
uid 1778,0
ro 90
va (VaSet
vasetType 1
@ -728,11 +728,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 1435,0
uid 1779,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1436,0
uid 1780,0
va (VaSet
font "Verdana,12,0"
)
@ -743,7 +743,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1437,0
uid 1781,0
va (VaSet
font "Courier New,8,0"
)
@ -757,15 +757,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 118,0
suid 154,0
)
)
)
*71 (CptPort
uid 1438,0
uid 1782,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1439,0
uid 1783,0
ro 180
va (VaSet
vasetType 1
@ -774,11 +774,11 @@ fg "0,65535,0"
xt "33625,15000,34375,15750"
)
tg (CPTG
uid 1440,0
uid 1784,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1441,0
uid 1785,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -790,7 +790,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1442,0
uid 1786,0
va (VaSet
font "Courier New,8,0"
)
@ -805,15 +805,15 @@ decl (Decl
n "end_cruse"
t "std_ulogic"
o 14
suid 119,0
suid 155,0
)
)
)
*72 (CptPort
uid 1443,0
uid 1787,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1444,0
uid 1788,0
ro 180
va (VaSet
vasetType 1
@ -822,11 +822,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 1445,0
uid 1789,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1446,0
uid 1790,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -839,30 +839,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1447,0
uid 1791,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,68500,4800"
st "info_cruse : IN unsigned (15 DOWNTO 0) ;
xt "44000,4000,73000,4800"
st "info_cruse : IN std_ulogic_vector (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 120,0
suid 156,0
)
)
)
*73 (CptPort
uid 1448,0
uid 1792,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1449,0
uid 1793,0
ro 180
va (VaSet
vasetType 1
@ -871,11 +871,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 1450,0
uid 1794,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1451,0
uid 1795,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -888,7 +888,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1452,0
uid 1796,0
va (VaSet
font "Courier New,8,0"
)
@ -903,15 +903,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 121,0
suid 157,0
)
)
)
*74 (CptPort
uid 1453,0
uid 1797,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1454,0
uid 1798,0
ro 180
va (VaSet
vasetType 1
@ -920,11 +920,11 @@ fg "0,65535,0"
xt "31625,15000,32375,15750"
)
tg (CPTG
uid 1455,0
uid 1799,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1456,0
uid 1800,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -936,7 +936,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1457,0
uid 1801,0
va (VaSet
font "Courier New,8,0"
)
@ -952,15 +952,15 @@ n "power_cruse"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 23
suid 122,0
suid 158,0
)
)
)
*75 (CptPort
uid 1458,0
uid 1802,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1459,0
uid 1803,0
ro 90
va (VaSet
vasetType 1
@ -969,11 +969,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1460,0
uid 1804,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1461,0
uid 1805,0
va (VaSet
font "Verdana,12,0"
)
@ -984,7 +984,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1462,0
uid 1806,0
va (VaSet
font "Courier New,8,0"
)
@ -998,15 +998,15 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 123,0
suid 159,0
)
)
)
*76 (CptPort
uid 1463,0
uid 1807,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1464,0
uid 1808,0
ro 270
va (VaSet
vasetType 1
@ -1015,11 +1015,11 @@ fg "0,65535,0"
xt "36000,12625,36750,13375"
)
tg (CPTG
uid 1465,0
uid 1809,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1466,0
uid 1810,0
va (VaSet
font "Verdana,12,0"
)
@ -1031,7 +1031,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1467,0
uid 1811,0
va (VaSet
font "Courier New,8,0"
)
@ -1046,15 +1046,15 @@ n "sensor_bus"
t "std_ulogic_vector"
b "(1 DOWNTO 0)"
o 25
suid 124,0
suid 160,0
)
)
)
*77 (CptPort
uid 1468,0
uid 1812,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1469,0
uid 1813,0
ro 180
va (VaSet
vasetType 1
@ -1063,11 +1063,11 @@ fg "0,65535,0"
xt "29625,15000,30375,15750"
)
tg (CPTG
uid 1470,0
uid 1814,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1471,0
uid 1815,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1079,7 +1079,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1472,0
uid 1816,0
va (VaSet
font "Courier New,8,0"
)
@ -1094,15 +1094,15 @@ decl (Decl
n "sideL_cruse"
t "std_ulogic"
o 27
suid 125,0
suid 161,0
)
)
)
*78 (CptPort
uid 1473,0
uid 1817,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1474,0
uid 1818,0
ro 270
va (VaSet
vasetType 1
@ -1111,11 +1111,11 @@ fg "0,65535,0"
xt "36000,10625,36750,11375"
)
tg (CPTG
uid 1475,0
uid 1819,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1476,0
uid 1820,0
va (VaSet
font "Verdana,12,0"
)
@ -1127,7 +1127,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1477,0
uid 1821,0
va (VaSet
font "Courier New,8,0"
)
@ -1141,7 +1141,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 126,0
suid 162,0
)
)
)
@ -1230,7 +1230,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1854,6 +1854,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1495,0
lastUid 1839,0
activeModelName "Symbol:CDM"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 120,0
suid 160,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 111,0
suid 151,0
)
)
uid 1296,0
uid 1668,0
)
*15 (LogPort
port (LogicalPort
@ -85,23 +85,23 @@ decl (Decl
n "end_deceleration"
t "std_ulogic"
o 15
suid 112,0
suid 152,0
)
)
uid 1298,0
uid 1670,0
)
*16 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 113,0
suid 153,0
)
)
uid 1300,0
uid 1672,0
)
*17 (LogPort
port (LogicalPort
@ -111,10 +111,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 114,0
suid 154,0
)
)
uid 1302,0
uid 1674,0
)
*18 (LogPort
port (LogicalPort
@ -125,10 +125,10 @@ n "power_deceleration"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 24
suid 115,0
suid 155,0
)
)
uid 1304,0
uid 1676,0
)
*19 (LogPort
port (LogicalPort
@ -138,10 +138,10 @@ decl (Decl
n "RaZ"
t "std_ulogic"
o 9
suid 116,0
suid 156,0
)
)
uid 1306,0
uid 1678,0
)
*20 (LogPort
port (LogicalPort
@ -150,10 +150,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 117,0
suid 157,0
)
)
uid 1308,0
uid 1680,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "sideL_deceleration"
t "std_ulogic"
o 28
suid 118,0
suid 158,0
)
)
uid 1310,0
uid 1682,0
)
*22 (LogPort
port (LogicalPort
@ -175,10 +175,10 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 119,0
suid 159,0
)
)
uid 1312,0
uid 1684,0
)
*23 (LogPort
port (LogicalPort
@ -187,10 +187,10 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 120,0
suid 160,0
)
)
uid 1314,0
uid 1686,0
)
]
)
@ -246,61 +246,61 @@ uid 127,0
litem &14
pos 0
dimension 20
uid 1297,0
uid 1669,0
)
*30 (MRCItem
litem &15
pos 1
dimension 20
uid 1299,0
uid 1671,0
)
*31 (MRCItem
litem &16
pos 2
dimension 20
uid 1301,0
uid 1673,0
)
*32 (MRCItem
litem &17
pos 3
dimension 20
uid 1303,0
uid 1675,0
)
*33 (MRCItem
litem &18
pos 4
dimension 20
uid 1305,0
uid 1677,0
)
*34 (MRCItem
litem &19
pos 5
dimension 20
uid 1307,0
uid 1679,0
)
*35 (MRCItem
litem &20
pos 6
dimension 20
uid 1309,0
uid 1681,0
)
*36 (MRCItem
litem &21
pos 7
dimension 20
uid 1311,0
uid 1683,0
)
*37 (MRCItem
litem &22
pos 8
dimension 20
uid 1313,0
uid 1685,0
)
*38 (MRCItem
litem &23
pos 9
dimension 20
uid 1315,0
uid 1687,0
)
]
)
@ -575,19 +575,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -615,7 +615,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -627,7 +627,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -651,7 +651,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -659,11 +659,11 @@ value "process_deceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -699,7 +699,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -719,11 +719,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -734,10 +734,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*72 (CptPort
uid 1246,0
uid 1618,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1247,0
uid 1619,0
ro 90
va (VaSet
vasetType 1
@ -746,11 +746,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 1248,0
uid 1620,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1249,0
uid 1621,0
va (VaSet
font "Verdana,12,0"
)
@ -761,7 +761,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1250,0
uid 1622,0
va (VaSet
font "Courier New,8,0"
)
@ -775,15 +775,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 111,0
suid 151,0
)
)
)
*73 (CptPort
uid 1251,0
uid 1623,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1252,0
uid 1624,0
ro 180
va (VaSet
vasetType 1
@ -792,11 +792,11 @@ fg "0,65535,0"
xt "33625,15000,34375,15750"
)
tg (CPTG
uid 1253,0
uid 1625,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1254,0
uid 1626,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -808,7 +808,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1255,0
uid 1627,0
va (VaSet
font "Courier New,8,0"
)
@ -823,15 +823,15 @@ decl (Decl
n "end_deceleration"
t "std_ulogic"
o 15
suid 112,0
suid 152,0
)
)
)
*74 (CptPort
uid 1256,0
uid 1628,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1257,0
uid 1629,0
ro 180
va (VaSet
vasetType 1
@ -840,11 +840,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 1258,0
uid 1630,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1259,0
uid 1631,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -857,30 +857,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1260,0
uid 1632,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,72000,4800"
st "info_deceleration : IN unsigned (15 DOWNTO 0) ;
xt "44000,4000,76500,4800"
st "info_deceleration : IN std_ulogic_vector (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 113,0
suid 153,0
)
)
)
*75 (CptPort
uid 1261,0
uid 1633,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1262,0
uid 1634,0
ro 180
va (VaSet
vasetType 1
@ -889,11 +889,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 1263,0
uid 1635,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1264,0
uid 1636,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -906,7 +906,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1265,0
uid 1637,0
va (VaSet
font "Courier New,8,0"
)
@ -921,15 +921,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 114,0
suid 154,0
)
)
)
*76 (CptPort
uid 1266,0
uid 1638,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1267,0
uid 1639,0
ro 180
va (VaSet
vasetType 1
@ -938,11 +938,11 @@ fg "0,65535,0"
xt "31625,15000,32375,15750"
)
tg (CPTG
uid 1268,0
uid 1640,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1269,0
uid 1641,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -954,7 +954,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1270,0
uid 1642,0
va (VaSet
font "Courier New,8,0"
)
@ -970,15 +970,15 @@ n "power_deceleration"
t "std_ulogic_vector"
b "(7 DOWNTO 0)"
o 24
suid 115,0
suid 155,0
)
)
)
*77 (CptPort
uid 1271,0
uid 1643,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1272,0
uid 1644,0
ro 90
va (VaSet
vasetType 1
@ -987,11 +987,11 @@ fg "0,65535,0"
xt "36000,8625,36750,9375"
)
tg (CPTG
uid 1273,0
uid 1645,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1274,0
uid 1646,0
va (VaSet
font "Verdana,12,0"
)
@ -1003,7 +1003,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1275,0
uid 1647,0
va (VaSet
font "Courier New,8,0"
)
@ -1018,15 +1018,15 @@ decl (Decl
n "RaZ"
t "std_ulogic"
o 9
suid 116,0
suid 156,0
)
)
)
*78 (CptPort
uid 1276,0
uid 1648,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1277,0
uid 1649,0
ro 90
va (VaSet
vasetType 1
@ -1035,11 +1035,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1278,0
uid 1650,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1279,0
uid 1651,0
va (VaSet
font "Verdana,12,0"
)
@ -1050,7 +1050,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1280,0
uid 1652,0
va (VaSet
font "Courier New,8,0"
)
@ -1064,15 +1064,15 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 117,0
suid 157,0
)
)
)
*79 (CptPort
uid 1281,0
uid 1653,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1282,0
uid 1654,0
ro 180
va (VaSet
vasetType 1
@ -1081,11 +1081,11 @@ fg "0,65535,0"
xt "29625,15000,30375,15750"
)
tg (CPTG
uid 1283,0
uid 1655,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1284,0
uid 1656,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1097,7 +1097,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1285,0
uid 1657,0
va (VaSet
font "Courier New,8,0"
)
@ -1112,15 +1112,15 @@ decl (Decl
n "sideL_deceleration"
t "std_ulogic"
o 28
suid 118,0
suid 158,0
)
)
)
*80 (CptPort
uid 1286,0
uid 1658,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1287,0
uid 1659,0
ro 180
va (VaSet
vasetType 1
@ -1129,11 +1129,11 @@ fg "0,65535,0"
xt "23625,5250,24375,6000"
)
tg (CPTG
uid 1288,0
uid 1660,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1289,0
uid 1661,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1146,7 +1146,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1290,0
uid 1662,0
va (VaSet
font "Courier New,8,0"
)
@ -1160,15 +1160,15 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 119,0
suid 159,0
)
)
)
*81 (CptPort
uid 1291,0
uid 1663,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1292,0
uid 1664,0
ro 270
va (VaSet
vasetType 1
@ -1177,11 +1177,11 @@ fg "0,65535,0"
xt "36000,11625,36750,12375"
)
tg (CPTG
uid 1293,0
uid 1665,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1294,0
uid 1666,0
va (VaSet
font "Verdana,12,0"
)
@ -1193,7 +1193,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1295,0
uid 1667,0
va (VaSet
font "Courier New,8,0"
)
@ -1207,7 +1207,7 @@ decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 120,0
suid 160,0
)
)
)
@ -1296,7 +1296,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1920,6 +1920,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1315,0
lastUid 1687,0
activeModelName "Symbol:CDM"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 144,0
suid 180,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,10 +73,10 @@ n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 136,0
suid 172,0
)
)
uid 1650,0
uid 1994,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 137,0
suid 173,0
)
)
uid 1652,0
uid 1996,0
)
*16 (LogPort
port (LogicalPort
@ -99,36 +99,36 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 16
suid 138,0
suid 174,0
)
)
uid 1654,0
uid 1998,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 139,0
suid 175,0
)
)
uid 1656,0
uid 2000,0
)
*18 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 140,0
suid 176,0
)
)
uid 1658,0
uid 2002,0
)
*19 (LogPort
port (LogicalPort
@ -138,10 +138,10 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 141,0
suid 177,0
)
)
uid 1660,0
uid 2004,0
)
*20 (LogPort
port (LogicalPort
@ -151,10 +151,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 142,0
suid 178,0
)
)
uid 1662,0
uid 2006,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 143,0
suid 179,0
)
)
uid 1664,0
uid 2008,0
)
*22 (LogPort
port (LogicalPort
@ -176,10 +176,10 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 144,0
suid 180,0
)
)
uid 1666,0
uid 2010,0
)
]
)
@ -235,55 +235,55 @@ uid 113,0
litem &14
pos 0
dimension 20
uid 1651,0
uid 1995,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 1653,0
uid 1997,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 1655,0
uid 1999,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 1657,0
uid 2001,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 1659,0
uid 2003,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 1661,0
uid 2005,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 1663,0
uid 2007,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 1665,0
uid 2009,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 1667,0
uid 2011,0
)
]
)
@ -558,19 +558,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -598,7 +598,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -610,7 +610,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -634,7 +634,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -642,11 +642,11 @@ value "selector_acceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -682,7 +682,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -702,11 +702,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -717,10 +717,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 1605,0
uid 1949,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1606,0
uid 1950,0
ro 180
va (VaSet
vasetType 1
@ -729,11 +729,11 @@ fg "0,65535,0"
xt "16625,5250,17375,6000"
)
tg (CPTG
uid 1607,0
uid 1951,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1608,0
uid 1952,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -746,7 +746,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1609,0
uid 1953,0
va (VaSet
font "Courier New,8,0"
)
@ -761,15 +761,15 @@ n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 136,0
suid 172,0
)
)
)
*71 (CptPort
uid 1610,0
uid 1954,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1611,0
uid 1955,0
ro 180
va (VaSet
vasetType 1
@ -778,11 +778,11 @@ fg "0,65535,0"
xt "19625,5250,20375,6000"
)
tg (CPTG
uid 1612,0
uid 1956,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1613,0
uid 1957,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -795,7 +795,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1614,0
uid 1958,0
va (VaSet
font "Courier New,8,0"
)
@ -809,15 +809,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 137,0
suid 173,0
)
)
)
*72 (CptPort
uid 1615,0
uid 1959,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1616,0
uid 1960,0
ro 180
va (VaSet
vasetType 1
@ -826,11 +826,11 @@ fg "0,65535,0"
xt "16625,13000,17375,13750"
)
tg (CPTG
uid 1617,0
uid 1961,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1618,0
uid 1962,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -842,7 +842,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1619,0
uid 1963,0
va (VaSet
font "Courier New,8,0"
)
@ -858,15 +858,15 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 16
suid 138,0
suid 174,0
)
)
)
*73 (CptPort
uid 1620,0
uid 1964,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1621,0
uid 1965,0
ro 90
va (VaSet
vasetType 1
@ -875,11 +875,11 @@ fg "0,65535,0"
xt "14250,11625,15000,12375"
)
tg (CPTG
uid 1622,0
uid 1966,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1623,0
uid 1967,0
va (VaSet
font "Verdana,12,0"
)
@ -890,30 +890,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1624,0
uid 1968,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,76000,5600"
st "pos1 : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,4800,71500,5600"
st "pos1 : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 139,0
suid 175,0
)
)
)
*74 (CptPort
uid 1625,0
uid 1969,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1626,0
uid 1970,0
ro 90
va (VaSet
vasetType 1
@ -922,11 +922,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 1627,0
uid 1971,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1628,0
uid 1972,0
va (VaSet
font "Verdana,12,0"
)
@ -937,30 +937,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1629,0
uid 1973,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,76000,6400"
st "pos2 : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,5600,71500,6400"
st "pos2 : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 140,0
suid 176,0
)
)
)
*75 (CptPort
uid 1630,0
uid 1974,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1631,0
uid 1975,0
ro 90
va (VaSet
vasetType 1
@ -969,11 +969,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 1632,0
uid 1976,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1633,0
uid 1977,0
va (VaSet
font "Verdana,12,0"
)
@ -984,7 +984,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1634,0
uid 1978,0
va (VaSet
font "Courier New,8,0"
)
@ -999,15 +999,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 141,0
suid 177,0
)
)
)
*76 (CptPort
uid 1635,0
uid 1979,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1636,0
uid 1980,0
ro 90
va (VaSet
vasetType 1
@ -1016,11 +1016,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 1637,0
uid 1981,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1638,0
uid 1982,0
va (VaSet
font "Verdana,12,0"
)
@ -1031,7 +1031,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1639,0
uid 1983,0
va (VaSet
font "Courier New,8,0"
)
@ -1046,15 +1046,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 142,0
suid 178,0
)
)
)
*77 (CptPort
uid 1640,0
uid 1984,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1641,0
uid 1985,0
ro 180
va (VaSet
vasetType 1
@ -1063,11 +1063,11 @@ fg "0,65535,0"
xt "21625,5250,22375,6000"
)
tg (CPTG
uid 1642,0
uid 1986,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1643,0
uid 1987,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1080,7 +1080,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1644,0
uid 1988,0
va (VaSet
font "Courier New,8,0"
)
@ -1094,15 +1094,15 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 143,0
suid 179,0
)
)
)
*78 (CptPort
uid 1645,0
uid 1989,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1646,0
uid 1990,0
ro 180
va (VaSet
vasetType 1
@ -1111,11 +1111,11 @@ fg "0,65535,0"
xt "19625,13000,20375,13750"
)
tg (CPTG
uid 1647,0
uid 1991,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1648,0
uid 1992,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1127,7 +1127,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1649,0
uid 1993,0
va (VaSet
font "Courier New,8,0"
)
@ -1142,7 +1142,7 @@ decl (Decl
n "skip_acceleration"
t "std_ulogic"
o 29
suid 144,0
suid 180,0
)
)
)
@ -1231,7 +1231,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1855,6 +1855,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1667,0
lastUid 2011,0
activeModelName "Symbol:CDM"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 112,0
suid 144,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,10 +73,10 @@ n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 105,0
suid 137,0
)
)
uid 1359,0
uid 1675,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 106,0
suid 138,0
)
)
uid 1361,0
uid 1677,0
)
*16 (LogPort
port (LogicalPort
@ -96,39 +96,39 @@ lang 11
m 1
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 107,0
suid 139,0
)
)
uid 1363,0
uid 1679,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 108,0
suid 140,0
)
)
uid 1365,0
uid 1681,0
)
*18 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 109,0
suid 141,0
)
)
uid 1367,0
uid 1683,0
)
*19 (LogPort
port (LogicalPort
@ -138,10 +138,10 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 110,0
suid 142,0
)
)
uid 1369,0
uid 1685,0
)
*20 (LogPort
port (LogicalPort
@ -151,10 +151,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 111,0
suid 143,0
)
)
uid 1371,0
uid 1687,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 112,0
suid 144,0
)
)
uid 1373,0
uid 1689,0
)
]
)
@ -222,49 +222,49 @@ uid 127,0
litem &14
pos 0
dimension 20
uid 1360,0
uid 1676,0
)
*28 (MRCItem
litem &15
pos 1
dimension 20
uid 1362,0
uid 1678,0
)
*29 (MRCItem
litem &16
pos 2
dimension 20
uid 1364,0
uid 1680,0
)
*30 (MRCItem
litem &17
pos 3
dimension 20
uid 1366,0
uid 1682,0
)
*31 (MRCItem
litem &18
pos 4
dimension 20
uid 1368,0
uid 1684,0
)
*32 (MRCItem
litem &19
pos 5
dimension 20
uid 1370,0
uid 1686,0
)
*33 (MRCItem
litem &20
pos 6
dimension 20
uid 1372,0
uid 1688,0
)
*34 (MRCItem
litem &21
pos 7
dimension 20
uid 1374,0
uid 1690,0
)
]
)
@ -539,19 +539,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -579,7 +579,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -591,7 +591,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -615,7 +615,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -623,11 +623,11 @@ value "selector_cruse"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -663,7 +663,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -683,11 +683,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -698,10 +698,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*68 (CptPort
uid 1319,0
uid 1635,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1320,0
uid 1636,0
ro 180
va (VaSet
vasetType 1
@ -710,11 +710,11 @@ fg "0,65535,0"
xt "16625,5250,17375,6000"
)
tg (CPTG
uid 1321,0
uid 1637,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1322,0
uid 1638,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -727,7 +727,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1323,0
uid 1639,0
va (VaSet
font "Courier New,8,0"
)
@ -742,15 +742,15 @@ n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 105,0
suid 137,0
)
)
)
*69 (CptPort
uid 1324,0
uid 1640,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1325,0
uid 1641,0
ro 180
va (VaSet
vasetType 1
@ -759,11 +759,11 @@ fg "0,65535,0"
xt "19625,5250,20375,6000"
)
tg (CPTG
uid 1326,0
uid 1642,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1327,0
uid 1643,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -776,7 +776,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1328,0
uid 1644,0
va (VaSet
font "Courier New,8,0"
)
@ -790,15 +790,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 106,0
suid 138,0
)
)
)
*70 (CptPort
uid 1329,0
uid 1645,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1330,0
uid 1646,0
ro 180
va (VaSet
vasetType 1
@ -807,11 +807,11 @@ fg "0,65535,0"
xt "16625,13000,17375,13750"
)
tg (CPTG
uid 1331,0
uid 1647,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1332,0
uid 1648,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -823,12 +823,12 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1333,0
uid 1649,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,67000,8800"
st "info_cruse : OUT unsigned (15 DOWNTO 0)
xt "44000,8000,71500,8800"
st "info_cruse : OUT std_ulogic_vector (15 DOWNTO 0)
"
)
thePort (LogicalPort
@ -836,18 +836,18 @@ lang 11
m 1
decl (Decl
n "info_cruse"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 17
suid 107,0
suid 139,0
)
)
)
*71 (CptPort
uid 1334,0
uid 1650,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1335,0
uid 1651,0
ro 90
va (VaSet
vasetType 1
@ -856,11 +856,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 1336,0
uid 1652,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1337,0
uid 1653,0
va (VaSet
font "Verdana,12,0"
)
@ -871,30 +871,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1338,0
uid 1654,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,72500,5600"
st "pos1 : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,4800,68000,5600"
st "pos1 : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 108,0
suid 140,0
)
)
)
*72 (CptPort
uid 1339,0
uid 1655,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1340,0
uid 1656,0
ro 90
va (VaSet
vasetType 1
@ -903,11 +903,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 1341,0
uid 1657,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1342,0
uid 1658,0
va (VaSet
font "Verdana,12,0"
)
@ -918,30 +918,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1343,0
uid 1659,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,72500,6400"
st "pos2 : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,5600,68000,6400"
st "pos2 : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 109,0
suid 141,0
)
)
)
*73 (CptPort
uid 1344,0
uid 1660,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1345,0
uid 1661,0
ro 90
va (VaSet
vasetType 1
@ -950,11 +950,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 1346,0
uid 1662,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1347,0
uid 1663,0
va (VaSet
font "Verdana,12,0"
)
@ -965,7 +965,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1348,0
uid 1664,0
va (VaSet
font "Courier New,8,0"
)
@ -980,15 +980,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 110,0
suid 142,0
)
)
)
*74 (CptPort
uid 1349,0
uid 1665,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1350,0
uid 1666,0
ro 90
va (VaSet
vasetType 1
@ -997,11 +997,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 1351,0
uid 1667,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1352,0
uid 1668,0
va (VaSet
font "Verdana,12,0"
)
@ -1012,7 +1012,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1353,0
uid 1669,0
va (VaSet
font "Courier New,8,0"
)
@ -1027,15 +1027,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 111,0
suid 143,0
)
)
)
*75 (CptPort
uid 1354,0
uid 1670,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1355,0
uid 1671,0
ro 180
va (VaSet
vasetType 1
@ -1044,11 +1044,11 @@ fg "0,65535,0"
xt "21625,5250,22375,6000"
)
tg (CPTG
uid 1356,0
uid 1672,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1357,0
uid 1673,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1061,7 +1061,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1358,0
uid 1674,0
va (VaSet
font "Courier New,8,0"
)
@ -1075,7 +1075,7 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 112,0
suid 144,0
)
)
)
@ -1164,7 +1164,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1788,6 +1788,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1374,0
lastUid 1690,0
activeModelName "Symbol:CDM"
)

View File

@ -78,19 +78,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -118,7 +118,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -130,7 +130,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "14:44:39"
value "14:03:50"
)
(vvPair
variable "group"
@ -154,7 +154,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -162,11 +162,11 @@ value "selector_deceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "14:44:39"
value "14:03:50"
)
(vvPair
variable "unit"
@ -222,11 +222,11 @@ value "fsm"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -1632,16 +1632,16 @@ optionalChildren [
uid 315,0
sl 0
ro 270
xt "118183,1116,120433,2116"
xt "117551,-357,119801,643"
)
(Line
uid 316,0
sl 0
ro 270
xt "117683,1616,118183,1616"
xt "117051,143,117551,143"
pts [
"117683,1616"
"118183,1616"
"117051,143"
"117551,143"
]
)
]
@ -1654,9 +1654,9 @@ uid 318,0
va (VaSet
font "Verdana,9,1"
)
xt "120933,1116,126133,2316"
xt "120301,-357,125501,843"
st "position1"
blo "120933,2116"
blo "120301,643"
tm "LinkName"
)
)
@ -1930,10 +1930,10 @@ uid 342,0
va (VaSet
vasetType 3
)
xt "105689,1616,117683,6057"
xt "105689,143,117051,6057"
pts [
"105689,6057"
"117683,1616"
"117051,143"
]
)
start &21
@ -1951,7 +1951,7 @@ fg "65535,65535,65535"
bg "0,0,0"
lineColor "0,32768,49152"
)
xt "108437,1846,119137,4046"
xt "108121,1110,118821,3310"
)
autoResize 1
lineShape (Line
@ -1960,17 +1960,17 @@ va (VaSet
vasetType 3
isHidden 1
)
xt "111587,3946,111587,3946"
xt "111271,3210,111271,3210"
pts [
"111587,3946"
"111587,3946"
"111271,3210"
"111271,3210"
]
)
condition (MLText
uid 346,0
va (VaSet
)
xt "108937,2346,118637,3546"
xt "108621,1610,118321,2810"
st "button = \"0010\""
tm "Condition"
)
@ -1978,7 +1978,7 @@ actions (MLText
uid 347,0
va (VaSet
)
xt "113787,3946,113787,3946"
xt "113471,3210,113471,3210"
tm "Actions"
)
)
@ -1992,17 +1992,17 @@ vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "105824,4550,107950,6676"
xt "105761,4402,107887,6528"
radius 1063
)
pr (Text
uid 350,0
va (VaSet
)
xt "106187,5013,107587,6213"
xt "106124,4865,107524,6065"
st "1"
ju 0
blo "106887,6013"
blo "106824,5865"
tm "TransitionPriority"
)
padding "100,100"
@ -2288,8 +2288,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1537,960"
viewArea "-400,-20100,137389,64532"
windowSize "1836,192,3374,1152"
viewArea "-400,-20100,137495,67479"
cachedDiagramExtent "0,-1000,128724,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -2665,7 +2665,7 @@ stateOrder [
name "csm"
)
]
lastUid 587,0
lastUid 616,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *63 (LEmptyRow
@ -2765,7 +2765,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 4
)
@ -2777,7 +2777,7 @@ port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 5
)
@ -4064,6 +4064,6 @@ pts [
]
)
)
activeModelName "StateMachine:CDM"
activeModelName "StateMachine"
LanguageMgr "Vhdl2008LangMgr"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 125,0
suid 161,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -73,10 +73,10 @@ n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 117,0
suid 153,0
)
)
uid 1402,0
uid 1769,0
)
*15 (LogPort
port (LogicalPort
@ -85,10 +85,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 118,0
suid 154,0
)
)
uid 1404,0
uid 1771,0
)
*16 (LogPort
port (LogicalPort
@ -96,39 +96,39 @@ lang 11
m 1
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 119,0
suid 155,0
)
)
uid 1406,0
uid 1773,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 120,0
suid 156,0
)
)
uid 1408,0
uid 1775,0
)
*18 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 121,0
suid 157,0
)
)
uid 1410,0
uid 1777,0
)
*19 (LogPort
port (LogicalPort
@ -138,10 +138,10 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 122,0
suid 158,0
)
)
uid 1412,0
uid 1779,0
)
*20 (LogPort
port (LogicalPort
@ -151,10 +151,10 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 123,0
suid 159,0
)
)
uid 1414,0
uid 1781,0
)
*21 (LogPort
port (LogicalPort
@ -163,10 +163,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 124,0
suid 160,0
)
)
uid 1416,0
uid 1783,0
)
*22 (LogPort
port (LogicalPort
@ -176,10 +176,10 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 125,0
suid 161,0
)
)
uid 1418,0
uid 1785,0
)
]
)
@ -235,55 +235,55 @@ uid 127,0
litem &14
pos 0
dimension 20
uid 1403,0
uid 1770,0
)
*29 (MRCItem
litem &15
pos 1
dimension 20
uid 1405,0
uid 1772,0
)
*30 (MRCItem
litem &16
pos 2
dimension 20
uid 1407,0
uid 1774,0
)
*31 (MRCItem
litem &17
pos 3
dimension 20
uid 1409,0
uid 1776,0
)
*32 (MRCItem
litem &18
pos 4
dimension 20
uid 1411,0
uid 1778,0
)
*33 (MRCItem
litem &19
pos 5
dimension 20
uid 1413,0
uid 1780,0
)
*34 (MRCItem
litem &20
pos 6
dimension 20
uid 1415,0
uid 1782,0
)
*35 (MRCItem
litem &21
pos 7
dimension 20
uid 1417,0
uid 1784,0
)
*36 (MRCItem
litem &22
pos 8
dimension 20
uid 1419,0
uid 1786,0
)
]
)
@ -558,19 +558,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -598,7 +598,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -610,7 +610,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -634,7 +634,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -642,11 +642,11 @@ value "selector_deceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -682,7 +682,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -702,11 +702,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -717,10 +717,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*70 (CptPort
uid 1357,0
uid 1724,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1358,0
uid 1725,0
ro 180
va (VaSet
vasetType 1
@ -729,11 +729,11 @@ fg "0,65535,0"
xt "15625,5250,16375,6000"
)
tg (CPTG
uid 1359,0
uid 1726,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1360,0
uid 1727,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -746,7 +746,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1361,0
uid 1728,0
va (VaSet
font "Courier New,8,0"
)
@ -761,15 +761,15 @@ n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 117,0
suid 153,0
)
)
)
*71 (CptPort
uid 1362,0
uid 1729,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1363,0
uid 1730,0
ro 180
va (VaSet
vasetType 1
@ -778,11 +778,11 @@ fg "0,65535,0"
xt "18625,5250,19375,6000"
)
tg (CPTG
uid 1364,0
uid 1731,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1365,0
uid 1732,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -795,7 +795,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1366,0
uid 1733,0
va (VaSet
font "Courier New,8,0"
)
@ -809,15 +809,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 118,0
suid 154,0
)
)
)
*72 (CptPort
uid 1367,0
uid 1734,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1368,0
uid 1735,0
ro 180
va (VaSet
vasetType 1
@ -826,11 +826,11 @@ fg "0,65535,0"
xt "16625,13000,17375,13750"
)
tg (CPTG
uid 1369,0
uid 1736,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1370,0
uid 1737,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -842,12 +842,12 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1371,0
uid 1738,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,71500,8800"
st "info_deceleration : OUT unsigned (15 DOWNTO 0) ;
xt "44000,8000,76000,8800"
st "info_deceleration : OUT std_ulogic_vector (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
@ -855,18 +855,18 @@ lang 11
m 1
decl (Decl
n "info_deceleration"
t "unsigned"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 18
suid 119,0
suid 155,0
)
)
)
*73 (CptPort
uid 1372,0
uid 1739,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1373,0
uid 1740,0
ro 90
va (VaSet
vasetType 1
@ -875,11 +875,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 1374,0
uid 1741,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1375,0
uid 1742,0
va (VaSet
font "Verdana,12,0"
)
@ -890,30 +890,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1376,0
uid 1743,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,76000,5600"
st "pos1 : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,4800,71500,5600"
st "pos1 : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 120,0
suid 156,0
)
)
)
*74 (CptPort
uid 1377,0
uid 1744,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1378,0
uid 1745,0
ro 90
va (VaSet
vasetType 1
@ -922,11 +922,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 1379,0
uid 1746,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1380,0
uid 1747,0
va (VaSet
font "Verdana,12,0"
)
@ -937,30 +937,30 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1381,0
uid 1748,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,76000,6400"
st "pos2 : IN std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,5600,71500,6400"
st "pos2 : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 121,0
suid 157,0
)
)
)
*75 (CptPort
uid 1382,0
uid 1749,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1383,0
uid 1750,0
ro 90
va (VaSet
vasetType 1
@ -969,11 +969,11 @@ fg "0,65535,0"
xt "14250,8625,15000,9375"
)
tg (CPTG
uid 1384,0
uid 1751,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1385,0
uid 1752,0
va (VaSet
font "Verdana,12,0"
)
@ -984,7 +984,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1386,0
uid 1753,0
va (VaSet
font "Courier New,8,0"
)
@ -999,15 +999,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 122,0
suid 158,0
)
)
)
*76 (CptPort
uid 1387,0
uid 1754,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1388,0
uid 1755,0
ro 90
va (VaSet
vasetType 1
@ -1016,11 +1016,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 1389,0
uid 1756,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1390,0
uid 1757,0
va (VaSet
font "Verdana,12,0"
)
@ -1031,7 +1031,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1391,0
uid 1758,0
va (VaSet
font "Courier New,8,0"
)
@ -1046,15 +1046,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 123,0
suid 159,0
)
)
)
*77 (CptPort
uid 1392,0
uid 1759,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1393,0
uid 1760,0
ro 180
va (VaSet
vasetType 1
@ -1063,11 +1063,11 @@ fg "0,65535,0"
xt "20625,5250,21375,6000"
)
tg (CPTG
uid 1394,0
uid 1761,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1395,0
uid 1762,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1080,7 +1080,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1396,0
uid 1763,0
va (VaSet
font "Courier New,8,0"
)
@ -1094,15 +1094,15 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 124,0
suid 160,0
)
)
)
*78 (CptPort
uid 1397,0
uid 1764,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1398,0
uid 1765,0
ro 180
va (VaSet
vasetType 1
@ -1111,11 +1111,11 @@ fg "0,65535,0"
xt "19625,13000,20375,13750"
)
tg (CPTG
uid 1399,0
uid 1766,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1400,0
uid 1767,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -1127,7 +1127,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 1401,0
uid 1768,0
va (VaSet
font "Courier New,8,0"
)
@ -1142,7 +1142,7 @@ decl (Decl
n "skip_deceleration"
t "std_uLogic"
o 30
suid 125,0
suid 161,0
)
)
)
@ -1231,7 +1231,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1855,6 +1855,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 1419,0
lastUid 1786,0
activeModelName "Symbol:CDM"
)

View File

@ -26,7 +26,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 55,0
suid 75,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -72,10 +72,10 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 51,0
suid 71,0
)
)
uid 782,0
uid 1014,0
)
*15 (LogPort
port (LogicalPort
@ -83,13 +83,13 @@ lang 11
m 1
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 52,0
suid 72,0
)
)
uid 784,0
uid 1016,0
)
*16 (LogPort
port (LogicalPort
@ -97,13 +97,13 @@ lang 11
m 1
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 53,0
suid 73,0
)
)
uid 786,0
uid 1018,0
)
*17 (LogPort
port (LogicalPort
@ -114,10 +114,10 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 54,0
suid 74,0
)
)
uid 788,0
uid 1020,0
)
*18 (LogPort
port (LogicalPort
@ -126,10 +126,10 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 55,0
suid 75,0
)
)
uid 790,0
uid 1022,0
)
]
)
@ -185,31 +185,31 @@ uid 92,0
litem &14
pos 0
dimension 20
uid 783,0
uid 1015,0
)
*25 (MRCItem
litem &15
pos 1
dimension 20
uid 785,0
uid 1017,0
)
*26 (MRCItem
litem &16
pos 2
dimension 20
uid 787,0
uid 1019,0
)
*27 (MRCItem
litem &17
pos 3
dimension 20
uid 789,0
uid 1021,0
)
*28 (MRCItem
litem &18
pos 4
dimension 20
uid 791,0
uid 1023,0
)
]
)
@ -484,19 +484,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -524,7 +524,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -536,7 +536,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "group"
@ -560,7 +560,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -568,11 +568,11 @@ value "set_position"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -608,7 +608,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:58:05"
value "14:05:30"
)
(vvPair
variable "unit"
@ -628,11 +628,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -643,10 +643,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*62 (CptPort
uid 757,0
uid 989,0
ps "OnEdgeStrategy"
shape (Triangle
uid 758,0
uid 990,0
ro 90
va (VaSet
vasetType 1
@ -655,11 +655,11 @@ fg "0,65535,0"
xt "14250,6625,15000,7375"
)
tg (CPTG
uid 759,0
uid 991,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 760,0
uid 992,0
va (VaSet
font "Verdana,12,0"
)
@ -670,7 +670,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 761,0
uid 993,0
va (VaSet
font "Courier New,8,0"
)
@ -684,15 +684,15 @@ decl (Decl
n "clk"
t "unsigned"
o 3
suid 51,0
suid 71,0
)
)
)
*63 (CptPort
uid 762,0
uid 994,0
ps "OnEdgeStrategy"
shape (Triangle
uid 763,0
uid 995,0
ro 90
va (VaSet
vasetType 1
@ -701,11 +701,11 @@ fg "0,65535,0"
xt "23000,11625,23750,12375"
)
tg (CPTG
uid 764,0
uid 996,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 765,0
uid 997,0
va (VaSet
font "Verdana,12,0"
)
@ -717,12 +717,12 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 766,0
uid 998,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,71500,4800"
st "pos1 : OUT std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,4000,67000,4800"
st "pos1 : OUT unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
@ -730,18 +730,18 @@ lang 11
m 1
decl (Decl
n "pos1"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 19
suid 52,0
suid 72,0
)
)
)
*64 (CptPort
uid 767,0
uid 999,0
ps "OnEdgeStrategy"
shape (Triangle
uid 768,0
uid 1000,0
ro 90
va (VaSet
vasetType 1
@ -750,11 +750,11 @@ fg "0,65535,0"
xt "23000,10625,23750,11375"
)
tg (CPTG
uid 769,0
uid 1001,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 770,0
uid 1002,0
va (VaSet
font "Verdana,12,0"
)
@ -766,12 +766,12 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 771,0
uid 1003,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,71500,5600"
st "pos2 : OUT std_ulogic_vector (15 DOWNTO 0) ;
xt "44000,4800,67000,5600"
st "pos2 : OUT unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
@ -779,18 +779,18 @@ lang 11
m 1
decl (Decl
n "pos2"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 20
suid 53,0
suid 73,0
)
)
)
*65 (CptPort
uid 772,0
uid 1004,0
ps "OnEdgeStrategy"
shape (Triangle
uid 773,0
uid 1005,0
ro 90
va (VaSet
vasetType 1
@ -799,11 +799,11 @@ fg "0,65535,0"
xt "23000,9625,23750,10375"
)
tg (CPTG
uid 774,0
uid 1006,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 775,0
uid 1007,0
va (VaSet
font "Verdana,12,0"
)
@ -815,7 +815,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 776,0
uid 1008,0
va (VaSet
font "Courier New,8,0"
)
@ -831,15 +831,15 @@ n "pos_init"
t "std_ulogic_vector"
b "(15 DOWNTO 0)"
o 21
suid 54,0
suid 74,0
)
)
)
*66 (CptPort
uid 777,0
uid 1009,0
ps "OnEdgeStrategy"
shape (Triangle
uid 778,0
uid 1010,0
ro 90
va (VaSet
vasetType 1
@ -848,11 +848,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 779,0
uid 1011,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 780,0
uid 1012,0
va (VaSet
font "Verdana,12,0"
)
@ -863,7 +863,7 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 781,0
uid 1013,0
va (VaSet
font "Courier New,8,0"
)
@ -877,7 +877,7 @@ decl (Decl
n "rst"
t "unsigned"
o 4
suid 55,0
suid 75,0
)
)
)
@ -966,7 +966,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1590,6 +1590,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 791,0
lastUid 1023,0
activeModelName "Symbol:CDM"
)

View File

@ -34,23 +34,23 @@ VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hdl"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm.info"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm.user"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
)
(vvPair
variable "appl"
@ -70,27 +70,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
)
(vvPair
variable "d_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration"
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -114,11 +114,11 @@ value "fsm"
)
(vvPair
variable "graphical_source_author"
value "Simon"
value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -126,11 +126,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "13:20:58"
value "14:00:30"
)
(vvPair
variable "group"
@ -138,7 +138,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "PC-SDM"
value "MARVIN"
)
(vvPair
variable "language"
@ -154,7 +154,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -162,19 +162,19 @@ value "side_acceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm"
)
(vvPair
variable "p_logical"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\side_acceleration\\fsm.sm"
)
(vvPair
variable "package_name"
@ -202,7 +202,7 @@ value "fsm"
)
(vvPair
variable "time"
value "13:20:58"
value "14:00:30"
)
(vvPair
variable "unit"
@ -210,7 +210,7 @@ value "side_acceleration"
)
(vvPair
variable "user"
value "Simon"
value "remi"
)
(vvPair
variable "version"
@ -222,11 +222,11 @@ value "fsm"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -1710,8 +1710,8 @@ tm "SmCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1715,1119"
viewArea "8600,-1600,78489,43755"
windowSize "1020,0,2736,1119"
viewArea "8600,-1600,78536,43661"
cachedDiagramExtent "0,-1000,86600,47000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-2000"
@ -2084,7 +2084,7 @@ stateOrder [
name "csm"
)
]
lastUid 271,0
lastUid 300,0
commonDM (CommonDM
ldm (LogicalDM
emptyRow *56 (LEmptyRow
@ -2147,7 +2147,7 @@ port (LogicalPort
lang 11
decl (Decl
n "Position"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
)
@ -2159,7 +2159,7 @@ port (LogicalPort
lang 11
decl (Decl
n "info_acceleration"
t "std_ulogic_vector"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
)
@ -2184,7 +2184,7 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_ulogic"
o 2
)
)
@ -2197,7 +2197,7 @@ port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
)
)

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 55,0
suid 60,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -65,12 +65,12 @@ port (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 51,0
suid 56,0
)
)
uid 805,0
uid 886,0
)
*15 (LogPort
port (LogicalPort
@ -80,10 +80,10 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
suid 52,0
suid 57,0
)
)
uid 807,0
uid 888,0
)
*16 (LogPort
port (LogicalPort
@ -93,22 +93,22 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 53,0
suid 58,0
)
)
uid 809,0
uid 890,0
)
*17 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 54,0
suid 59,0
)
)
uid 811,0
uid 892,0
)
*18 (LogPort
port (LogicalPort
@ -118,10 +118,10 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 55,0
suid 60,0
)
)
uid 813,0
uid 894,0
)
]
)
@ -177,31 +177,31 @@ uid 92,0
litem &14
pos 0
dimension 20
uid 806,0
uid 887,0
)
*25 (MRCItem
litem &15
pos 1
dimension 20
uid 808,0
uid 889,0
)
*26 (MRCItem
litem &16
pos 2
dimension 20
uid 810,0
uid 891,0
)
*27 (MRCItem
litem &17
pos 3
dimension 20
uid 812,0
uid 893,0
)
*28 (MRCItem
litem &18
pos 4
dimension 20
uid 814,0
uid 895,0
)
]
)
@ -476,19 +476,19 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
)
(vvPair
variable "date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "day"
value "mar."
value "dim."
)
(vvPair
variable "day_long"
value "mardi"
value "dimanche"
)
(vvPair
variable "dd"
value "21"
value "09"
)
(vvPair
variable "entity_name"
@ -516,7 +516,7 @@ value "remi"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "09.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -528,7 +528,7 @@ value "MARVIN"
)
(vvPair
variable "graphical_source_time"
value "15:59:07"
value "14:00:32"
)
(vvPair
variable "group"
@ -552,7 +552,7 @@ value "$SCRATCH_DIR/Cursor/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -560,11 +560,11 @@ value "side_acceleration"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
@ -600,7 +600,7 @@ value "interface"
)
(vvPair
variable "time"
value "15:59:07"
value "14:00:32"
)
(vvPair
variable "unit"
@ -620,11 +620,11 @@ value "interface"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -635,10 +635,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*62 (CptPort
uid 780,0
uid 861,0
ps "OnEdgeStrategy"
shape (Triangle
uid 781,0
uid 862,0
ro 90
va (VaSet
vasetType 1
@ -647,11 +647,11 @@ fg "0,65535,0"
xt "14250,13625,15000,14375"
)
tg (CPTG
uid 782,0
uid 863,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 783,0
uid 864,0
va (VaSet
font "Verdana,12,0"
)
@ -662,26 +662,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 784,0
uid 865,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,66500,4000"
st "clk : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clk"
t "unsigned"
t "std_uLogic"
o 2
suid 51,0
suid 56,0
)
)
)
*63 (CptPort
uid 785,0
uid 866,0
ps "OnEdgeStrategy"
shape (Triangle
uid 786,0
uid 867,0
ro 90
va (VaSet
vasetType 1
@ -690,11 +693,11 @@ fg "0,65535,0"
xt "14250,10625,15000,11375"
)
tg (CPTG
uid 787,0
uid 868,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 788,0
uid 869,0
va (VaSet
font "Verdana,12,0"
)
@ -705,10 +708,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 789,0
uid 870,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,72000,4800"
st "info_acceleration : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -717,15 +723,15 @@ n "info_acceleration"
t "unsigned"
b "(15 DOWNTO 0)"
o 3
suid 52,0
suid 57,0
)
)
)
*64 (CptPort
uid 790,0
uid 871,0
ps "OnEdgeStrategy"
shape (Triangle
uid 791,0
uid 872,0
ro 90
va (VaSet
vasetType 1
@ -734,11 +740,11 @@ fg "0,65535,0"
xt "14250,9625,15000,10375"
)
tg (CPTG
uid 792,0
uid 873,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 793,0
uid 874,0
va (VaSet
font "Verdana,12,0"
)
@ -749,10 +755,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 794,0
uid 875,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,72000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -761,15 +770,15 @@ n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 53,0
suid 58,0
)
)
)
*65 (CptPort
uid 795,0
uid 876,0
ps "OnEdgeStrategy"
shape (Triangle
uid 796,0
uid 877,0
ro 90
va (VaSet
vasetType 1
@ -778,11 +787,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 797,0
uid 878,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 798,0
uid 879,0
va (VaSet
font "Verdana,12,0"
)
@ -793,26 +802,29 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 799,0
uid 880,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,66500,5600"
st "rst : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "rst"
t "unsigned"
t "std_ulogic"
o 4
suid 54,0
suid 59,0
)
)
)
*66 (CptPort
uid 800,0
uid 881,0
ps "OnEdgeStrategy"
shape (Triangle
uid 801,0
uid 882,0
ro 90
va (VaSet
vasetType 1
@ -821,11 +833,11 @@ fg "0,65535,0"
xt "23000,10625,23750,11375"
)
tg (CPTG
uid 802,0
uid 883,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 803,0
uid 884,0
va (VaSet
font "Verdana,12,0"
)
@ -837,10 +849,13 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 804,0
uid 885,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,65000,6400"
st "sideL_acceleration : OUT std_ulogic
"
)
thePort (LogicalPort
lang 11
@ -849,7 +864,7 @@ decl (Decl
n "sideL_acceleration"
t "std_ulogic"
o 9
suid 55,0
suid 60,0
)
)
)
@ -938,7 +953,7 @@ fg "0,0,32768"
bg "0,0,32768"
font "Arial,8,0"
)
xt "36200,48000,45400,49000"
xt "36200,48000,45600,49000"
st "
by %user on %dd %month %year
"
@ -1560,6 +1575,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 814,0
lastUid 895,0
activeModelName "Symbol:CDM"
)

View File

@ -0,0 +1,29 @@
--
-- VHDL Architecture Cursor_test.pulseWidthModulator_tester.arch_name
--
-- Created:
-- by - Simon.UNKNOWN (PC-SDM)
-- at - 08:54:14 14.01.2022
--
-- using Mentor Graphics HDL Designer(TM) 2019.2 (Build 5)
--
ARCHITECTURE arch_name OF pulseWidthModulator_tester IS
constant clockFrequency: real := 66.0E6;
constant clockPeriod: time := 1.0/clockFrequency * 1 sec;
signal clock_int: std_ulogic := '0';
BEGIN
-----------------------------------------------------------------------------
-- clock and reset
reset <= '1', '0' after 4*clockPeriod;
clock_int <= not clock_int after clockPeriod/2;
clock <= transport clock_int after 9*clockPeriod/10;
------------------------------------------------------------------------------
END ARCHITECTURE arch_name;

View File

@ -1 +1 @@
DIALECT atom VHDL_ANY
DIALECT atom VHDL_2008

View File

@ -1,4 +1,4 @@
DIALECT atom VHDL_2008
INCLUDE list {
DEFAULT atom 1
}
DIALECT atom VHDL_2008

View File

@ -0,0 +1,4 @@
DIALECT atom VHDL_2008
INCLUDE list {
DEFAULT atom 1
}

View File

@ -0,0 +1 @@
DIALECT atom VHDL_2008

View File

@ -0,0 +1 @@
DIALECT atom VHDL_ANY

View File

@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom struct
DEFAULT_FILE atom pulse@width@modulator_tb/struct.bd

View File

@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom fsm
DEFAULT_FILE atom pwmtest/fsm.sm

View File

@ -59,7 +59,7 @@ value "1"
)
]
mwi 0
uid 5729,0
uid 6511,0
)
]
libraryRefs [
@ -78,23 +78,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hdl"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.info"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.user"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "appl"
@ -114,27 +114,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
)
(vvPair
variable "d_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb"
)
(vvPair
variable "date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "day"
value "mar."
value "jeu."
)
(vvPair
variable "day_long"
value "mardi"
value "jeudi"
)
(vvPair
variable "dd"
value "21"
value "20"
)
(vvPair
variable "designName"
@ -162,11 +162,11 @@ value "struct"
)
(vvPair
variable "graphical_source_author"
value "remi"
value "remi.heredero"
)
(vvPair
variable "graphical_source_date"
value "21.12.2021"
value "20.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -174,11 +174,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "graphical_source_time"
value "16:00:15"
value "16:53:37"
)
(vvPair
variable "group"
@ -186,7 +186,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "MARVIN"
value "WE2332001"
)
(vvPair
variable "language"
@ -206,7 +206,7 @@ value "$SCRATCH_DIR/Cursor_test/work"
)
(vvPair
variable "mm"
value "12"
value "01"
)
(vvPair
variable "module_name"
@ -214,19 +214,19 @@ value "cursor_tb"
)
(vvPair
variable "month"
value "déc."
value "janv."
)
(vvPair
variable "month_long"
value "décembre"
value "janvier"
)
(vvPair
variable "p"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
)
(vvPair
variable "p_logical"
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
value "U:\\Cursor\\Prefs\\..\\Cursor_test\\hds\\cursor_tb\\struct.bd"
)
(vvPair
variable "package_name"
@ -302,7 +302,7 @@ value "struct"
)
(vvPair
variable "time"
value "16:00:15"
value "16:53:37"
)
(vvPair
variable "unit"
@ -310,7 +310,7 @@ value "cursor_tb"
)
(vvPair
variable "user"
value "remi"
value "remi.heredero"
)
(vvPair
variable "version"
@ -322,11 +322,11 @@ value "struct"
)
(vvPair
variable "year"
value "2021"
value "2022"
)
(vvPair
variable "yy"
value "21"
value "22"
)
]
)
@ -449,7 +449,7 @@ va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "56200,91400,70700,92600"
xt "56200,91400,75700,92600"
st "
by %user on %dd %month %year
"
@ -706,9 +706,9 @@ uid 1777,0
va (VaSet
font "Verdana,12,1"
)
xt "13600,82900,22000,84200"
xt "14600,76900,23000,78200"
st "Cursor_test"
blo "13600,83900"
blo "14600,77900"
tm "BdLibraryNameMgr"
)
*16 (Text
@ -716,9 +716,9 @@ uid 1778,0
va (VaSet
font "Verdana,12,1"
)
xt "13600,84300,23400,85600"
xt "14600,78300,24400,79600"
st "cursor_tester"
blo "13600,85300"
blo "14600,79300"
tm "BlkNameMgr"
)
*17 (Text
@ -726,9 +726,9 @@ uid 1779,0
va (VaSet
font "Verdana,12,1"
)
xt "13600,85700,19200,87000"
xt "14600,79700,20200,81000"
st "I_tester"
blo "13600,86700"
blo "14600,80700"
tm "InstanceNameMgr"
)
]
@ -985,13 +985,13 @@ st "SIGNAL button4 : std_uLogic"
)
)
*31 (SaComponent
uid 5729,0
uid 6511,0
optionalChildren [
*32 (CptPort
uid 5624,0
uid 6427,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5625,0
uid 6428,0
ro 90
va (VaSet
vasetType 1
@ -1000,11 +1000,11 @@ fg "0,65535,0"
xt "38250,62625,39000,63375"
)
tg (CPTG
uid 5626,0
uid 6429,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5627,0
uid 6430,0
va (VaSet
font "Verdana,12,0"
)
@ -1023,10 +1023,10 @@ suid 1,0
)
)
*33 (CptPort
uid 5629,0
uid 6431,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5630,0
uid 6432,0
ro 90
va (VaSet
vasetType 1
@ -1035,11 +1035,11 @@ fg "0,65535,0"
xt "38250,64625,39000,65375"
)
tg (CPTG
uid 5631,0
uid 6433,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5632,0
uid 6434,0
va (VaSet
font "Verdana,12,0"
)
@ -1058,10 +1058,10 @@ suid 2,0
)
)
*34 (CptPort
uid 5634,0
uid 6435,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5635,0
uid 6436,0
ro 90
va (VaSet
vasetType 1
@ -1070,11 +1070,11 @@ fg "0,65535,0"
xt "55000,40625,55750,41375"
)
tg (CPTG
uid 5636,0
uid 6437,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5637,0
uid 6438,0
va (VaSet
font "Verdana,12,0"
)
@ -1095,10 +1095,10 @@ suid 3,0
)
)
*35 (CptPort
uid 5639,0
uid 6439,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5640,0
uid 6440,0
ro 90
va (VaSet
vasetType 1
@ -1107,11 +1107,11 @@ fg "0,65535,0"
xt "38250,38625,39000,39375"
)
tg (CPTG
uid 5641,0
uid 6441,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5642,0
uid 6442,0
va (VaSet
font "Verdana,12,0"
)
@ -1130,10 +1130,10 @@ suid 4,0
)
)
*36 (CptPort
uid 5644,0
uid 6443,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5645,0
uid 6444,0
ro 90
va (VaSet
vasetType 1
@ -1142,11 +1142,11 @@ fg "0,65535,0"
xt "38250,42625,39000,43375"
)
tg (CPTG
uid 5646,0
uid 6445,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5647,0
uid 6446,0
va (VaSet
font "Verdana,12,0"
)
@ -1165,10 +1165,10 @@ suid 5,0
)
)
*37 (CptPort
uid 5649,0
uid 6447,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5650,0
uid 6448,0
ro 270
va (VaSet
vasetType 1
@ -1177,11 +1177,11 @@ fg "0,65535,0"
xt "55000,46625,55750,47375"
)
tg (CPTG
uid 5651,0
uid 6449,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5652,0
uid 6450,0
va (VaSet
font "Verdana,12,0"
)
@ -1201,10 +1201,10 @@ suid 6,0
)
)
*38 (CptPort
uid 5654,0
uid 6451,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5655,0
uid 6452,0
ro 90
va (VaSet
vasetType 1
@ -1213,11 +1213,11 @@ fg "0,65535,0"
xt "38250,60625,39000,61375"
)
tg (CPTG
uid 5656,0
uid 6453,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5657,0
uid 6454,0
va (VaSet
font "Verdana,12,0"
)
@ -1236,10 +1236,10 @@ suid 7,0
)
)
*39 (CptPort
uid 5659,0
uid 6455,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5660,0
uid 6456,0
ro 90
va (VaSet
vasetType 1
@ -1248,11 +1248,11 @@ fg "0,65535,0"
xt "38250,40625,39000,41375"
)
tg (CPTG
uid 5661,0
uid 6457,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5662,0
uid 6458,0
va (VaSet
font "Verdana,12,0"
)
@ -1271,10 +1271,10 @@ suid 9,0
)
)
*40 (CptPort
uid 5664,0
uid 6459,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5665,0
uid 6460,0
ro 90
va (VaSet
vasetType 1
@ -1283,11 +1283,11 @@ fg "0,65535,0"
xt "55000,42625,55750,43375"
)
tg (CPTG
uid 5666,0
uid 6461,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5667,0
uid 6462,0
va (VaSet
font "Verdana,12,0"
)
@ -1308,10 +1308,10 @@ suid 10,0
)
)
*41 (CptPort
uid 5669,0
uid 6463,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5670,0
uid 6464,0
ro 270
va (VaSet
vasetType 1
@ -1320,11 +1320,11 @@ fg "0,65535,0"
xt "55000,48625,55750,49375"
)
tg (CPTG
uid 5671,0
uid 6465,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5672,0
uid 6466,0
va (VaSet
font "Verdana,12,0"
)
@ -1344,10 +1344,10 @@ suid 11,0
)
)
*42 (CptPort
uid 5674,0
uid 6467,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5675,0
uid 6468,0
ro 90
va (VaSet
vasetType 1
@ -1356,11 +1356,11 @@ fg "0,65535,0"
xt "55000,38625,55750,39375"
)
tg (CPTG
uid 5676,0
uid 6469,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5677,0
uid 6470,0
va (VaSet
font "Verdana,12,0"
)
@ -1381,10 +1381,10 @@ suid 12,0
)
)
*43 (CptPort
uid 5679,0
uid 6471,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5680,0
uid 6472,0
ro 270
va (VaSet
vasetType 1
@ -1393,11 +1393,11 @@ fg "0,65535,0"
xt "55000,52625,55750,53375"
)
tg (CPTG
uid 5681,0
uid 6473,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5682,0
uid 6474,0
va (VaSet
font "Verdana,12,0"
)
@ -1417,10 +1417,10 @@ suid 13,0
)
)
*44 (CptPort
uid 5684,0
uid 6475,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5685,0
uid 6476,0
ro 270
va (VaSet
vasetType 1
@ -1429,11 +1429,11 @@ fg "0,65535,0"
xt "55000,54625,55750,55375"
)
tg (CPTG
uid 5686,0
uid 6477,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5687,0
uid 6478,0
va (VaSet
font "Verdana,12,0"
)
@ -1453,10 +1453,10 @@ suid 14,0
)
)
*45 (CptPort
uid 5689,0
uid 6479,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5690,0
uid 6480,0
ro 270
va (VaSet
vasetType 1
@ -1465,11 +1465,11 @@ fg "0,65535,0"
xt "55000,56625,55750,57375"
)
tg (CPTG
uid 5691,0
uid 6481,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5692,0
uid 6482,0
va (VaSet
font "Verdana,12,0"
)
@ -1489,10 +1489,10 @@ suid 15,0
)
)
*46 (CptPort
uid 5694,0
uid 6483,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5695,0
uid 6484,0
ro 90
va (VaSet
vasetType 1
@ -1501,11 +1501,11 @@ fg "0,65535,0"
xt "38250,44625,39000,45375"
)
tg (CPTG
uid 5696,0
uid 6485,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5697,0
uid 6486,0
va (VaSet
font "Verdana,12,0"
)
@ -1525,10 +1525,10 @@ suid 16,0
)
)
*47 (CptPort
uid 5699,0
uid 6487,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5700,0
uid 6488,0
ro 270
va (VaSet
vasetType 1
@ -1537,11 +1537,11 @@ fg "0,65535,0"
xt "38250,48625,39000,49375"
)
tg (CPTG
uid 5701,0
uid 6489,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5702,0
uid 6490,0
va (VaSet
font "Verdana,12,0"
)
@ -1561,10 +1561,10 @@ suid 2017,0
)
)
*48 (CptPort
uid 5704,0
uid 6491,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5705,0
uid 6492,0
ro 270
va (VaSet
vasetType 1
@ -1573,11 +1573,11 @@ fg "0,65535,0"
xt "38250,50625,39000,51375"
)
tg (CPTG
uid 5706,0
uid 6493,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5707,0
uid 6494,0
va (VaSet
font "Verdana,12,0"
)
@ -1597,10 +1597,10 @@ suid 2018,0
)
)
*49 (CptPort
uid 5709,0
uid 6495,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5710,0
uid 6496,0
ro 270
va (VaSet
vasetType 1
@ -1609,11 +1609,11 @@ fg "0,65535,0"
xt "38250,52625,39000,53375"
)
tg (CPTG
uid 5711,0
uid 6497,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5712,0
uid 6498,0
va (VaSet
font "Verdana,12,0"
)
@ -1633,10 +1633,10 @@ suid 2019,0
)
)
*50 (CptPort
uid 5714,0
uid 6499,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5715,0
uid 6500,0
ro 270
va (VaSet
vasetType 1
@ -1645,11 +1645,11 @@ fg "0,65535,0"
xt "38250,54625,39000,55375"
)
tg (CPTG
uid 5716,0
uid 6501,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5717,0
uid 6502,0
va (VaSet
font "Verdana,12,0"
)
@ -1669,10 +1669,10 @@ suid 2020,0
)
)
*51 (CptPort
uid 5719,0
uid 6503,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5720,0
uid 6504,0
ro 270
va (VaSet
vasetType 1
@ -1681,11 +1681,11 @@ fg "0,65535,0"
xt "38250,56625,39000,57375"
)
tg (CPTG
uid 5721,0
uid 6505,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5722,0
uid 6506,0
va (VaSet
font "Verdana,12,0"
)
@ -1705,10 +1705,10 @@ suid 2021,0
)
)
*52 (CptPort
uid 5724,0
uid 6507,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5725,0
uid 6508,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -1716,18 +1716,19 @@ fg "0,65535,0"
xt "46625,34250,47375,35000"
)
tg (CPTG
uid 5726,0
uid 6509,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5727,0
uid 6510,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "44000,36000,49600,37400"
xt "46300,36000,47700,41600"
st "testOut"
ju 2
blo "49600,37200"
blo "47500,36000"
)
)
thePort (LogicalPort
@ -1735,7 +1736,7 @@ m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 DOWNTO 0)"
b "(1 to 16)"
o 21
suid 2022,0
)
@ -1743,7 +1744,7 @@ suid 2022,0
)
]
shape (Rectangle
uid 5730,0
uid 6512,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -1754,12 +1755,12 @@ xt "39000,35000,55000,67000"
)
oxt "40000,2000,56000,34000"
ttg (MlTextGroup
uid 5731,0
uid 6513,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*53 (Text
uid 5732,0
uid 6514,0
va (VaSet
font "Verdana,8,1"
)
@ -1769,7 +1770,7 @@ blo "39100,67500"
tm "BdLibraryNameMgr"
)
*54 (Text
uid 5733,0
uid 6515,0
va (VaSet
font "Verdana,8,1"
)
@ -1779,7 +1780,7 @@ blo "39100,68500"
tm "CptNameMgr"
)
*55 (Text
uid 5734,0
uid 6516,0
va (VaSet
font "Verdana,8,1"
)
@ -1791,12 +1792,12 @@ tm "InstanceNameMgr"
]
)
ga (GenericAssociation
uid 5735,0
uid 6517,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 5736,0
uid 6518,0
text (MLText
uid 5737,0
uid 6519,0
va (VaSet
font "Courier New,8,0"
)
@ -2531,8 +2532,8 @@ tm "BdCompilerDirectivesTextMgr"
]
associable 1
)
windowSize "0,0,1537,960"
viewArea "-3100,25591,97693,87499"
windowSize "0,14,1921,1080"
viewArea "-3700,26953,126661,99179"
cachedDiagramExtent "-7000,-1400,102000,93000"
pageSetupInfo (PageSetupInfo
ptrCmd "\\\\ipp://ipp.hevs.ch\\PREA309_HPLJP3005DN,winspool,"
@ -2559,7 +2560,7 @@ boundaryWidth 0
)
hasePageBreakOrigin 1
pageBreakOrigin "-7000,19000"
lastUid 5843,0
lastUid 6572,0
defaultCommentText (CommentText
shape (Rectangle
layer 0

File diff suppressed because it is too large Load Diff

View File

@ -1,118 +0,0 @@
ARCHITECTURE test OF cursor_tester IS
constant clockPeriod: time := 50 ns;
signal sClock: std_uLogic := '1';
constant pulsesPerTurn: integer := 200;
constant stepPeriodNb: positive := 8;
signal stepEn: std_uLogic := '0';
signal direction: std_uLogic;
signal turning: std_uLogic;
signal stepCount: unsigned(10 downto 0) := (others => '0');
BEGIN
------------------------------------------------------------------------------
-- clock and reset
--
reset <= '1', '0' after clockPeriod/4;
sClock <= not sClock after clockPeriod/2;
clock <= sClock after clockPeriod/10;
------------------------------------------------------------------------------
-- test sequence
--
process
begin
testMode <= '1';
restart <= '0';
go1 <= '0';
go2 <= '0';
setPoint <= '0';
sensor1 <= '0';
sensor2 <= '0';
wait for 1 us;
----------------------------------------------------------------------------
-- advance to first stop point
go1 <= '1', '0' after 1 us;
wait for 4 ms;
----------------------------------------------------------------------------
-- advance to second stop point
go2 <= '1', '0' after 1 us;
wait for 4 ms;
----------------------------------------------------------------------------
-- back to start with sensor reset
restart <= '1', '0' after 1 us;
wait for 0.5 ms;
sensor1 <= '1', '0' after 1 us;
wait for 0.5 ms;
----------------------------------------------------------------------------
-- advance to second stop point
go2 <= '1', '0' after 1 us;
wait for 7 ms;
----------------------------------------------------------------------------
-- go back to first stop point
go1 <= '1', '0' after 1 us;
wait for 4 ms;
----------------------------------------------------------------------------
-- back to start with counter stop
restart <= '1', '0' after 1 us;
wait for 4 ms;
sensor1 <= '1', '0' after 1 us;
wait for 1 ms;
wait;
end process;
------------------------------------------------------------------------------
-- motor feedback
--
turning <= motorOn;
findDirection: process(side1, side2)
begin
if (side1 = '1') and (side2 = '0') then
direction <= '1';
elsif (side1 = '0') and (side2 = '1') then
direction <= '0';
end if;
end process findDirection;
stepEn <= not stepEn after (stepPeriodNb/4)*clockPeriod;
count: process (stepEn)
begin
if turning = '1' then
if direction = '1' then
if stepCount < pulsesPerTurn-1 then
stepCount <= stepCount + 1;
else
stepCount <= to_unsigned(0, stepCount'length);
end if;
else
if stepCount > 0 then
stepCount <= stepCount - 1;
else
stepCount <= to_unsigned(pulsesPerTurn-1, stepCount'length);
end if;
end if;
end if;
end process count;
encoderA <= stepCount(1);
encoderB <= not stepCount(1) xor stepCount(0);
encoderI <= '1' when stepCount = pulsesPerTurn-1 else '0';
END test;

File diff suppressed because it is too large Load Diff

View File

@ -10,7 +10,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 2001,0
suid 2003,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -328,23 +328,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\symbol.sb.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\symbol.sb.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "appl"
@ -364,27 +364,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb"
)
(vvPair
variable "d_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tb"
)
(vvPair
variable "date"
value "11.11.2019"
value "14.01.2022"
)
(vvPair
variable "day"
value "Mon"
value "ven."
)
(vvPair
variable "day_long"
value "Monday"
value "vendredi"
)
(vvPair
variable "dd"
value "11"
value "14"
)
(vvPair
variable "entity_name"
@ -408,11 +408,11 @@ value "symbol"
)
(vvPair
variable "graphical_source_author"
value "silvan.zahno"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "11.11.2019"
value "14.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -420,11 +420,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "WE6996"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "08:13:21"
value "08:40:19"
)
(vvPair
variable "group"
@ -432,7 +432,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "WE6996"
value "PC-SDM"
)
(vvPair
variable "language"
@ -452,7 +452,7 @@ value "$SCRATCH_DIR/Cursor_test/work"
)
(vvPair
variable "mm"
value "11"
value "01"
)
(vvPair
variable "module_name"
@ -460,19 +460,19 @@ value "pulseWidthModulator_tb"
)
(vvPair
variable "month"
value "Nov"
value "janv."
)
(vvPair
variable "month_long"
value "November"
value "janvier"
)
(vvPair
variable "p"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\symbol.sb"
)
(vvPair
variable "p_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tb\\symbol.sb"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tb\\symbol.sb"
)
(vvPair
variable "package_name"
@ -500,7 +500,7 @@ value "symbol"
)
(vvPair
variable "time"
value "08:13:21"
value "08:40:19"
)
(vvPair
variable "unit"
@ -508,7 +508,7 @@ value "pulseWidthModulator_tb"
)
(vvPair
variable "user"
value "silvan.zahno"
value "Simon"
)
(vvPair
variable "version"
@ -520,11 +520,11 @@ value "symbol"
)
(vvPair
variable "year"
value "2019"
value "2022"
)
(vvPair
variable "yy"
value "19"
value "22"
)
]
)
@ -539,7 +539,7 @@ va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "29000,13000,43000,27000"
xt "29000,13000,51000,27000"
)
oxt "15000,6000,20000,26000"
biTextGroup (BiTextGroup
@ -671,7 +671,7 @@ va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "27200,47400,42300,48600"
xt "27200,47400,42900,48600"
st "
by %user on %dd %month %year
"
@ -1222,5 +1222,5 @@ xt "0,3400,0,3400"
tm "SyDeclarativeTextMgr"
)
)
lastUid 111,0
lastUid 217,0
)

View File

@ -10,9 +10,14 @@ unitName "std_logic_1164"
library "ieee"
unitName "numeric_std"
)
(DmPackageRef
library "gates"
unitName "gates"
)
]
libraryRefs [
"ieee"
"gates"
]
)
version "27.1"
@ -20,7 +25,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 2015,0
suid 2031,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -63,68 +68,32 @@ tm "EolColHdrMgr"
port (LogicalPort
m 1
decl (Decl
n "amplitude"
t "unsigned"
b "(counterBitNb-1 DOWNTO 0)"
o 2
suid 2011,0
)
)
uid 280,0
)
*15 (LogPort
port (LogicalPort
m 1
decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 2012,0
suid 2030,0
)
)
uid 282,0
uid 490,0
)
*16 (LogPort
port (LogicalPort
m 1
decl (Decl
n "en"
t "std_ulogic"
o 4
suid 2013,0
)
)
uid 284,0
)
*17 (LogPort
port (LogicalPort
decl (Decl
n "PWM"
t "std_ulogic"
o 1
suid 2014,0
)
)
uid 286,0
)
*18 (LogPort
*15 (LogPort
port (LogicalPort
m 1
decl (Decl
n "reset"
t "std_ulogic"
o 5
suid 2015,0
suid 2031,0
)
)
uid 288,0
uid 492,0
)
]
)
pdm (PhysicalDM
uid 193,0
optionalChildren [
*19 (Sheet
*16 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
@ -141,61 +110,43 @@ cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *20 (MRCItem
emptyMRCItem *17 (MRCItem
litem &1
pos 3
dimension 20
)
uid 128,0
optionalChildren [
*21 (MRCItem
*18 (MRCItem
litem &2
pos 0
dimension 20
uid 131,0
)
*22 (MRCItem
*19 (MRCItem
litem &3
pos 1
dimension 23
uid 133,0
)
*23 (MRCItem
*20 (MRCItem
litem &4
pos 2
hidden 1
dimension 20
uid 135,0
)
*24 (MRCItem
*21 (MRCItem
litem &14
pos 0
dimension 20
uid 281,0
uid 491,0
)
*25 (MRCItem
*22 (MRCItem
litem &15
pos 1
dimension 20
uid 283,0
)
*26 (MRCItem
litem &16
pos 2
dimension 20
uid 285,0
)
*27 (MRCItem
litem &17
pos 3
dimension 20
uid 287,0
)
*28 (MRCItem
litem &18
pos 4
dimension 20
uid 289,0
uid 493,0
)
]
)
@ -208,49 +159,49 @@ textAngle 90
)
uid 129,0
optionalChildren [
*29 (MRCItem
*23 (MRCItem
litem &5
pos 0
dimension 20
uid 137,0
)
*30 (MRCItem
*24 (MRCItem
litem &7
pos 1
dimension 50
uid 141,0
)
*31 (MRCItem
*25 (MRCItem
litem &8
pos 2
dimension 100
uid 143,0
)
*32 (MRCItem
*26 (MRCItem
litem &9
pos 3
dimension 50
uid 145,0
)
*33 (MRCItem
*27 (MRCItem
litem &10
pos 4
dimension 100
uid 147,0
)
*34 (MRCItem
*28 (MRCItem
litem &11
pos 5
dimension 100
uid 149,0
)
*35 (MRCItem
*29 (MRCItem
litem &12
pos 6
dimension 50
uid 151,0
)
*36 (MRCItem
*30 (MRCItem
litem &13
pos 7
dimension 80
@ -271,41 +222,41 @@ uid 186,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *37 (LEmptyRow
emptyRow *31 (LEmptyRow
)
uid 195,0
optionalChildren [
*38 (RefLabelRowHdr
*32 (RefLabelRowHdr
)
*39 (TitleRowHdr
*33 (TitleRowHdr
)
*40 (FilterRowHdr
*34 (FilterRowHdr
)
*41 (RefLabelColHdr
*35 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*42 (RowExpandColHdr
*36 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*43 (GroupColHdr
*37 (GroupColHdr
tm "GroupColHdrMgr"
)
*44 (NameColHdr
*38 (NameColHdr
tm "GenericNameColHdrMgr"
)
*45 (TypeColHdr
*39 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*46 (InitColHdr
*40 (InitColHdr
tm "GenericValueColHdrMgr"
)
*47 (PragmaColHdr
*41 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*48 (EolColHdr
*42 (EolColHdr
tm "GenericEolColHdrMgr"
)
*49 (LogGeneric
*43 (LogGeneric
generic (GiElement
name "counterBitNb"
type "positive"
@ -318,7 +269,7 @@ uid 184,0
pdm (PhysicalDM
uid 196,0
optionalChildren [
*50 (Sheet
*44 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
@ -335,34 +286,34 @@ cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *51 (MRCItem
litem &37
emptyMRCItem *45 (MRCItem
litem &31
pos 3
dimension 20
)
uid 160,0
optionalChildren [
*52 (MRCItem
litem &38
*46 (MRCItem
litem &32
pos 0
dimension 20
uid 163,0
)
*53 (MRCItem
litem &39
*47 (MRCItem
litem &33
pos 1
dimension 23
uid 165,0
)
*54 (MRCItem
litem &40
*48 (MRCItem
litem &34
pos 2
hidden 1
dimension 20
uid 167,0
)
*55 (MRCItem
litem &49
*49 (MRCItem
litem &43
pos 0
dimension 20
uid 185,0
@ -378,44 +329,44 @@ textAngle 90
)
uid 161,0
optionalChildren [
*56 (MRCItem
litem &41
*50 (MRCItem
litem &35
pos 0
dimension 20
uid 169,0
)
*57 (MRCItem
litem &43
*51 (MRCItem
litem &37
pos 1
dimension 50
uid 173,0
)
*58 (MRCItem
litem &44
*52 (MRCItem
litem &38
pos 2
dimension 100
uid 175,0
)
*59 (MRCItem
litem &45
*53 (MRCItem
litem &39
pos 3
dimension 100
uid 177,0
)
*60 (MRCItem
litem &46
*54 (MRCItem
litem &40
pos 4
dimension 50
uid 179,0
)
*61 (MRCItem
litem &47
*55 (MRCItem
litem &41
pos 5
dimension 50
uid 181,0
)
*62 (MRCItem
litem &48
*56 (MRCItem
litem &42
pos 6
dimension 80
uid 183,0
@ -442,23 +393,23 @@ value " "
)
(vvPair
variable "HDLDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hdl"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester\\interface.info"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester\\interface.user"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "appl"
@ -478,27 +429,27 @@ value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester"
)
(vvPair
variable "d_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tester"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tester"
)
(vvPair
variable "date"
value "11.11.2019"
value "14.01.2022"
)
(vvPair
variable "day"
value "Mon"
value "ven."
)
(vvPair
variable "day_long"
value "Monday"
value "vendredi"
)
(vvPair
variable "dd"
value "11"
value "14"
)
(vvPair
variable "entity_name"
@ -522,11 +473,11 @@ value "interface"
)
(vvPair
variable "graphical_source_author"
value "silvan.zahno"
value "Simon"
)
(vvPair
variable "graphical_source_date"
value "11.11.2019"
value "14.01.2022"
)
(vvPair
variable "graphical_source_group"
@ -534,11 +485,11 @@ value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "WE6996"
value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "08:13:22"
value "09:04:38"
)
(vvPair
variable "group"
@ -546,7 +497,7 @@ value "UNKNOWN"
)
(vvPair
variable "host"
value "WE6996"
value "PC-SDM"
)
(vvPair
variable "language"
@ -566,7 +517,7 @@ value "$SCRATCH_DIR/Cursor_test/work"
)
(vvPair
variable "mm"
value "11"
value "01"
)
(vvPair
variable "module_name"
@ -574,19 +525,19 @@ value "pulseWidthModulator_tester"
)
(vvPair
variable "month"
value "Nov"
value "janv."
)
(vvPair
variable "month_long"
value "November"
value "janvier"
)
(vvPair
variable "p"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tester\\interface"
)
(vvPair
variable "p_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tester\\interface"
value "C:\\Users\\Simon\\Desktop\\ELN\\Projet\\Cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tester\\interface"
)
(vvPair
variable "package_name"
@ -614,7 +565,7 @@ value "interface"
)
(vvPair
variable "time"
value "08:13:22"
value "09:04:38"
)
(vvPair
variable "unit"
@ -622,7 +573,7 @@ value "pulseWidthModulator_tester"
)
(vvPair
variable "user"
value "silvan.zahno"
value "Simon"
)
(vvPair
variable "version"
@ -634,73 +585,25 @@ value "interface"
)
(vvPair
variable "year"
value "2019"
value "2022"
)
(vvPair
variable "yy"
value "19"
value "22"
)
]
)
LanguageMgr "VhdlLangMgr"
uid 76,0
optionalChildren [
*63 (SymbolBody
*57 (SymbolBody
uid 8,0
optionalChildren [
*64 (CptPort
uid 255,0
*58 (CptPort
uid 480,0
ps "OnEdgeStrategy"
shape (Triangle
uid 256,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "22625,5250,23375,6000"
)
tg (CPTG
uid 257,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 258,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "22300,7000,23700,14000"
st "amplitude"
ju 2
blo "23500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 259,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2800,73500,3600"
st "amplitude : OUT unsigned (counterBitNb-1 DOWNTO 0) ;
"
)
thePort (LogicalPort
m 1
decl (Decl
n "amplitude"
t "unsigned"
b "(counterBitNb-1 DOWNTO 0)"
o 2
suid 2011,0
)
)
)
*65 (CptPort
uid 260,0
ps "OnEdgeStrategy"
shape (Triangle
uid 261,0
uid 481,0
va (VaSet
vasetType 1
fg "0,65535,0"
@ -708,11 +611,11 @@ fg "0,65535,0"
xt "28625,5250,29375,6000"
)
tg (CPTG
uid 262,0
uid 482,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 263,0
uid 483,0
ro 270
va (VaSet
font "Verdana,12,0"
@ -725,12 +628,12 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 264,0
uid 484,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3600,61500,4400"
st "clock : OUT std_ulogic ;
xt "44000,2000,59500,2800"
st "clock : OUT std_ulogic ;
"
)
thePort (LogicalPort
@ -739,109 +642,15 @@ decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 2012,0
suid 2030,0
)
)
)
*66 (CptPort
uid 265,0
*59 (CptPort
uid 485,0
ps "OnEdgeStrategy"
shape (Triangle
uid 266,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "24625,5250,25375,6000"
)
tg (CPTG
uid 267,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 268,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "24300,7000,25700,9400"
st "en"
ju 2
blo "25500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 269,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4400,61500,5200"
st "en : OUT std_ulogic ;
"
)
thePort (LogicalPort
m 1
decl (Decl
n "en"
t "std_ulogic"
o 4
suid 2013,0
)
)
)
*67 (CptPort
uid 270,0
ps "OnEdgeStrategy"
shape (Triangle
uid 271,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "58625,5250,59375,6000"
)
tg (CPTG
uid 272,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 273,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "58300,7000,59700,10900"
st "PWM"
ju 2
blo "59500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 274,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2000,61500,2800"
st "PWM : IN std_ulogic ;
"
)
thePort (LogicalPort
decl (Decl
n "PWM"
t "std_ulogic"
o 1
suid 2014,0
)
)
)
*68 (CptPort
uid 275,0
ps "OnEdgeStrategy"
shape (Triangle
uid 276,0
uid 486,0
va (VaSet
vasetType 1
fg "0,65535,0"
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add wave -noupdate -expand -group {reset and clock} /cursor_tb/clock
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add wave -noupdate -expand -group {Buttons and sensors} /cursor_tb/restart
add wave -noupdate -expand -group {Buttons and sensors} /cursor_tb/go1
add wave -noupdate -expand -group {Buttons and sensors} /cursor_tb/go2
@ -11,23 +11,22 @@ add wave -noupdate -expand -group {Buttons and sensors} /cursor_tb/sensor2
add wave -noupdate -group Encoder /cursor_tb/encoderA
add wave -noupdate -group Encoder /cursor_tb/encoderB
add wave -noupdate -group Encoder /cursor_tb/encoderI
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/I_ctrl/current_state
add wave -noupdate -expand -group Internals -radix unsigned /cursor_tb/I_DUT/selectPosition
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/zeroSpeed
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/fullSpeed
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/rampEnable
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/endReached
add wave -noupdate -expand -group Internals -format Analog-Step -height 50 -max 255.0 -radix unsigned /cursor_tb/I_DUT/amplitude
add wave -noupdate -expand -group Internals -format Analog-Step -height 50 -max 14000.0 -radix unsigned /cursor_tb/I_DUT/position
add wave -noupdate -expand -group {Motor control} /cursor_tb/motorOn
add wave -noupdate -expand -group {Motor control} /cursor_tb/side1
add wave -noupdate -expand -group {Motor control} /cursor_tb/side2
add wave -noupdate -expand -group Internals -format Analog-Step -height 74 -max 255.0 /cursor_tb/I_DUT/Power
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/RaZ
add wave -noupdate -expand -group Internals /cursor_tb/I_DUT/button
add wave -noupdate -expand -group Internals -radix unsigned -childformat {{/cursor_tb/I_DUT/Position(15) -radix unsigned} {/cursor_tb/I_DUT/Position(14) -radix unsigned} {/cursor_tb/I_DUT/Position(13) -radix unsigned} {/cursor_tb/I_DUT/Position(12) -radix unsigned} {/cursor_tb/I_DUT/Position(11) -radix unsigned} {/cursor_tb/I_DUT/Position(10) -radix unsigned} {/cursor_tb/I_DUT/Position(9) -radix unsigned} {/cursor_tb/I_DUT/Position(8) -radix unsigned} {/cursor_tb/I_DUT/Position(7) -radix unsigned} {/cursor_tb/I_DUT/Position(6) -radix unsigned} {/cursor_tb/I_DUT/Position(5) -radix unsigned} {/cursor_tb/I_DUT/Position(4) -radix unsigned} {/cursor_tb/I_DUT/Position(3) -radix unsigned} {/cursor_tb/I_DUT/Position(2) -radix unsigned} {/cursor_tb/I_DUT/Position(1) -radix unsigned} {/cursor_tb/I_DUT/Position(0) -radix unsigned}} -subitemconfig {/cursor_tb/I_DUT/Position(15) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(14) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(13) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(12) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(11) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(10) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(9) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(8) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(7) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(6) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(5) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(4) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(3) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(2) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(1) {-height 15 -radix unsigned} /cursor_tb/I_DUT/Position(0) {-height 15 -radix unsigned}} /cursor_tb/I_DUT/Position
add wave -noupdate -group {Motor control} /cursor_tb/motorOn
add wave -noupdate -group {Motor control} /cursor_tb/side1
add wave -noupdate -group {Motor control} /cursor_tb/side2
add wave -noupdate /cursor_tb/I_DUT/testOut
add wave -noupdate /cursor_tb/I_DUT/I1/U_0/current_state
add wave -noupdate /cursor_tb/I_DUT/I4/current_state
add wave -noupdate -divider counter
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {18011924 ns} 0}
WaveRestoreCursors {{Cursor 1} {2727652488 ps} 0}
quietly wave cursor active 1
configure wave -namecolwidth 240
configure wave -valuecolwidth 71
configure wave -namecolwidth 320
configure wave -valuecolwidth 80
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
@ -40,4 +39,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ms
update
WaveRestoreZoom {0 ns} {21 ms}
WaveRestoreZoom {2727137385 ps} {2729700863 ps}

View File

View File

@ -1,266 +0,0 @@
Performing generation for single diagram...
Checking which design units need saving
Incrementally generating HDL...
.
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor_test\hdl\cursor_tb_struct.vhg
Generation completed successfully.
--------------------------------------------------------
Comparing HDL files with compiled files ...
Current working directory is C:/Users/remi/OneDrive/Documents/Cours/05-HEVS/S1fb/electricity/1-EIN/project/cursor/HDLdesigner/Cursor/Scripts
Executing data preparation plug-in for 10.7c
Performing compile...
Library Cursor_test
Model Technology ModelSim SE vmap 10.7c Lib Mapping Utility 2018.08 Aug 18 2018
vmap -c
Copying C:/eda/MentorGraphics/modelsim/win32/../modelsim.ini to modelsim.ini
Writing temporary output file "C:/Users/remi/AppData/Local/Temp/Files0".
Start time: 21:06:29 on Dec 20,2021
vcom -work Cursor_test -nologo -2008 -f C:/Users/remi/AppData/Local/Temp/Files0
-- Loading package STANDARD
-- Compiling entity cursor_tb
-- Loading package TEXTIO
-- Loading package std_logic_1164
-- Loading package NUMERIC_STD
** Error: C:/Users/remi/OneDrive/Documents/Cours/05-HEVS/S1fb/electricity/1-EIN/project/cursor/HDLdesigner/Cursor/Prefs/../Cursor_test/hdl/cursor_tb_struct.vhg(14): (vcom-1598) Library "cursor" not found.
** Note: C:/Users/remi/OneDrive/Documents/Cours/05-HEVS/S1fb/electricity/1-EIN/project/cursor/HDLdesigner/Cursor/Prefs/../Cursor_test/hdl/cursor_tb_struct.vhg(17): VHDL Compiler exiting
End time: 21:06:29 on Dec 20,2021, Elapsed time: 0:00:00
Errors: 1, Warnings: 0
child process exited abnormally
Failed during ModelSim compile - Error executing "C:/eda/MentorGraphics/modelsim/win32/vcom -work "Cursor_test" -nologo -2008 -f C:/Users/remi/AppData/Local/Temp/Files0"
Compiled 2 file(s) in 1 compiler invocation(s) with 2 failure(s)
Data preparation step completed, check transcript...
---------------------------------------------------------------------------------
Performing hierarchical generation through components...
Checking which design units need saving
Incrementally generating HDL...
.
Cursor/cursorCircuit
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cursorcircuit_entity.vhg
Cursor/Position
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\position_entity.vhg
Cursor/Encoder
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\encoder_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\encoder_encoder.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Cursor/Compteur
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\compteur_entity.vhg
Cursor/compteurUpDownRsyncAll
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\compteurupdownrsyncall_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\compteurupdownrsyncall_entity.vhg'.
"compteurupdownrsyncall_entity.vhg",line 24: Error, 'integer' requires 0 index values.
gates/bufferUlogic
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Gates\hdl\bufferulogic_entity.vhg
Cursor/cpt4bit
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt4bit_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt4bit_entity.vhg'.
"cpt4bit_entity.vhg",line 23: Error, 'integer' requires 0 index values.
Cursor/cpt1bit
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt1bit_entity.vhg
sequential/DFF
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Sequential\hdl\dff_entity.vhg
gates/xor2
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Gates\hdl\xor2_entity.vhg
gates/and2
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Gates\hdl\and2_entity.vhg
gates/inverter
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Gates\hdl\inverter_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt1bit_struct.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt4bit_struct.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt4bit_entity.vhg'.
"cpt4bit_entity.vhg",line 23: Error, 'integer' requires 0 index values.
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cpt4bit_struct.vhg'.
"cpt4bit_struct.vhg",line 19: Error, attempt to parse architecture body for 'cpt4bit' when a dependency has errors
or before parsing the entity declaration.
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\compteurupdownrsyncall_struct.vhg
Error: The block diagram interface is inconsistent with the interface on the parent block.
Use the Update Interface command.
gates/or2
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Gates\hdl\or2_entity.vhg
Cursor/convertissor_position
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\convertissor_position_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\convertissor_position_entity.vhg'.
"convertissor_position_entity.vhg",line 20: Error, 'integer' requires 0 index values.
Cursor/Button
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\button_entity.vhg
Cursor/button_position
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\button_position_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\button_position_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\button_button.vhg
Error: The block diagram interface is inconsistent with the interface on the parent block.
Use the Update Interface command.
Cannot have a slice/element when connected to a Port.
For input ports, please use the entire array with no slice/elements and rip a slice/element from this Signal.
For output ports, please use HDL text to assign the slice/element to an alternative output Signal.
The following port Signals have slices :
button4(3)
Error: Signal 'button4' connects to Signal 'button', this would produce invalid HDL.
Error: Signal 'dbus0' connects to Signal 'button', this would produce invalid HDL.
Cursor/Main
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\main_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\main_entity.vhg'.
"main_entity.vhg",line 25: Error, 'testlinenb' is not declared.
Cursor/move
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\move_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\move_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\move_fsm.vhg'.
"move_fsm.vhg",line 102: Error, type error at 'power_cruse'. Needed type 'std_ulogic_vector'.
"move_fsm.vhg",line 106: Error, type error at 'power_deceleration'. Needed type 'std_ulogic_vector'.
Cursor/set_position
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\set_position_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\set_position_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Cursor/process_cruse
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_cruse_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_cruse_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_cruse_fsm.vhg'.
"process_cruse_fsm.vhg",line 113: Error, cannot use a string literal in a scalar expression.
"process_cruse_fsm.vhg",line 117: Error, cannot use a string literal in a scalar expression.
"process_cruse_fsm.vhg",line 120: Error, cannot use a string literal in a scalar expression.
"process_cruse_fsm.vhg",line 124: Error, cannot use a string literal in a scalar expression.
Cursor/process_deceleration
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_deceleration_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_deceleration_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_deceleration_fsm.vhg'.
"process_deceleration_fsm.vhg",line 103: Error, cannot use a string literal in a scalar expression.
"process_deceleration_fsm.vhg",line 108: Error, cannot use a string literal in a scalar expression.
Cursor/selector_acceleration
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\selector_acceleration_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\selector_acceleration_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Cursor/selector_cruse
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\selector_cruse_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\selector_cruse_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Cursor/selector_deceleration
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\selector_deceleration_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\selector_deceleration_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Cursor/process_acceleration
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\process_acceleration_entity.vhg
Cursor/side_acceleration
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\side_acceleration_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\side_acceleration_entity.vhg'.
"side_acceleration_entity.vhg",line 15: Error, 'std_ulogic' requires 0 index values.
Cursor/enable_acceleration
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\enable_acceleration_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\enable_acceleration_entity.vhg'.
"enable_acceleration_entity.vhg",line 15: Error, 'std_ulogic' requires 0 index values.
Cursor/accelerator
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\accelerator_entity.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\accelerator_entity.vhg'.
"accelerator_entity.vhg",line 15: Error, 'std_ulogic' requires 0 index values.
Cursor/Driver
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\driver_entity.vhg
Cursor/Counter_Controller
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\counter_controller_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\counter_controller_fsm.vhg
Warning: Ignoring implicit loopback set on State 'reset_counter' with true condition leaving it.
Warning: Ignoring implicit loopback set on State 'add_start' with true condition leaving it.
Warning: Ignoring implicit loopback set on State 'waiting' with true condition leaving it.
Warning: Ignoring implicit loopback set on State 'add_end' with true condition leaving it.
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
sequential/counterEnableResetSync
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Sequential\hdl\counterenableresetsync_entity.vhg
gates/logic1
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Libs\Gates\hdl\logic1_entity.vhg
Cursor/Motor_side
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\motor_side_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\motor_side_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Cursor/PWM
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\pwm_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\pwm_fsm.vhg
Warning: Default values for one or more Combinatorial signals have not been specified in the Signals Table.
(Hint: A default value is required for all combinatorial signals (and the internal signals
generated for registered outputs) to avoid implied latches).
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\driver_drivert.vhg
-- Reading file 'C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\driver_drivert.vhg'.
"driver_drivert.vhg",line 132: Error, type error at 'countOut'. Needed type 'std_ulogic_vector'.
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor\hdl\cursorcircuit_studentversion.vhg
Error: The following component instances are out of date with respect to their symbol interface:-
I3, I2
Use Update Interface command to resolve differences.
Error: Signal 'reset' connects to Signal 'rst', this would produce invalid HDL.
Error: Signal 'clock' connects to Signal 'clk', this would produce invalid HDL.
Cursor_test/cursor_tester
Generating entity C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor_test\hdl\cursor_tester_entity.vhg
Generating architecture C:\Users\remi\OneDrive\Documents\Cours\05-HEVS\S1fb\electricity\1-EIN\project\cursor\HDLdesigner\Cursor\Prefs\..\Cursor_test\hdl\cursor_tb_struct.vhg
Generation completed with errors.
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