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148
Cursor_test/hdl/cursor_tester_test.vhd
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148
Cursor_test/hdl/cursor_tester_test.vhd
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ARCHITECTURE test OF cursor_tester IS
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constant clockFrequency: real := 66.0E6;
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constant clockPeriod: time := 1.0/clockFrequency * 1 sec;
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signal sClock: std_uLogic := '1';
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signal testMode_int: std_uLogic;
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constant buttonsPulseWidth : time := 100 us;
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constant pulsesPerTurn: integer := 2000;
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constant pwmReadBitNb: positive :=8;
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constant pwmLowpassAddBitNb: positive :=8;
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constant voltageToSpeedBitNb: positive := 8;
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signal side1Acc: unsigned(pwmReadBitNb+pwmLowpassAddBitNb-1 downto 0) := (others => '0');
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signal side2Acc: unsigned(pwmReadBitNb+pwmLowpassAddBitNb-1 downto 0) := (others => '0');
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signal side1M: unsigned(pwmReadBitNb-1 downto 0);
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signal side2M: unsigned(pwmReadBitNb-1 downto 0);
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signal position: signed(pwmReadBitNb+voltageToSpeedBitNb-1 downto 0) := (others => '0');
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signal stepCount: unsigned(1 downto 0);
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BEGIN
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------------------------------------------------------------------------------
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-- clock and reset
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--
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reset <= '1', '0' after 2*clockPeriod;
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sClock <= not sClock after clockPeriod/2;
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clock <= transport sClock after clockPeriod*9/10;
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------------------------------------------------------------------------------
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-- test sequence
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--
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process
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begin
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testMode_int <= '1';
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restart <= '0';
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go1 <= '0';
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go2 <= '0';
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button4 <= '0';
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sensor1 <= '0';
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sensor2 <= '0';
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wait for 0.1 ms;
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----------------------------------------------------------------------------
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-- restart
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restart <= '1', '0' after buttonsPulseWidth;
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wait for 0.25 ms;
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sensor1 <= '1', '0' after buttonsPulseWidth;
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wait for 0.25 ms;
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----------------------------------------------------------------------------
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-- advance to first stop point
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go1 <= '1', '0' after buttonsPulseWidth;
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wait for 2 ms;
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----------------------------------------------------------------------------
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-- advance to second stop point
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go2 <= '1', '0' after buttonsPulseWidth;
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wait for 2 ms;
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----------------------------------------------------------------------------
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-- go back to first stop point
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go1 <= '1', '0' after buttonsPulseWidth;
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wait for 2 ms;
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----------------------------------------------------------------------------
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-- back to start with sensor reset
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restart <= '1', '0' after buttonsPulseWidth;
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wait for 0.5 ms;
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sensor1 <= '1', '0' after buttonsPulseWidth;
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wait for 0.5 ms;
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----------------------------------------------------------------------------
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-- advance to second stop point
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go2 <= '1', '0' after buttonsPulseWidth;
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wait for 3 ms;
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----------------------------------------------------------------------------
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-- back to start with counter stop
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restart <= '1', '0' after buttonsPulseWidth;
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wait for 2 ms;
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sensor1 <= '1', '0' after buttonsPulseWidth;
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wait for 1 ms;
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----------------------------------------------------------------------------
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-- quit test mode
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testMode_int <= '0';
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----------------------------------------------------------------------------
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-- advance to first stop point
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go1 <= '1', '0' after buttonsPulseWidth;
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wait for 2 ms;
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wait;
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end process;
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testMode <= testMode_int;
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------------------------------------------------------------------------------
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-- PWM lowpass
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--
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process(sClock)
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begin
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if rising_edge(sClock) then
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if side1 = '1' then
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side1Acc <= side1Acc + 2**pwmReadBitNb-1 - shift_right(side1Acc, pwmLowpassAddBitNb);
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else
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side1Acc <= side1Acc - shift_right(side1Acc, pwmLowpassAddBitNb);
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end if;
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if side2 = '1' then
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side2Acc <= side2Acc + 2**pwmReadBitNb-1 - shift_right(side2Acc, pwmLowpassAddBitNb);
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else
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side2Acc <= side2Acc - shift_right(side2Acc, pwmLowpassAddBitNb);
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end if;
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end if;
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end process;
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side1M <= resize(shift_right(side1Acc, pwmLowpassAddBitNb), side1M'length);
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side2M <= resize(shift_right(side2Acc, pwmLowpassAddBitNb), side2M'length);
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------------------------------------------------------------------------------
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-- motor feedback
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--
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count: process (sClock)
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begin
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if motorOn = '1' then
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if testMode_int = '0' then
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position <= position + to_integer(side1M) - to_integer(side2M);
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else
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position <= position + (to_integer(side1M) - to_integer(side2M)) * 5;
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end if;
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end if;
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end process count;
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stepCount <= resize(shift_right(unsigned(position), position'length-stepCount'length), stepCount'length);
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encoderA <= stepCount(1);
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encoderB <= not stepCount(1) xor stepCount(0);
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encoderI <= '1' when stepCount = pulsesPerTurn-1 else '0';
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END ARCHITECTURE test;
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22
Cursor_test/hdl/divider_tester_test.vhd
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22
Cursor_test/hdl/divider_tester_test.vhd
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ARCHITECTURE test OF divider_tester IS
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constant clockFrequency: real := 66.0E6;
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constant clockPeriod: time := 1.0/clockFrequency * 1 sec;
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signal sClock: std_uLogic := '1';
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BEGIN
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reset <= '1', '0' after clockPeriod/4;
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sClock <= not sClock after clockPeriod/2;
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clock <= sClock after clockPeriod/10;
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testMode <= '1', '0' after 10000*clockPeriod;
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-- start <= '0',
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-- '1' after 210 us,
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-- '0' after 210 us + clockPeriod,
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-- '1' after 2.1 ms,
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-- '0' after 2.1 ms + clockPeriod;
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END ARCHITECTURE test;
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--
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-- Auto generated dummy architecture for leaf level instance.
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--
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ARCHITECTURE generatedInstance OF positionCounter_tester IS
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BEGIN
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END generatedInstance;
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