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Initial commit
This commit is contained in:
Rémi Heredero
159
Libs/Lcd/hdl/helloWorld_RTL.vhd
Normal file
159
Libs/Lcd/hdl/helloWorld_RTL.vhd
Normal file
@ -0,0 +1,159 @@
|
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library Common;
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use Common.CommonLib.all;
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ARCHITECTURE RTL OF helloWorld IS
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constant displaySequenceLength: positive := 97;
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type displayDataType is array (1 to displaySequenceLength+1)
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of natural;
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constant displayData: displayDataType :=(
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character'pos(can), -- cancel (clear display)
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character'pos(stx), -- start of text (pos 0,0)
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character'pos('H'), -- Line 1
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character'pos('E'),
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character'pos('S'),
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character'pos('-'),
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character'pos('S'),
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character'pos('O'),
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character'pos('/'),
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character'pos('/'),
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character'pos('V'),
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character'pos('a'),
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character'pos('l'),
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character'pos('a'),
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character'pos('i'),
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character'pos('s'),
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character'pos(' '),
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character'pos('W'),
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character'pos('a'),
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character'pos('l'),
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character'pos('l'),
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character'pos('i'),
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character'pos('s'),
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character'pos(' '),
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character'pos(cr),
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character'pos(lf),
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character'pos('-'), -- Line 2
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
|
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character'pos('-'),
|
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character'pos('-'),
|
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
|
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character'pos('-'),
|
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos('-'),
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character'pos(cr),
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character'pos(lf),
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character'pos('F'), -- Line 3
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character'pos('P'),
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character'pos('G'),
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character'pos('A'),
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character'pos('-'),
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character'pos('E'),
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character'pos('B'),
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character'pos('S'),
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character'pos(' '),
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character'pos('L'),
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character'pos('C'),
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character'pos('D'),
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character'pos('-'),
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character'pos('E'),
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character'pos('x'),
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character'pos('t'),
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character'pos('e'),
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character'pos('n'),
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character'pos('s'),
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character'pos('i'),
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character'pos('o'),
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character'pos('n'),
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character'pos(cr),
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character'pos(lf),
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character'pos('L'), -- Line 4
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character'pos('C'),
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character'pos('D'),
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character'pos(','),
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character'pos(' '),
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character'pos('4'),
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character'pos(' '),
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character'pos('B'),
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character'pos('u'),
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character'pos('t'),
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character'pos('t'),
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character'pos('o'),
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character'pos('n'),
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character'pos('s'),
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character'pos(','),
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character'pos(' '),
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character'pos('8'),
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character'pos(' '),
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character'pos('L'),
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character'pos('e'),
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character'pos('d'),
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character'pos('s'),
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character'pos(stx), -- start of text (pos 0,0)
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character'pos('-')
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);
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signal sequenceCounter: unsigned(requiredBitNb(displaySequenceLength+1)-1 downto 0);
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signal sequenceDone: std_ulogic;
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signal buttonDelayed, buttonRising: std_ulogic;
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BEGIN
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------------------------------------------------------------------------------
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-- find button push
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delayButton: process(reset, clock)
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begin
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if reset='1' then
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buttonDelayed <= '0';
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elsif rising_edge(clock) then
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buttonDelayed <= button;
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end if;
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end process delayButton;
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buttonRising <= '1' when (button = '1') and (buttonDelayed = '0')
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else '0';
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------------------------------------------------------------------------------
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-- display sequence counter
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countDisplaySequence: process(reset, clock)
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begin
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if reset='1' then
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sequenceCounter <= to_unsigned(1, sequenceCounter'length);
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elsif rising_edge(clock) then
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if (buttonRising = '1') and (sequenceDone = '1') then
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sequenceCounter <= to_unsigned(1, sequenceCounter'length);
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elsif busy = '0' then
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if sequenceDone = '0' then
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sequenceCounter <= sequenceCounter + 1;
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end if;
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end if;
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end if;
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end process countDisplaySequence;
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sequenceDone <= '1' when sequenceCounter > displaySequenceLength
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else '0';
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------------------------------------------------------------------------------
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-- output control
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ascii <= std_ulogic_vector(to_unsigned(
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displayData(to_integer(sequenceCounter)), ascii'length
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)) when (sequenceCounter > 0)
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else (others => '-');
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send <= not busy when sequenceDone = '0'
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else '0';
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END ARCHITECTURE RTL;
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213
Libs/Lcd/hdl/lcdCharacterEncoder_RTL.vhd
Normal file
213
Libs/Lcd/hdl/lcdCharacterEncoder_RTL.vhd
Normal file
@ -0,0 +1,213 @@
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library Common;
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use Common.CommonLib.all;
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ARCHITECTURE Encoder OF lcdCharacterEncoder IS
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constant lcdLineBitNb : positive := 6;
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constant lcdPageBitNb : positive := 4;
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constant lcdColumnBitNb : positive := 8;
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type fontDisplayStateType is (
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init, idle, readChar, displayColumns
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);
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signal fontDisplayState : fontDisplayStateType;
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signal asciiColumnCounter : unsigned(requiredBitNb(fontColumnNb)-1 downto 0);
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signal pixelOffset : unsigned(requiredBitNb(fontColumnNb*fontRowNb-1)-1 downto 0);
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signal pageCounter : unsigned(requiredBitNb(lcdPageNb)-1 downto 0);
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signal columnCounter : unsigned(requiredBitNb(lcdColumnNb)-1 downto 0);
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signal A0 : std_ulogic;
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signal pixelPage : std_ulogic_vector(fontRowNb-1 downto 0);
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signal pixelColumnHigh : std_ulogic_vector(fontRowNb-1 downto 0);
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signal pixelColumnLow : std_ulogic_vector(fontRowNb-1 downto 0);
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BEGIN
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------------------------------------------------------------------------------
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-- diplay FSM
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fontDisplaySequencer: process(reset, clock)
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begin
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if reset = '1' then
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fontDisplayState <= init;
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elsif rising_edge(clock) then
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case fontDisplayState is
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when init =>
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if lcdBusy = '0' then
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fontDisplayState <= idle;
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end if;
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when idle =>
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if asciiSend = '1' then
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fontDisplayState <= readChar;
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end if;
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when readChar =>
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fontDisplayState <= displayColumns;
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when displayColumns =>
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if (asciiColumnCounter = 0) and (lcdBusy = '0') then
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fontDisplayState <= idle;
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end if;
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end case;
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end if;
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end process fontDisplaySequencer;
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asciiBusy <= '0' when fontDisplayState = idle
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else '1';
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a0_proc: process(reset ,clock)
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begin
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if reset = '1' then
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A0 <= '0';
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elsif rising_edge(clock) then
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if asciiSend = '1' then
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if unsigned(asciiData) < 32 then
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A0 <= '0';
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else
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A0 <= '1';
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end if;
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end if;
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end if;
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end process a0_proc;
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------------------------------------------------------------------------------
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-- ascii column counter
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asciiCountColums: process(reset, clock)
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begin
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if reset = '1' then
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asciiColumnCounter <= (others => '0');
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elsif rising_edge(clock) then
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if asciiColumnCounter = 0 then
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if (fontDisplayState = idle) and (asciiSend = '1') then
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asciiColumnCounter <= asciiColumnCounter + 1;
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end if;
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else
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if (fontDisplayState = displayColumns) and (lcdBusy = '0') then
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if asciiColumnCounter < fontColumnNb then
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asciiColumnCounter <= asciiColumnCounter + 1;
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else
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asciiColumnCounter <= (others => '0');
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end if;
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end if;
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end if;
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end if;
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end process asciiCountColums;
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------------------------------------------------------------------------------
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-- page, column counter
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counter: process(reset, clock)
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begin
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if reset = '1' then
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pageCounter <= (others => '0');
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columnCounter <= (others => '0');
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clearDisplay <= '0';
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elsif rising_edge(clock) then
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clearDisplay <= '0';
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if asciiSend = '1' then
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case to_integer(unsigned(asciiData)) is
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when 2 => -- Start of text (home)
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pageCounter <= (others => '0');
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columnCounter <= (others => '0');
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when 3 => -- End of text (end)
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pageCounter <= to_unsigned(lcdPageNb - 1,pageCounter'length);
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columnCounter <= to_unsigned(lcdColumnNb - fontColumnNb, columnCounter'length);
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when 8 => -- BS (backspace) (column back)
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if (columnCounter - fontColumnNb) < 0 then
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columnCounter <= (others => '0');
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else
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columnCounter <= columnCounter - fontColumnNb;
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end if;
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when 10 => -- LF (linefeed) (next line)
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if pageCounter = (lcdPageNb-1) then
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pageCounter <= (others => '0');
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else
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pageCounter <= pageCounter + 1;
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end if;
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when 11 => -- Vertical Tab (prev line)
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if pageCounter = 0 then
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pageCounter <= to_unsigned(lcdPageNb - 1,pageCounter'length);
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else
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pageCounter <= pageCounter - 1;
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end if;
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when 13 => -- CR (carriage return) (coloumn back)
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columnCounter <= (others => '0');
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when 24 => -- CAN (cancel) (clear display)
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clearDisplay <= '1';
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when others =>
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if asciiData >= x"20" then -- normal ascii char
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columnCounter <= columnCounter + fontColumnNb;
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end if;
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end case;
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||||
end if;
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||||
end if;
|
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end process counter;
|
||||
|
||||
lcdSend <= '1' when
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(fontDisplayState = displayColumns) and
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(lcdBusy = '0') and
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(asciiColumnCounter > 0)
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else '0';
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||||
------------------------------------------------------------------------------
|
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-- Ram Data
|
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pixelOffset <= resize(
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||||
resize(fontColumnNb-asciiColumnCounter, pixelOffset'length)*fontRowNb,
|
||||
pixelOffset'length
|
||||
) when asciiColumnCounter > 0
|
||||
else (others => '0');
|
||||
pixelPage <=
|
||||
pixelData(
|
||||
to_integer(pixelOffset) + fontRowNb-1 downto
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||||
to_integer(pixelOffset) + lcdPageBitNb
|
||||
) &
|
||||
std_ulogic_vector(resize(pageCounter,lcdPageBitNb));
|
||||
pixelColumnHigh <=
|
||||
pixelData(
|
||||
to_integer(pixelOffset) + fontRowNb-1 downto
|
||||
to_integer(pixelOffset) + (lcdColumnBitNb/2)
|
||||
) &
|
||||
std_ulogic_vector(columnCounter(
|
||||
columnCounter'high downto (columnCounter'length/2)
|
||||
));
|
||||
pixelColumnLow <=
|
||||
pixelData(
|
||||
to_integer(pixelOffset) + fontRowNb-1 downto
|
||||
to_integer(pixelOffset) + (lcdColumnBitNb/2)
|
||||
) &
|
||||
std_ulogic_vector(columnCounter(
|
||||
(columnCounter'length/2)-1 downto columnCounter'low
|
||||
));
|
||||
|
||||
buildLcdData: process(
|
||||
A0, pixelData, pixelOffset,
|
||||
pixelPage, pixelColumnHigh, pixelColumnLow
|
||||
)
|
||||
begin
|
||||
lcdData(lcdData'high) <= A0;
|
||||
if A0 = '1' then
|
||||
lcdData(lcdData'high-1 downto 0) <= pixelData(
|
||||
to_integer(pixelOffset)+fontRowNb-1 downto to_integer(pixelOffset)
|
||||
);
|
||||
elsif pixelOffset >= 40 then
|
||||
lcdData(lcdData'high-1 downto 0) <= pixelData(
|
||||
to_integer(pixelOffset)+fontRowNb-1 downto to_integer(pixelOffset)
|
||||
);
|
||||
elsif pixelOffset >= 32 then
|
||||
lcdData(lcdData'high-1 downto 0) <= pixelPage;
|
||||
elsif pixelOffset >= 24 then
|
||||
lcdData(lcdData'high-1 downto 0) <= pixelColumnHigh;
|
||||
elsif pixelOffset >= 16 then
|
||||
lcdData(lcdData'high-1 downto 0) <= pixelColumnLow;
|
||||
else
|
||||
lcdData(lcdData'high-1 downto 0) <= pixelData(
|
||||
to_integer(pixelOffset)+fontRowNb-1 downto to_integer(pixelOffset)
|
||||
);
|
||||
end if;
|
||||
end process buildLcdData;
|
||||
--lcdData <= A0 & pixelData(to_integer(pixelOffset)+fontRowNb-1 downto to_integer(pixelOffset)) when (A0 = '1')
|
||||
-- else A0 & pixelData(to_integer(pixelOffset)+fontRowNb-1 downto to_integer(pixelOffset)) when (pixelOffset >= 40)
|
||||
-- else A0 & pixelPage when (pixelOffset >= 32)
|
||||
-- else A0 & pixelColumnHigh when (pixelOffset >= 24)
|
||||
-- else A0 & pixelColumnLow when (pixelOffset >= 16)
|
||||
-- else A0 & pixelData(to_integer(pixelOffset)+fontRowNb-1 downto to_integer(pixelOffset));
|
||||
|
||||
END ARCHITECTURE Encoder;
|
||||
105
Libs/Lcd/hdl/lcdInitializer_RTL.vhd
Normal file
105
Libs/Lcd/hdl/lcdInitializer_RTL.vhd
Normal file
@ -0,0 +1,105 @@
|
||||
library Common;
|
||||
use Common.CommonLib.all;
|
||||
|
||||
ARCHITECTURE RTL OF lcdInitializer IS
|
||||
|
||||
constant initializationSequenceLength: positive := 14;
|
||||
type initializationDataType is array (1 to initializationSequenceLength+1)
|
||||
of std_ulogic_vector(lcdData'range);
|
||||
constant initializationData: initializationDataType :=(
|
||||
'0' & X"40", -- Display start line 0
|
||||
'0' & X"A1", -- ADC reverse
|
||||
'0' & X"C0", -- Normal COM0~COM31
|
||||
'0' & X"A6", -- Display normal
|
||||
'0' & X"A2", -- Set bias 1/9 (Duty 1/33)
|
||||
'0' & X"2F", -- Booster, Regulator and Follower on
|
||||
'0' & X"F8", -- Set internal Booster to 3x / 4x
|
||||
'0' & X"00", --
|
||||
'0' & X"23", -- Contrast set
|
||||
'0' & X"81", --
|
||||
'0' & X"1F", --
|
||||
'0' & X"AC", -- No indicator
|
||||
'0' & X"00", --
|
||||
'0' & X"AF", -- Display on
|
||||
std_ulogic_vector(to_unsigned(0, lcdData'length))
|
||||
);
|
||||
|
||||
constant clearDisplaySequenceLength : positive := 566;--(3+132)*4 + 3; -- (3 commands + 132 columns) * 4 pages + jump back to start
|
||||
constant clearDisplayDataLength : positive := 6;
|
||||
type clearDisplayDataType is array (1 to clearDisplayDataLength+1)
|
||||
of std_ulogic_vector(lcdData'range);
|
||||
constant clearDisplayData: clearDisplayDataType :=(
|
||||
-- ind seq
|
||||
'0' & X"B0", -- 1 Page 0
|
||||
'0' & X"B1", -- 2 Page 1
|
||||
'0' & X"B2", -- 3 Page 2
|
||||
'0' & X"B3", -- 4 Page 3
|
||||
'0' & X"10", -- 5 Column MSB 0
|
||||
'0' & X"00", -- 6 Column LSB 0
|
||||
'1' & X"00" -- 7 Data "empty"
|
||||
);
|
||||
|
||||
signal initSequenceCounter: unsigned(requiredBitNb(initializationSequenceLength+1)-1 downto 0);
|
||||
signal initSequenceDone: std_ulogic;
|
||||
signal clearSequenceCounter: unsigned(requiredBitNb(clearDisplaySequenceLength+1)-1 downto 0);
|
||||
signal clearSequenceDone: std_ulogic;
|
||||
|
||||
BEGIN
|
||||
------------------------------------------------------------------------------
|
||||
-- initialization sequence counter
|
||||
buildInitSequence: process(reset, clock)
|
||||
begin
|
||||
if reset='1' then
|
||||
initSequenceCounter <= to_unsigned(1, initSequenceCounter'length);
|
||||
elsif rising_edge(clock) then
|
||||
if lcdBusy = '0' then
|
||||
if initSequenceDone = '0' then
|
||||
initSequenceCounter <= initSequenceCounter + 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process buildInitSequence;
|
||||
|
||||
initSequenceDone <= '1' when initSequenceCounter > initializationSequenceLength
|
||||
else '0';
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- clear sequence counter
|
||||
buildClearSequence: process(reset, clock)
|
||||
begin
|
||||
if reset='1' then
|
||||
clearSequenceCounter <= to_unsigned(clearDisplaySequenceLength+1, clearSequenceCounter'length);
|
||||
elsif rising_edge(clock) then
|
||||
if lcdBusy = '0' then
|
||||
if clearDisplay = '1' and initSequenceDone = '1' then
|
||||
clearSequenceCounter <= to_unsigned(1, clearSequenceCounter'length);
|
||||
elsif clearSequenceDone = '0' then
|
||||
clearSequenceCounter <= clearSequenceCounter + 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process buildClearSequence;
|
||||
|
||||
clearSequenceDone <= '1' when clearSequenceCounter > clearDisplaySequenceLength
|
||||
else '0';
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- data multiplexer
|
||||
lcdData <= columnData when (initSequenceDone = '1' and clearSequenceDone = '1')
|
||||
else initializationData(to_integer(initSequenceCounter)) when (initSequenceCounter > 0 and initSequenceDone = '0')
|
||||
else clearDisplayData(1) when (clearSequenceCounter = 1 or clearSequenceCounter = 564)
|
||||
else clearDisplayData(2) when (clearSequenceCounter = 137)
|
||||
else clearDisplayData(3) when (clearSequenceCounter = 273)
|
||||
else clearDisplayData(4) when (clearSequenceCounter = 409)
|
||||
else clearDisplayData(5) when (clearSequenceCounter = 2 or clearSequenceCounter = 138 or clearSequenceCounter = 274 or clearSequenceCounter = 410 or clearSequenceCounter = 565)
|
||||
else clearDisplayData(6) when (clearSequenceCounter = 3 or clearSequenceCounter = 139 or clearSequenceCounter = 275 or clearSequenceCounter = 411 or clearSequenceCounter = 566)
|
||||
else clearDisplayData(7);
|
||||
|
||||
lcdSend <= columnSend when initSequenceDone = '1' and clearSequenceDone = '1'
|
||||
else not lcdBusy when initSequenceCounter <= initializationSequenceLength
|
||||
else not lcdBusy when clearSequenceCounter <= clearDisplaySequenceLength
|
||||
else '0';
|
||||
columnBusy <= lcdBusy when initSequenceDone = '1' and clearSequenceDone = '1'
|
||||
else '1';
|
||||
|
||||
END ARCHITECTURE RTL;
|
||||
143
Libs/Lcd/hdl/lcdSerializer_RTL.vhd
Normal file
143
Libs/Lcd/hdl/lcdSerializer_RTL.vhd
Normal file
@ -0,0 +1,143 @@
|
||||
library Common;
|
||||
use Common.CommonLib.all;
|
||||
|
||||
ARCHITECTURE RTL OF lcdSerializer IS
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- The clock-pulse rate of the SCL line can be up to 20 MHz @3.3V
|
||||
-- The clock frequency is divided by generic value "baudRateDivide"
|
||||
-- The corresponding "sclEn" is further divided by 2 to generate SCL
|
||||
--
|
||||
signal sclCounter: unsigned(requiredBitNb(baudRateDivide-1)-1 downto 0);
|
||||
signal sclEn: std_ulogic;
|
||||
signal scl_int: std_ulogic;
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- The minimal reset pulse width is 1 us
|
||||
-- "sclEn" at 40 MHz has to be divided by 40 to generate the 1 us delay
|
||||
--
|
||||
constant resetCount : natural := 40;
|
||||
signal resetCounter: unsigned(requiredBitNb(2*resetCount-1)-1 downto 0);
|
||||
signal resetDone: std_ulogic;
|
||||
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- Serial data bits have to be stable at the rising edge of SCL
|
||||
-- Data bits will be updated at the falling edge of SCL
|
||||
--
|
||||
-- Data in comprises 9 bits: A0 (as MSB) and 8 row pixels or command bits
|
||||
-- A0 selects between command data (A0 = 0) and pixel data (A0 = 1)
|
||||
--
|
||||
constant pixelsPerColumn : positive := data'length-1;
|
||||
signal dataSampled : std_ulogic_vector(data'range);
|
||||
signal chipSelect : std_ulogic;
|
||||
signal updateData: std_ulogic;
|
||||
signal dataCounter: unsigned(requiredBitNb(pixelsPerColumn+1)-1 downto 0);
|
||||
|
||||
BEGIN
|
||||
------------------------------------------------------------------------------
|
||||
-- clock divider for SCL
|
||||
divideClock: process(reset, clock)
|
||||
begin
|
||||
if reset='1' then
|
||||
scl_int <= '0';
|
||||
sclCounter <= (others => '0');
|
||||
elsif rising_edge(clock) then
|
||||
if sclEn = '1' then
|
||||
sclCounter <= (others => '0');
|
||||
scl_int <= not scl_int;
|
||||
else
|
||||
sclCounter <= sclCounter + 1;
|
||||
end if;
|
||||
end if;
|
||||
end process divideClock;
|
||||
|
||||
sclEn <= '1' when sclCounter = baudRateDivide-1
|
||||
else '0';
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- LCD reset
|
||||
process(clock,reset)
|
||||
variable i : natural;
|
||||
begin
|
||||
if reset = '1' then
|
||||
resetCounter <= (others => '0');
|
||||
elsif rising_edge(clock) then
|
||||
if sclEn = '1' then
|
||||
if resetDone = '0' then
|
||||
resetCounter <= resetCounter + 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
resetDone <= '1' when resetCounter >= 2*resetCount-1
|
||||
else '0';
|
||||
RST_n <= '1' when resetCounter >= resetCount-1
|
||||
else '0';
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- sample input data
|
||||
process (reset, clock)
|
||||
begin
|
||||
if reset = '1' then
|
||||
dataSampled <= (others => '0');
|
||||
elsif rising_edge(clock) then
|
||||
if send = '1' then
|
||||
dataSampled <= data;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- A0
|
||||
A0 <= dataSampled(data'high);
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
-- serialize data
|
||||
updateData <= sclEn and scl_int;
|
||||
|
||||
process (reset, clock)
|
||||
begin
|
||||
if reset = '1' then
|
||||
dataCounter <= (others => '0');
|
||||
elsif rising_edge(clock) then
|
||||
if resetDone = '1' then
|
||||
if dataCounter = 0 then
|
||||
if send = '1' then
|
||||
dataCounter <= to_unsigned(pixelsPerColumn+1, dataCounter'length);
|
||||
end if;
|
||||
else
|
||||
if updateData = '1' then
|
||||
dataCounter <= dataCounter - 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
busy <= '1' when (resetDone = '0') or (dataCounter > 0)
|
||||
else '0';
|
||||
chipSelect <= '1' when (dataCounter > 0) and (dataCounter < pixelsPerColumn+1)
|
||||
else '0';
|
||||
|
||||
sampleData: process (reset, clock)
|
||||
begin
|
||||
if reset = '1' then
|
||||
CS_n <= '1';
|
||||
SCL <= '1';
|
||||
SI <= '1';
|
||||
elsif rising_edge(clock) then
|
||||
if chipSelect = '1' then
|
||||
CS_n <= '0';
|
||||
SCL <= scl_int or not(chipSelect);
|
||||
SI <= dataSampled(to_integer(dataCounter-1));
|
||||
else
|
||||
CS_n <= '1';
|
||||
SCL <= '1';
|
||||
SI <= '1';
|
||||
end if;
|
||||
end if;
|
||||
end process sampleData;
|
||||
|
||||
END ARCHITECTURE RTL;
|
||||
Reference in New Issue
Block a user