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Klagarge 712b2cabb6 finish exam

2024-03-22 14:59:59 +01:00

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concatenate_hdl.tsk

Initial commit

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designchecker_flow.tsk

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designchecker.tsk

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generate.tsk

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modelsim_compile.tsk

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modelsim_flow.tsk

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modelsim_simulate.tsk

finish exam

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quartus_prime_import.tsk

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quartus_synthesis_flow.tsk

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quartus_synthesis_invoke.tsk

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quartus_synthesis_prepare_data.tsk

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quartus_synthesis.tsk

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register_assistant.tsk

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svassistant_flow.tsk

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synthesis_flow.tsk

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trim_libraries.tsk

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xilinx_project_navigator.tsk

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xilinx_vivado_flow.tsk

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