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SEm-ExamMidterm2024/Prefs/hds_user/v2005.1/tasks
2024-03-22 13:16:48 +01:00
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altera_sopc_builder.tsk Initial commit 2024-03-22 13:16:48 +01:00
designanalyst_flow.tsk Initial commit 2024-03-22 13:16:48 +01:00
designwave_hdl_generator.tsk Initial commit 2024-03-22 13:16:48 +01:00
designwave_invoke.tsk Initial commit 2024-03-22 13:16:48 +01:00
fpga_library_compile.tsk Initial commit 2024-03-22 13:16:48 +01:00
fpga_technology_setup.tsk Initial commit 2024-03-22 13:16:48 +01:00
generate.tsk Initial commit 2024-03-22 13:16:48 +01:00
i_o_design_flow.tsk Initial commit 2024-03-22 13:16:48 +01:00
migrated_simulation_flow.tsk Initial commit 2024-03-22 13:16:48 +01:00
migrated_synthesis_flow.tsk Initial commit 2024-03-22 13:16:48 +01:00
quartus_place_and_route.tsk Initial commit 2024-03-22 13:16:48 +01:00
quartus_qis_flow.tsk Initial commit 2024-03-22 13:16:48 +01:00
quartus_qis.tsk Initial commit 2024-03-22 13:16:48 +01:00
xilinx_place_and_route.tsk Initial commit 2024-03-22 13:16:48 +01:00
xilinx_platform_studio.tsk Initial commit 2024-03-22 13:16:48 +01:00
xilinx_synthesis_tool_flow.tsk Initial commit 2024-03-22 13:16:48 +01:00
xilinx_synthesis_tool.tsk Initial commit 2024-03-22 13:16:48 +01:00