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start gpio

This commit is contained in:
2024-04-17 14:20:36 +02:00
parent 8a64f5c04b
commit 1b569b2b42
23 changed files with 7609 additions and 222 deletions

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@ -17,17 +17,46 @@
-- Read registers
-- 00, data register provides the values detected on the lines.
--
signal addresses is unsigned(32 downto 0);
signal bRead is std_ulogic;
signal bWrite is std_ulogic;
ARCHITECTURE studentVersion OF ahbGpio IS
BEGIN
process(hReset_n, hClk) begin
if hReset_n = '1' then
-- AHB-Lite
hRData <= (OTHERS => '0');
hReady <= '0';
hResp <= '0';
-- Out
ioOut <= (OTHERS => '0');
ioEn <= (OTHERS => '0');
addresses <= (OTHERS => '0');
bRead <= '0';
bWrite <= '1';
elsif rising_edge(hClk) then
if hSel = '1' then
CASE hAddr is
WHEN 00 =>
WHEN 01 =>
WHEN OTHERS
end CASE;
end if;
end if;
end process;
-- AHB-Lite
hRData <= (OTHERS => '0');
hReady <= '0';
hResp <= '0';
-- hRData <= (OTHERS => '0');
-- hReady <= '0';
-- hResp <= '0';
-- Out
ioOut <= (OTHERS => '0');
ioEn <= (OTHERS => '0');
-- ioOut <= (OTHERS => '0');
-- ioEn <= (OTHERS => '0');
END ARCHITECTURE studentVersion;

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-- VHDL Entity AhbLiteComponents.ahbGpio.symbol
--
-- Created:
-- by - remi.heredero.UNKNOWN (WE2330808)
-- at - 15:08:33 23.02.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY AhbLite;
USE AhbLite.ahbLite.all;
ENTITY ahbGpio IS
GENERIC(
ioNb : positive := 8
);
PORT(
hAddr : IN unsigned ( ahbAddressBitNb-1 DOWNTO 0 );
hClk : IN std_uLogic;
hReset_n : IN std_uLogic;
hSel : IN std_uLogic;
hTrans : IN std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0);
hWData : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
hWrite : IN std_uLogic;
ioIn : IN std_ulogic_vector (ioNb-1 DOWNTO 0);
hRData : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
hReady : OUT std_uLogic;
hResp : OUT std_uLogic;
ioEn : OUT std_ulogic_vector (ioNb-1 DOWNTO 0);
ioOut : OUT std_ulogic_vector (ioNb-1 DOWNTO 0)
);
-- Declarations
END ahbGpio ;