start gpio

06-07-08-09-SystemOnChip/AhbLiteComponents/hdl/ahbGpio_studentVersion.vhd

@@ -17,9 +17,15 @@
 -- Read registers
 -- 00, data register provides the values detected on the lines.
 --
+signal addresses is unsigned(32 downto 0);
+signal bRead is std_ulogic;
+signal bWrite is std_ulogic;
+
 ARCHITECTURE studentVersion OF ahbGpio IS
 BEGIN
 
+  process(hReset_n, hClk) begin
+    if hReset_n = '1' then
       -- AHB-Lite
       hRData  <=  (OTHERS => '0');
       hReady  <=  '0';  
@@ -29,5 +35,28 @@ BEGIN
       ioOut <= (OTHERS => '0');
       ioEn  <= (OTHERS => '0');
 
+      addresses  <=  (OTHERS => '0');
+      bRead <= '0';
+      bWrite <= '1';
+    elsif rising_edge(hClk) then
+      if hSel = '1' then
+        CASE hAddr is
+          WHEN 00 =>
+          WHEN 01 =>
+          WHEN OTHERS
+        end CASE;
+      end if;
+    end if;
+  end process;
+
+  -- AHB-Lite
+--  hRData  <=	(OTHERS => '0');
+--  hReady  <=	'0';	
+--  hResp	  <=	'0';	
+
+  -- Out
+--  ioOut <= (OTHERS => '0');
+--  ioEn  <= (OTHERS => '0');
+
 END ARCHITECTURE studentVersion;
 

06-07-08-09-SystemOnChip/AhbLiteComponents/hdl/ahbgpio_entity.vhg

@@ -0,0 +1,38 @@
+-- VHDL Entity AhbLiteComponents.ahbGpio.symbol
+--
+-- Created:
+--          by - remi.heredero.UNKNOWN (WE2330808)
+--          at - 15:08:33 23.02.2024
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+LIBRARY ieee;
+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+LIBRARY AhbLite;
+  USE AhbLite.ahbLite.all;
+
+ENTITY ahbGpio IS
+    GENERIC( 
+        ioNb : positive := 8
+    );
+    PORT( 
+        hAddr    : IN     unsigned ( ahbAddressBitNb-1 DOWNTO 0 );
+        hClk     : IN     std_uLogic;
+        hReset_n : IN     std_uLogic;
+        hSel     : IN     std_uLogic;
+        hTrans   : IN     std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0);
+        hWData   : IN     std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hWrite   : IN     std_uLogic;
+        ioIn     : IN     std_ulogic_vector (ioNb-1 DOWNTO 0);
+        hRData   : OUT    std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hReady   : OUT    std_uLogic;
+        hResp    : OUT    std_uLogic;
+        ioEn     : OUT    std_ulogic_vector (ioNb-1 DOWNTO 0);
+        ioOut    : OUT    std_ulogic_vector (ioNb-1 DOWNTO 0)
+    );
+
+-- Declarations
+
+END ahbGpio ;
+

06-07-08-09-SystemOnChip/AhbLiteComponents/hds/.xrf/ahbgpio_entity.xrf

@@ -0,0 +1,54 @@
+DESIGN ahb@gpio
+VIEW symbol.sb
+NO_GRAPHIC 0
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 104,0 8 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 13,0 15 1 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2452,0 19 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2514,0 20 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2519,0 21 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2692,0 22 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2494,0 23 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2464,0 24 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2474,0 25 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2839,0 26 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2469,0 27 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2504,0 28 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2509,0 29 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2846,0 30 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2651,0 31 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 1,0 34 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 1,0 35 0 

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hdl/ahbgpio_tb_entity.vhg

@@ -0,0 +1,15 @@
+-- VHDL Entity AhbLiteComponents_test.ahbGpio_tb.symbol
+--
+-- Created:
+--          by - axel.amand.UNKNOWN (WE7860)
+--          at - 14:51:39 28.04.2023
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+
+
+ENTITY ahbGpio_tb IS
+-- Declarations
+
+END ahbGpio_tb ;
+

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hdl/ahbgpio_tb_struct.vhg

@@ -0,0 +1,148 @@
+--
+-- VHDL Architecture AhbLiteComponents_test.ahbGpio_tb.struct
+--
+-- Created:
+--          by - axel.amand.UNKNOWN (WE7860)
+--          at - 15:06:49 28.04.2023
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+LIBRARY ieee;
+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+LIBRARY AhbLite;
+  USE AhbLite.ahbLite.all;
+
+LIBRARY AhbLiteComponents;
+LIBRARY AhbLiteComponents_test;
+
+ARCHITECTURE struct OF ahbGpio_tb IS
+
+    -- Architecture declarations
+    constant ioNb: positive := 8;
+    
+    constant clockFrequency : real := 60.0E6;
+    --constant clockFrequency : real := 66.0E6;
+
+    -- Internal signal declarations
+    SIGNAL hAddr    : unsigned( ahbAddressBitNb-1 DOWNTO 0 );
+    SIGNAL hClk     : std_uLogic;
+    SIGNAL hRData   : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0);
+    SIGNAL hReady   : std_uLogic;
+    SIGNAL hReset_n : std_uLogic;
+    SIGNAL hResp    : std_uLogic;
+    SIGNAL hSel     : std_uLogic;
+    SIGNAL hTrans   : std_ulogic_vector(ahbTransBitNb-1 DOWNTO 0);
+    SIGNAL hWData   : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0);
+    SIGNAL hWrite   : std_uLogic;
+    SIGNAL io       : std_logic_vector(ioNb-1 DOWNTO 0);
+    SIGNAL ioEn     : std_ulogic_vector(ioNb-1 DOWNTO 0);
+    SIGNAL ioIn     : std_ulogic_vector(ioNb-1 DOWNTO 0);
+    SIGNAL ioOut    : std_ulogic_vector(ioNb-1 DOWNTO 0);
+
+
+    -- Component Declarations
+    COMPONENT ahbGpio
+    GENERIC (
+        ioNb : positive := 8
+    );
+    PORT (
+        hAddr    : IN     unsigned ( ahbAddressBitNb-1 DOWNTO 0 );
+        hClk     : IN     std_uLogic ;
+        hReset_n : IN     std_uLogic ;
+        hSel     : IN     std_uLogic ;
+        hTrans   : IN     std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0);
+        hWData   : IN     std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hWrite   : IN     std_uLogic ;
+        ioIn     : IN     std_ulogic_vector (ioNb-1 DOWNTO 0);
+        hRData   : OUT    std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hReady   : OUT    std_uLogic ;
+        hResp    : OUT    std_uLogic ;
+        ioEn     : OUT    std_ulogic_vector (ioNb-1 DOWNTO 0);
+        ioOut    : OUT    std_ulogic_vector (ioNb-1 DOWNTO 0)
+    );
+    END COMPONENT;
+    COMPONENT ahbGpio_tester
+    GENERIC (
+        ioNb           : positive;
+        clockFrequency : real
+    );
+    PORT (
+        hRData   : IN     std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hReady   : IN     std_uLogic ;
+        hResp    : IN     std_uLogic ;
+        hAddr    : OUT    unsigned ( ahbAddressBitNb-1 DOWNTO 0 );
+        hClk     : OUT    std_uLogic ;
+        hReset_n : OUT    std_uLogic ;
+        hSel     : OUT    std_uLogic ;
+        hTrans   : OUT    std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0);
+        hWData   : OUT    std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hWrite   : OUT    std_uLogic ;
+        io       : INOUT  std_logic_vector (ioNb-1 DOWNTO 0)
+    );
+    END COMPONENT;
+
+    -- Optional embedded configurations
+    -- pragma synthesis_off
+    FOR ALL : ahbGpio USE ENTITY AhbLiteComponents.ahbGpio;
+    FOR ALL : ahbGpio_tester USE ENTITY AhbLiteComponents_test.ahbGpio_tester;
+    -- pragma synthesis_on
+
+
+BEGIN
+    -- Architecture concurrent statements
+    -- HDL Embedded Text Block 1 eb1
+    tristate: process(ioEn, ioOut)
+    begin
+      for index in io'range loop
+        if ioEn(index) = '1' then
+          io(index) <= ioOut(index);
+        else
+          io(index) <= 'Z';
+        end if;
+      end loop;
+    end process tristate;
+    
+    ioIn <= std_ulogic_vector(io);
+
+
+    -- Instance port mappings.
+    I_DUT : ahbGpio
+        GENERIC MAP (
+            ioNb => ioNb
+        )
+        PORT MAP (
+            hAddr    => hAddr,
+            hClk     => hClk,
+            hReset_n => hReset_n,
+            hSel     => hSel,
+            hTrans   => hTrans,
+            hWData   => hWData,
+            hWrite   => hWrite,
+            ioIn     => ioIn,
+            hRData   => hRData,
+            hReady   => hReady,
+            hResp    => hResp,
+            ioEn     => ioEn,
+            ioOut    => ioOut
+        );
+    I_tester : ahbGpio_tester
+        GENERIC MAP (
+            ioNb           => ioNb,
+            clockFrequency => clockFrequency
+        )
+        PORT MAP (
+            hRData   => hRData,
+            hReady   => hReady,
+            hResp    => hResp,
+            hAddr    => hAddr,
+            hClk     => hClk,
+            hReset_n => hReset_n,
+            hSel     => hSel,
+            hTrans   => hTrans,
+            hWData   => hWData,
+            hWrite   => hWrite,
+            io       => io
+        );
+
+END struct;

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hdl/ahbgpio_tester_entity.vhg

@@ -0,0 +1,37 @@
+-- VHDL Entity AhbLiteComponents_test.ahbGpio_tester.interface
+--
+-- Created:
+--          by - axel.amand.UNKNOWN (WE7860)
+--          at - 14:51:40 28.04.2023
+--
+-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
+--
+LIBRARY ieee;
+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+LIBRARY AhbLite;
+  USE AhbLite.ahbLite.all;
+
+ENTITY ahbGpio_tester IS
+    GENERIC( 
+        ioNb           : positive;
+        clockFrequency : real
+    );
+    PORT( 
+        hRData   : IN     std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hReady   : IN     std_uLogic;
+        hResp    : IN     std_uLogic;
+        hAddr    : OUT    unsigned ( ahbAddressBitNb-1 DOWNTO 0 );
+        hClk     : OUT    std_uLogic;
+        hReset_n : OUT    std_uLogic;
+        hSel     : OUT    std_uLogic;
+        hTrans   : OUT    std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0);
+        hWData   : OUT    std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
+        hWrite   : OUT    std_uLogic;
+        io       : INOUT  std_logic_vector (ioNb-1 DOWNTO 0)
+    );
+
+-- Declarations
+
+END ahbGpio_tester ;
+

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hds/.hdlsidedata/_ahbgpio_tb_entity.vhg._fpf

@@ -1 +1 @@
-DIALECT atom VHDL_ANY
+DIALECT atom VHDL_2008

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hds/.hdlsidedata/_ahbgpio_tb_struct.vhg._fpf

@@ -1 +1 @@
-DIALECT atom VHDL_ANY
+DIALECT atom VHDL_2008

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hds/.xrf/ahbgpio_tb_entity.xrf

@@ -0,0 +1,12 @@
+DESIGN ahb@gpio_tb
+VIEW symbol.sb
+NO_GRAPHIC 0
+DESIGN ahb@gpio_tb
+VIEW symbol.sb
+GRAPHIC 53,0 8 0 
+DESIGN ahb@gpio_tb
+VIEW symbol.sb
+GRAPHIC 1,0 11 0 
+DESIGN ahb@gpio_tb
+VIEW symbol.sb
+GRAPHIC 1,0 12 0 

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hds/.xrf/ahbgpio_tb_struct.xrf

@@ -0,0 +1,228 @@
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 0
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 187,0 9 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 14
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 0,0 18 2 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 1,0 21 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 21
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12627,0 27 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12563,0 28 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12587,0 29 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12579,0 30 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12555,0 31 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12571,0 32 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12595,0 33 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12611,0 34 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12619,0 35 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12603,0 36 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13244,0 37 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13210,0 38 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13226,0 39 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13218,0 40 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 41
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 42
+LIBRARY AhbLiteComponents
+DESIGN ahb@gpio
+VIEW student@version
+GRAPHIC 13194,0 44 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 14,0 45 1 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2452,0 49 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2514,0 50 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2519,0 51 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2692,0 52 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2494,0 53 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2464,0 54 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2474,0 55 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2839,0 56 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2469,0 57 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2504,0 58 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2509,0 59 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2846,0 60 0 
+DESIGN ahb@gpio
+VIEW symbol.sb
+GRAPHIC 2651,0 61 0 
+LIBRARY AhbLiteComponents_test
+DESIGN ahb@gpio_tester
+VIEW test
+GRAPHIC 12657,0 64 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 14,0 65 1 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12589,0 70 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12581,0 71 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12573,0 72 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12629,0 73 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12565,0 74 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12557,0 75 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12597,0 76 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12613,0 77 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12621,0 78 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12605,0 79 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13236,0 80 0 
+LIBRARY AhbLiteComponents_test
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 83
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13194,0 86 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12657,0 87 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 90
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13204,0 93 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 106
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 107
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13194,0 109 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13201,0 110 1 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12629,0 114 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12565,0 115 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12557,0 116 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12597,0 117 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12613,0 118 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12621,0 119 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12605,0 120 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13228,0 121 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12589,0 122 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12581,0 123 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12573,0 124 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13212,0 125 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 13220,0 126 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12657,0 128 0 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+GRAPHIC 12664,0 129 1 
+DESIGN ahb@gpio_tb
+VIEW struct.bd
+NO_GRAPHIC 147

06-07-08-09-SystemOnChip/AhbLiteComponents_test/hds/.xrf/ahbgpio_tester_entity.xrf

@@ -0,0 +1,48 @@
+DESIGN ahb@gpio_tester
+VIEW interface
+NO_GRAPHIC 0
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 50,0 8 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 13,0 15 1 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 668,0 20 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 673,0 21 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 683,0 22 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 658,0 23 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 663,0 24 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 678,0 25 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 688,0 26 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 693,0 27 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 698,0 28 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 703,0 29 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 708,0 30 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 1,0 33 0 
+DESIGN ahb@gpio_tester
+VIEW interface
+GRAPHIC 1,0 34 0 

06-07-08-09-SystemOnChip/Prefs/hds_team/v2019.2/hds_team_prefs.bak

@@ -0,0 +1,55 @@
+version "8.0"
+RenoirTeamPreferences [
+(BaseTeamPreferences
+version "1.1"
+verConcat 0
+ttDGProps [
+]
+fcDGProps [
+]
+smDGProps [
+]
+asmDGProps [
+]
+bdDGProps [
+]
+syDGProps [
+]
+)
+(VersionControlTeamPreferences
+version "1.1"
+VMPlugin ""
+VMRepository "$HDS_HOME/examples/hds_scratch/hds_repository"
+VMRcsHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/%(library)/hds_vm"
+VMRcsHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository/%(library)/hdl_vm"
+VMCvsHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hds_vm"
+VMCvsHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hdl_vm"
+VMCVSmkIIHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hds_vm"
+VMCVSmkIIHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository"
+VMVssHdsRepository "$/hds_scratch/hds_repository/%(library)/hds_vm"
+VMVssHdlRepository "$/hds_scratch/hds_repository/%(library)/hdl_vm"
+VMDsHdsRepository "sync://<host_name>:<port>/hds_scratch/hds_repository/hds_vm"
+VMDsHdlRepository "sync://<host_name>:<port>/hds_scratch/hds_repository/hdl_vm"
+VMPvcsHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hds_vm"
+VMPvcsHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hdl_vm"
+VMSvnHdlRepository ""
+VMDefaultView 1
+VMCurrentDesignHierarchyOnly 0
+VMUserData 1
+VMGeneratedHDL 0
+VMVerboseMode 0
+VMAlwaysEmpty 0
+VMSetTZ 1
+VMSymbol 1
+VMCurrentDesignHierarchy 0
+VMMultipleRepositoryMode 0
+VMSnapshotViewMode 0
+backupNameClashes 1
+clearCaseMaster 0
+)
+(CustomizeTeamPreferences
+version "1.1"
+FileTypes [
+]
+)
+]

06-07-08-09-SystemOnChip/Prefs/hds_user/v2019.2/hds_user_prefs

@@ -1280,6 +1280,7 @@ projectPaths [
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 "C:\\work\\edu\\sem\\labo\\sem_labs\\06-07-08-09-SystemOnChip\\Prefs\\hds.hdp"
 "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\hds.hdp"
+"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\06-07-08-09-SystemOnChip\\Prefs\\hds.hdp"
 ]
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 teamLibMappingsRootDir ""
@@ -1300,288 +1301,144 @@ exportedDirectories [
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 exportStdPackageRefs 1
 )
-printerName "\\\\vmenpprint1.hevs.ch\\VS-FOLLOWME-PRN"
+printerName "\\\\vmenpprint1\\VS-ENP.23.N308-PRN"
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-height 1658
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-)
-(PageSizeInfo
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 type 5
 width 783
 height 1290
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-name "Letter (8,5\" x 11\")"
+name "Statement"
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-)
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-name "Executive (7,25\"x10,5\")"
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-)
-(PageSizeInfo
-name "5,5\" x 8,5\""
 type 6
 width 506
 height 783
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-name "A3 (297 x 420 mm)"
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+)
+(PageSizeInfo
+name "A3"
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-name "A4 (210 x 297 mm)"
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-)
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-name "B4 JIS (257 x 364 mm)"
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 height 1320
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-name "B5 JIS (182 x 257 mm)"
+name "B5 (JIS)"
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 height 932
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-type 88
+type 17
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-name "8\" x 13\""
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-name "Env. DL (110 x 220 mm)"
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 width 399
 height 798
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-name "Env. C5 (162 x 229 mm)"
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 width 587
 height 830
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+name "Oficio 8.5x13"
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+name "8K 273x394 mm"
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+type 139
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 exportPageSetupInfo (PageSetupInfo
@@ -4292,7 +4149,7 @@ hdsWorkspaceLocation ""
 relativeLibraryRootDir ""
 vmLabelLatestDontAskAgain 0
 vmLabelWorkspaceDontAskAgain 0
-logWindowGeometry "636x406+-823+276"
+logWindowGeometry "636x406+308+98"
 diagramBrowserTabNo 0
 showInsertPortHint 0
 showContentFirstTime 0
@@ -6384,11 +6241,11 @@ size 180
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-yPos 0
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-width 1936
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-height 1056
+height 1047
 activeSidePanelTab 2
-activeLibraryTab 1
+activeLibraryTab 5
 sidePanelSize 278
 showUnixHiddenFiles 0
 componentBrowserXpos 569

06-07-08-09-SystemOnChip/Prefs/hds_user/v2019.2/tasks/modelsim_simulate.tsk

@@ -46,7 +46,7 @@ settingsMap [
 "GlitchGeneration"
 "1"
 "InitCmd"
-"$SIMULATION_DIR/beamerSoc.do"
+"C:/Users/remi.heredero/GIT/2024-sem-labs-herederoremi/06-07-08-09-SystemOnChip/Simulation/ahbGpio.do"
 "LogFile"
 ""
 "RemoteHost"