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add polygon signal

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This commit is contained in:
Rémi Heredero
2024-03-01 14:24:40 +01:00
parent b8b5c00ac2
commit 27e755cc2f
13 changed files with 2799 additions and 754 deletions
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26
01-WaveformGenerator/WaveformGenerator_test/hdl/waveformgen_tb_struct.vhg
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@ -3,7 +3,7 @@
--
-- Created:
-- by - remi.heredero.UNKNOWN (WE2330808)
-- at - 11:05:34 27.02.2024
-- at - 13:13:41 01.03.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
@ -18,16 +18,20 @@ ARCHITECTURE struct OF waveformGen_tb IS
-- Architecture declarations
constant bitNb: positive := 16;
constant signalBitNb: positive := 16;
constant phaseBitNb: positive := 16;
constant clockFrequency: real := 60.0E6;
--constant clockFrequency: real := 66.0E6;
-- Internal signal declarations
SIGNAL clock : std_ulogic;
SIGNAL en : std_ulogic;
SIGNAL polygon : unsigned(signalBitNb-1 DOWNTO 0);
SIGNAL reset : std_ulogic;
SIGNAL sawtooth : unsigned(bitNb-1 DOWNTO 0);
SIGNAL square : unsigned(bitNb-1 DOWNTO 0);
SIGNAL sawtooth : unsigned(phaseBitNb-1 DOWNTO 0);
SIGNAL square : unsigned(signalBitNb-1 DOWNTO 0);
SIGNAL step : unsigned(bitNb-1 DOWNTO 0);
SIGNAL triangle : unsigned(signalBitNb-1 DOWNTO 0);
-- Component Declarations
@ -51,11 +55,15 @@ ARCHITECTURE struct OF waveformGen_tb IS
COMPONENT waveformGen_tester
GENERIC (
bitNb : positive := 16;
clockFrequency : real := 60.0E6
clockFrequency : real := 60.0E6;
phaseBitNb : positive := 16;
signalBitNb : positive := 16
);
PORT (
sawtooth : IN unsigned (bitNb-1 DOWNTO 0);
square : IN unsigned (bitNb-1 DOWNTO 0);
polygon : IN unsigned (signalBitNb-1 DOWNTO 0);
sawtooth : IN unsigned (phaseBitNb-1 DOWNTO 0);
square : IN unsigned (signalBitNb-1 DOWNTO 0);
triangle : IN unsigned (signalBitNb-1 DOWNTO 0);
clock : OUT std_ulogic ;
en : OUT std_ulogic ;
reset : OUT std_ulogic ;
@ -83,11 +91,11 @@ BEGIN
en => en,
reset => reset,
step => step,
polygon => OPEN,
polygon => polygon,
sawtooth => sawtooth,
sine => OPEN,
square => square,
triangle => OPEN
triangle => triangle
);
I_tb : waveformGen_tester
GENERIC MAP (
@ -95,8 +103,10 @@ BEGIN
clockFrequency => clockFrequency
)
PORT MAP (
polygon => polygon,
sawtooth => sawtooth,
square => square,
triangle => triangle,
clock => clock,
en => en,
reset => reset,

12
01-WaveformGenerator/WaveformGenerator_test/hdl/waveformgen_tester_entity.vhg
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@ -2,7 +2,7 @@
--
-- Created:
-- by - remi.heredero.UNKNOWN (WE2330808)
-- at - 11:05:34 27.02.2024
-- at - 13:12:24 01.03.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
@ -13,11 +13,15 @@ LIBRARY ieee;
ENTITY waveformGen_tester IS
GENERIC(
bitNb : positive := 16;
clockFrequency : real := 60.0E6
clockFrequency : real := 60.0E6;
phaseBitNb : positive := 16;
signalBitNb : positive := 16
);
PORT(
sawtooth : IN unsigned (BitNb-1 DOWNTO 0);
square : IN unsigned (BitNb-1 DOWNTO 0);
polygon : IN unsigned (signalBitNb-1 DOWNTO 0);
sawtooth : IN unsigned (phaseBitNb-1 DOWNTO 0);
square : IN unsigned (signalBitNb-1 DOWNTO 0);
triangle : IN unsigned (signalBitNb-1 DOWNTO 0);
clock : OUT std_ulogic;
en : OUT std_ulogic;
reset : OUT std_ulogic;

118
01-WaveformGenerator/WaveformGenerator_test/hds/.xrf/waveformgen_tb_struct.xrf
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@ -18,133 +18,151 @@ VIEW struct.bd
NO_GRAPHIC 19
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 53,0 24 0
GRAPHIC 53,0 26 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 700,0 25 0
GRAPHIC 700,0 27 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 45,0 26 0
GRAPHIC 1355,0 28 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1180,0 27 0
GRAPHIC 45,0 29 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1263,0 28 0
GRAPHIC 1180,0 30 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 594,0 29 0
GRAPHIC 1263,0 31 0
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 30
GRAPHIC 594,0 32 0
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 31
GRAPHIC 1308,0 33 0
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 34
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 35
LIBRARY WaveformGenerator
DESIGN waveform@gen
VIEW struct
GRAPHIC 954,0 33 0
GRAPHIC 954,0 37 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 14,0 34 1
GRAPHIC 14,0 38 1
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 52,0 39 0
GRAPHIC 52,0 43 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 123,0 40 0
GRAPHIC 123,0 44 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 88,0 41 0
GRAPHIC 88,0 45 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 113,0 42 0
GRAPHIC 113,0 46 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 93,0 43 0
GRAPHIC 93,0 47 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 98,0 44 0
GRAPHIC 98,0 48 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 103,0 45 0
GRAPHIC 103,0 49 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 108,0 46 0
GRAPHIC 108,0 50 0
DESIGN waveform@gen
VIEW symbol.sb
GRAPHIC 118,0 47 0
GRAPHIC 118,0 51 0
LIBRARY WaveformGenerator_test
DESIGN waveform@gen_tester
VIEW test
GRAPHIC 421,0 50 0
GRAPHIC 421,0 54 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 14,0 51 1
GRAPHIC 14,0 55 1
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1182,0 56 0
GRAPHIC 1357,0 62 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1265,0 57 0
GRAPHIC 1182,0 63 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 55,0 58 0
GRAPHIC 1265,0 64 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 702,0 59 0
GRAPHIC 1310,0 65 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 47,0 60 0
GRAPHIC 55,0 66 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 596,0 61 0
GRAPHIC 702,0 67 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 47,0 68 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 596,0 69 0
LIBRARY WaveformGenerator_test
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 64
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 954,0 67 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 421,0 68 0
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 71
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 73
NO_GRAPHIC 72
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 954,0 75 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 961,0 76 1
GRAPHIC 421,0 76 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 55,0 81 0
NO_GRAPHIC 79
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 702,0 82 0
NO_GRAPHIC 81
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 47,0 83 0
GRAPHIC 954,0 83 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 596,0 84 0
GRAPHIC 961,0 84 1
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1182,0 86 0
GRAPHIC 55,0 89 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1265,0 88 0
GRAPHIC 702,0 90 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 421,0 91 0
GRAPHIC 47,0 91 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 428,0 92 1
GRAPHIC 596,0 92 0
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 105
GRAPHIC 1357,0 93 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1182,0 94 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1265,0 96 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 1310,0 97 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 421,0 99 0
DESIGN waveform@gen_tb
VIEW struct.bd
GRAPHIC 428,0 100 1
DESIGN waveform@gen_tb
VIEW struct.bd
NO_GRAPHIC 115

22
01-WaveformGenerator/WaveformGenerator_test/hds/.xrf/waveformgen_tester_entity.xrf
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@ -9,25 +9,31 @@ VIEW interface
GRAPHIC 13,0 13 1
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 904,0 18 0
GRAPHIC 1036,0 20 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 909,0 19 0
GRAPHIC 1046,0 21 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 889,0 20 0
GRAPHIC 1051,0 22 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 894,0 21 0
GRAPHIC 1061,0 23 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 899,0 22 0
GRAPHIC 1026,0 24 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 914,0 23 0
GRAPHIC 1031,0 25 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 1,0 26 0
GRAPHIC 1041,0 26 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 1,0 27 0
GRAPHIC 1056,0 27 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 1,0 30 0
DESIGN waveform@gen_tester
VIEW interface
GRAPHIC 1,0 31 0

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01-WaveformGenerator/WaveformGenerator_test/hds/waveform@gen_tb/struct.bd
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01-WaveformGenerator/WaveformGenerator_test/hds/waveform@gen_tb/struct.bd.lck
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@ -2,5 +2,5 @@ EDIT_LOCK
remi.heredero
UNKNOWN
WE2330808
2208
27.02.2024-10:20:27.896000
15212
01.03.2024-13:01:16.350000

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01-WaveformGenerator/WaveformGenerator_test/hds/waveform@gen_tester/interface
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01-WaveformGenerator/WaveformGenerator_test/hds/waveform@gen_tester/interface.bak Normal file
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