add polygon signal
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@ -4291,7 +4148,7 @@ hdsWorkspaceLocation ""
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@ -1,4 +1,27 @@
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ARCHITECTURE studentVersion OF triangleToPolygon IS
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signal mySignal : unsigned(bitNb downto 0);
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constant aFullTriangle : unsigned(bitNb downto 0) := (others => '1');
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BEGIN
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polygon <= (others => '0');
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convert: process(triangle)
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begin
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if (('0' & triangle) + ('0' & shift_right(triangle, 1))) < shift_right(aFullTriangle, 3) then
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mySignal <= shift_right(aFullTriangle,3);
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elsif (('0' & triangle) + ('0' & shift_right(triangle, 1))) > (shift_right(aFullTriangle, 1) + shift_right('0' & aFullTriangle, 3)) then
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mySignal <= (shift_right(aFullTriangle,1) + shift_right(aFullTriangle,3));
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elsif '1' then
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mySignal <= ('0' & triangle) + ('0' & shift_right(triangle, 1) );
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end if ;
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end process convert;
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polygon <= resize(mySignal-shift_right('0' & aFullTriangle,3), bitNb);
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END ARCHITECTURE studentVersion;
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@ -0,0 +1,13 @@
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ARCHITECTURE studentVersion OF triangleToPolygon IS
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signal mySignal : unsigned(bitNb downto 0);
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BEGIN
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convert: process(triangle)
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begin
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mySignal <= triangle + shift_left(triangle, 1);
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end process convert;
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polygon <= mySignal;
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END ARCHITECTURE studentVersion;
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@ -3,7 +3,7 @@
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--
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-- Created:
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-- by - remi.heredero.UNKNOWN (WE2330808)
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-- at - 11:05:34 27.02.2024
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-- at - 13:13:41 01.03.2024
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--
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-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
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--
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@ -18,16 +18,20 @@ ARCHITECTURE struct OF waveformGen_tb IS
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-- Architecture declarations
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constant bitNb: positive := 16;
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constant signalBitNb: positive := 16;
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constant phaseBitNb: positive := 16;
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constant clockFrequency: real := 60.0E6;
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--constant clockFrequency: real := 66.0E6;
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-- Internal signal declarations
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SIGNAL clock : std_ulogic;
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SIGNAL en : std_ulogic;
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SIGNAL polygon : unsigned(signalBitNb-1 DOWNTO 0);
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SIGNAL reset : std_ulogic;
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SIGNAL sawtooth : unsigned(bitNb-1 DOWNTO 0);
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SIGNAL square : unsigned(bitNb-1 DOWNTO 0);
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SIGNAL sawtooth : unsigned(phaseBitNb-1 DOWNTO 0);
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SIGNAL square : unsigned(signalBitNb-1 DOWNTO 0);
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SIGNAL step : unsigned(bitNb-1 DOWNTO 0);
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SIGNAL triangle : unsigned(signalBitNb-1 DOWNTO 0);
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-- Component Declarations
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@ -51,11 +55,15 @@ ARCHITECTURE struct OF waveformGen_tb IS
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COMPONENT waveformGen_tester
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GENERIC (
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bitNb : positive := 16;
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clockFrequency : real := 60.0E6
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clockFrequency : real := 60.0E6;
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phaseBitNb : positive := 16;
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signalBitNb : positive := 16
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);
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PORT (
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sawtooth : IN unsigned (bitNb-1 DOWNTO 0);
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square : IN unsigned (bitNb-1 DOWNTO 0);
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polygon : IN unsigned (signalBitNb-1 DOWNTO 0);
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sawtooth : IN unsigned (phaseBitNb-1 DOWNTO 0);
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square : IN unsigned (signalBitNb-1 DOWNTO 0);
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triangle : IN unsigned (signalBitNb-1 DOWNTO 0);
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clock : OUT std_ulogic ;
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en : OUT std_ulogic ;
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reset : OUT std_ulogic ;
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@ -83,11 +91,11 @@ BEGIN
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en => en,
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reset => reset,
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step => step,
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polygon => OPEN,
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polygon => polygon,
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sawtooth => sawtooth,
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sine => OPEN,
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square => square,
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triangle => OPEN
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triangle => triangle
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);
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I_tb : waveformGen_tester
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GENERIC MAP (
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@ -95,8 +103,10 @@ BEGIN
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clockFrequency => clockFrequency
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)
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PORT MAP (
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polygon => polygon,
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sawtooth => sawtooth,
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square => square,
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triangle => triangle,
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clock => clock,
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en => en,
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reset => reset,
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@ -2,7 +2,7 @@
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--
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-- Created:
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-- by - remi.heredero.UNKNOWN (WE2330808)
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-- at - 11:05:34 27.02.2024
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-- at - 13:12:24 01.03.2024
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--
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-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
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--
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@ -13,11 +13,15 @@ LIBRARY ieee;
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ENTITY waveformGen_tester IS
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GENERIC(
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bitNb : positive := 16;
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clockFrequency : real := 60.0E6
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clockFrequency : real := 60.0E6;
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phaseBitNb : positive := 16;
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signalBitNb : positive := 16
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);
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PORT(
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sawtooth : IN unsigned (BitNb-1 DOWNTO 0);
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square : IN unsigned (BitNb-1 DOWNTO 0);
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polygon : IN unsigned (signalBitNb-1 DOWNTO 0);
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sawtooth : IN unsigned (phaseBitNb-1 DOWNTO 0);
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square : IN unsigned (signalBitNb-1 DOWNTO 0);
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triangle : IN unsigned (signalBitNb-1 DOWNTO 0);
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clock : OUT std_ulogic;
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en : OUT std_ulogic;
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reset : OUT std_ulogic;
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@ -18,133 +18,151 @@ VIEW struct.bd
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NO_GRAPHIC 19
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DESIGN waveform@gen_tb
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VIEW struct.bd
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GRAPHIC 53,0 24 0
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GRAPHIC 53,0 26 0
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DESIGN waveform@gen_tb
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VIEW struct.bd
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GRAPHIC 700,0 25 0
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GRAPHIC 700,0 27 0
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DESIGN waveform@gen_tb
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||||
VIEW struct.bd
|
||||
GRAPHIC 45,0 26 0
|
||||
GRAPHIC 1355,0 28 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1180,0 27 0
|
||||
GRAPHIC 45,0 29 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1263,0 28 0
|
||||
GRAPHIC 1180,0 30 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 594,0 29 0
|
||||
GRAPHIC 1263,0 31 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 30
|
||||
GRAPHIC 594,0 32 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 31
|
||||
GRAPHIC 1308,0 33 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 34
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 35
|
||||
LIBRARY WaveformGenerator
|
||||
DESIGN waveform@gen
|
||||
VIEW struct
|
||||
GRAPHIC 954,0 33 0
|
||||
GRAPHIC 954,0 37 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 14,0 34 1
|
||||
GRAPHIC 14,0 38 1
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 52,0 39 0
|
||||
GRAPHIC 52,0 43 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 123,0 40 0
|
||||
GRAPHIC 123,0 44 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 88,0 41 0
|
||||
GRAPHIC 88,0 45 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 113,0 42 0
|
||||
GRAPHIC 113,0 46 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 93,0 43 0
|
||||
GRAPHIC 93,0 47 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 98,0 44 0
|
||||
GRAPHIC 98,0 48 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 103,0 45 0
|
||||
GRAPHIC 103,0 49 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 108,0 46 0
|
||||
GRAPHIC 108,0 50 0
|
||||
DESIGN waveform@gen
|
||||
VIEW symbol.sb
|
||||
GRAPHIC 118,0 47 0
|
||||
GRAPHIC 118,0 51 0
|
||||
LIBRARY WaveformGenerator_test
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW test
|
||||
GRAPHIC 421,0 50 0
|
||||
GRAPHIC 421,0 54 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 14,0 51 1
|
||||
GRAPHIC 14,0 55 1
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1182,0 56 0
|
||||
GRAPHIC 1357,0 62 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1265,0 57 0
|
||||
GRAPHIC 1182,0 63 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 55,0 58 0
|
||||
GRAPHIC 1265,0 64 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 702,0 59 0
|
||||
GRAPHIC 1310,0 65 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 47,0 60 0
|
||||
GRAPHIC 55,0 66 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 596,0 61 0
|
||||
GRAPHIC 702,0 67 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 47,0 68 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 596,0 69 0
|
||||
LIBRARY WaveformGenerator_test
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 64
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 954,0 67 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 421,0 68 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 71
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 73
|
||||
NO_GRAPHIC 72
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 954,0 75 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 961,0 76 1
|
||||
GRAPHIC 421,0 76 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 55,0 81 0
|
||||
NO_GRAPHIC 79
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 702,0 82 0
|
||||
NO_GRAPHIC 81
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 47,0 83 0
|
||||
GRAPHIC 954,0 83 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 596,0 84 0
|
||||
GRAPHIC 961,0 84 1
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1182,0 86 0
|
||||
GRAPHIC 55,0 89 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1265,0 88 0
|
||||
GRAPHIC 702,0 90 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 421,0 91 0
|
||||
GRAPHIC 47,0 91 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 428,0 92 1
|
||||
GRAPHIC 596,0 92 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 105
|
||||
GRAPHIC 1357,0 93 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1182,0 94 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1265,0 96 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 1310,0 97 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 421,0 99 0
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
GRAPHIC 428,0 100 1
|
||||
DESIGN waveform@gen_tb
|
||||
VIEW struct.bd
|
||||
NO_GRAPHIC 115
|
||||
|
||||
@ -9,25 +9,31 @@ VIEW interface
|
||||
GRAPHIC 13,0 13 1
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 904,0 18 0
|
||||
GRAPHIC 1036,0 20 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 909,0 19 0
|
||||
GRAPHIC 1046,0 21 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 889,0 20 0
|
||||
GRAPHIC 1051,0 22 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 894,0 21 0
|
||||
GRAPHIC 1061,0 23 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 899,0 22 0
|
||||
GRAPHIC 1026,0 24 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 914,0 23 0
|
||||
GRAPHIC 1031,0 25 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 1,0 26 0
|
||||
GRAPHIC 1041,0 26 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 1,0 27 0
|
||||
GRAPHIC 1056,0 27 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 1,0 30 0
|
||||
DESIGN waveform@gen_tester
|
||||
VIEW interface
|
||||
GRAPHIC 1,0 31 0
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -2,5 +2,5 @@ EDIT_LOCK
|
||||
remi.heredero
|
||||
UNKNOWN
|
||||
WE2330808
|
||||
2208
|
||||
27.02.2024-10:20:27.896000
|
||||
15212
|
||||
01.03.2024-13:01:16.350000
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user