Initial commit

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/text_files/new_document.txt

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+FILE_NAMING_RULE: new_document.txt
+DESCRIPTION_START
+This is the default template used for the creation of Text Document files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+#
+# Created:
+#         by - %(user).%(group) (%(host))
+#         at - %(time) %(date)
+#
+# using Mentor Graphics HDL Designer(TM) %(version)
+#
+

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_architecture/architecture.vhd

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+FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
+DESCRIPTION_START
+This is the default template used for the creation of VHDL Architecture files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+--
+-- VHDL Architecture %(library).%(unit).%(view)
+--
+-- Created:
+--          by - %(user).%(group) (%(host))
+--          at - %(time) %(date)
+--
+-- using Mentor Graphics HDL Designer(TM) %(version)
+--
+%(architecture)

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_combined/combined.vhd

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+FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
+DESCRIPTION_START
+This is the default template used for the creation of combined VHDL Architecture and Entity files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+--
+-- VHDL Architecture %(library).%(unit).%(view)
+--
+-- Created:
+--          by - %(user).%(group) (%(host))
+--          at - %(time) %(date)
+--
+-- using Mentor Graphics HDL Designer(TM) %(version)
+--
+%(entity)
+--
+%(architecture)

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_configuration/configuration.vhd

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+FILE_NAMING_RULE: %(entity_name)_%(arch_name)_config.vhd
+DESCRIPTION_START
+This is the default template used for the creation of VHDL Configuration files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+--
+-- VHDL Configuration %(library).%(unit).%(view)
+--
+-- Created:
+--          by - %(user).%(group) (%(host))
+--          at - %(time) %(date)
+--
+-- using Mentor Graphics HDL Designer(TM) %(version)
+--
+CONFIGURATION %(entity_name)_config OF %(entity_name) IS
+   FOR %(arch_name)
+   END FOR;
+END %(entity_name)_config;
+

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_entity/entity.vhd

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+FILE_NAMING_RULE: %(entity_name)_entity.vhd
+DESCRIPTION_START
+This is the default template used for the creation of VHDL Entity files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+--
+-- VHDL Entity %(library).%(unit).%(view)
+--
+-- Created:
+--          by - %(user).%(group) (%(host))
+--          at - %(time) %(date)
+--
+-- using Mentor Graphics HDL Designer(TM) %(version)
+--
+%(entity)

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_package_body/package_body.vhd

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+FILE_NAMING_RULE: %(entity_name)_pkg_body.vhd
+DESCRIPTION_START
+This is the default template used for the creation of VHDL Package Body files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+--
+-- VHDL Package Body %(library).%(unit)
+--
+-- Created:
+--          by - %(user).%(group) (%(host))
+--          at - %(time) %(date)
+--
+-- using Mentor Graphics HDL Designer(TM) %(version)
+--
+PACKAGE BODY %(entity_name) IS
+END %(entity_name);

03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_package_header/package_header.vhd

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+FILE_NAMING_RULE: %(entity_name)_pkg.vhd
+DESCRIPTION_START
+This is the default template used for the creation of VHDL Package Header files.
+Template supplied by Mentor Graphics.
+DESCRIPTION_END
+--
+-- VHDL Package Header %(library).%(unit)
+--
+-- Created:
+--          by - %(user).%(group) (%(host))
+--          at - %(time) %(date)
+--
+-- using Mentor Graphics HDL Designer(TM) %(version)
+--
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+PACKAGE %(entity_name) IS
+END %(entity_name);