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github-classroom[bot]
2024-02-23 13:01:05 +00:00
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;===============================================================
; Beamer control
;===============================================================
;---------------------------------------------------------------
; register definitions
; s0, s1: used for INPUT and OUTPUT operations
; S2: returns UART data byte
; S3: uart protocol checksum
; S4: uart protocol packet id
; S5: uart protocol command id
; S6: uart protocol address
; S7: uart protocol data
; S8: copy of UART data byte for debug
;---------------------------------------------------------------
;---------------------------------------------------------------
; GPIO definitions
;---------------------------------------------------------------
CONSTANT gpioBaseAddress, 0000
CONSTANT gpioDataOffset, 0000
CONSTANT gpioEnableOffset, 0001
;---------------------------------------------------------------
; UART definitions
;---------------------------------------------------------------
CONSTANT uartBaseAddress, 0010
CONSTANT uartBaudOffset, 0002
CONSTANT uartStatusOffset, 0001
CONSTANT uartDataReady, 0001
CONSTANT uartSending, 0002
; CONSTANT uartBaudCount, 023D ; 66E6 / 115 200 = 573
CONSTANT uartBaudCount, 0042 ; 66E6 / 1E6 = 66
; CONSTANT uartpollDelay, 0100
CONSTANT uartpollDelay, 0040
CONSTANT commandNack, 0000
CONSTANT commandWriteMem, 0003
CONSTANT commandReadMem, 0004
;---------------------------------------------------------------
; beamer peripheral definitions
;---------------------------------------------------------------
CONSTANT beamerBaseAddress,0020
CONSTANT beamerCtlOffset, 0000
CONSTANT beamerSpeedOffset,0001
CONSTANT beamerCtlInit, 0401
; CONSTANT beamerCtlInit, 1001
CONSTANT beamerSpeedInit, 0004
;===============================================================
; initializations
;===============================================================
;---------------------------------------------------------------
; initialize GPIO
;---------------------------------------------------------------
LOAD s0, gpioBaseAddress
ADD s0, gpioDataOffset
LOAD s1, AA
OUTPUT s1, (s0)
LOAD s0, gpioBaseAddress
ADD s0, gpioEnableOffset
LOAD s1, 0F
OUTPUT s1, (s0)
;---------------------------------------------------------------
; initialize UART
;---------------------------------------------------------------
LOAD s0, uartBaseAddress
ADD s0, uartBaudOffset
LOAD s1, uartBaudCount
OUTPUT s1, (s0)
;---------------------------------------------------------------
; initialize beamer peripheral
;---------------------------------------------------------------
LOAD s0, beamerBaseAddress
ADD s0, beamerCtlOffset
LOAD s1, beamerCtlInit
OUTPUT s1, (s0)
LOAD s0, beamerBaseAddress
ADD s0, beamerSpeedOffset
LOAD s1, beamerSpeedInit
OUTPUT s1, (s0)
;===============================================================
; Main loop
;===============================================================
;---------------------------------------------------------------
; Process commands from serial port
;---------------------------------------------------------------
main: CALL uartGetCmd ; get command from UART
COMPARE s3, 0000 ; check function return
JUMP nz, commandAbort
COMPARE s5, commandWriteMem ; check for WRITE_MEM command
JUMP nz, commandRead
OUTPUT s7, (s6) ; write word to memory location
CALL sendWriteOk ; send write acknowledge
JUMP main
commandRead: INPUT s7, (s6) ; write word in memory location
CALL sendReadData ; send back read data
JUMP main
commandAbort: CALL sendNAck
JUMP main
;===============================================================
; Subroutines
;===============================================================
;---------------------------------------------------------------
; Get command from serial port
;---------------------------------------------------------------
uartGetCmd: CALL uartGetByte ; get command header
COMPARE s2, 00AA
JUMP nz, uartGetCmd ; loop until byte is AAh
LOAD s3, s2 ; prepare checksum
CALL uartGetByte ; get packet id
ADD s3, s2 ; calculate checksum
LOAD s4, s2 ; store id for reply
CALL uartGetByte ; get command
ADD s3, s2 ; calculate checksum
COMPARE s2, commandWriteMem ; check for WRITE_MEM command
JUMP z , commandOk
COMPARE s2, commandReadMem ; check for READ_MEM command
JUMP z , commandOk
JUMP commandKo ; no match
commandOk: LOAD s5, s2 ; store command for action
CALL uartGetByte ; get data length
ADD s3, s2 ; calculate checksum
COMPARE s5, commandWriteMem ; check for WRITE_MEM command
JUMP z , testWrLength ; go to test write command length
COMPARE s2, 0002 ; verify READ_MEM length
JUMP nz, commandKo
JUMP getAddress
testWrLength: COMPARE s2, 0004 ; verify WRITE_MEM length
JUMP nz, commandKo
getAddress: CALL uartGetByte ; get address low
ADD s3, s2 ; calculate checksum
LOAD s6, s2 ; store address low
CALL uartGetByte ; get address high
ADD s3, s2 ; calculate checksum
CALL shiftS2L8
ADD s6, s2 ; build address from low and high
COMPARE s5, commandReadMem ; check for READ_MEM command
JUMP z , getChecksum ; skip reading data word
CALL uartGetByte ; get data low
ADD s3, s2 ; calculate checksum
LOAD s7, s2 ; store data low
CALL uartGetByte ; get data high
ADD s3, s2 ; calculate checksum
CALL shiftS2L8
ADD s7, s2 ; build data from low and high
getChecksum: CALL uartGetByte ; get checksum
AND s3, 00FF ; limit calculated checksum to 8 bit
COMPARE s3, s2 ; test checksum
JUMP nz, commandKo
LOAD s3, 0000 ; return OK
RETURN
commandKo: LOAD s3, 0001 ; return KO
RETURN
;---------------------------------------------------------------
; send NACK reply
;---------------------------------------------------------------
sendNAck: LOAD s2, 00AA ; send header
LOAD s3, s2 ; prepare checksum
CALL uartSendByte
LOAD s2, s4 ; packet id
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, commandNack ; negative Acknowledge
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, 0000 ; packet length: no data
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s3 ; checksum
CALL uartSendByte
RETURN
;---------------------------------------------------------------
; send WRITE_MEM reply
;---------------------------------------------------------------
sendWriteOk: LOAD s2, 00AA ; send header
LOAD s3, s2 ; prepare checksum
CALL uartSendByte
LOAD s2, s4 ; packet id
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s5 ; received command
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, 0000 ; packet length: no data
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s3 ; checksum
CALL uartSendByte
RETURN
;---------------------------------------------------------------
; send READ_MEM reply
;---------------------------------------------------------------
sendReadData: LOAD s2, 00AA ; send header
LOAD s3, s2 ; prepare checksum
CALL uartSendByte
LOAD s2, s4 ; packet id
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s5 ; received command
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, 0002 ; packet length: 2 bytes
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s7 ; data low
AND s2, 00FF ; keep low byte only
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s7 ; data high
CALL shiftS2R8 ; shift MSBs down to LSBs
ADD s3, s2 ; calculate checksum
CALL uartSendByte
LOAD s2, s3 ; checksum
CALL uartSendByte
RETURN
;---------------------------------------------------------------
; Get byte from serial port
;---------------------------------------------------------------
uartGetByte: LOAD s0, uartBaseAddress ; read UART satus register
ADD s0, 01
;load s8, 0100
checkStat: LOAD s2, uartpollDelay ; add delay between bus reads
delay0: SUB s2, 0001
JUMP nz, delay0
;sub s8, 0001
;jump nz, continue
;load s2, 0035
;call uartSendByte
;load s8, 0100
continue: INPUT s1, (s0)
INPUT s1, (s0)
TEST s1, uartDataReady ; check "data ready" bit
JUMP z , checkStat ; loop until bit is '1'
LOAD s0, uartBaseAddress ; read UART data register
INPUT s2, (s0)
INPUT s2, (s0)
;LOAD s8, s2
RETURN
;---------------------------------------------------------------
; Send byte to serial port
;---------------------------------------------------------------
uartSendByte: LOAD s0, uartBaseAddress ; read UART satus register
ADD s0, uartStatusOffset
readStatus: INPUT s1, (s0)
INPUT s1, (s0)
TEST s1, uartSending ; check "sending data" bit
JUMP z , sendByte ; loop until bit is '1'
LOAD s1, uartpollDelay ; add delay between bus reads
delay1: SUB s1, 0001
JUMP nz, delay1
JUMP readStatus
sendByte: LOAD s0, uartBaseAddress ; write UART data register
OUTPUT s2, (s0)
RETURN
;---------------------------------------------------------------
; shift s2 8 bits to the left
;---------------------------------------------------------------
shiftS2L8: LOAD s0, 8 ; loop count
shiftLeftLoop: SL0 s2
SUB s0, 0001
JUMP nz, shiftLeftLoop
RETURN
;---------------------------------------------------------------
; shift s2 8 bits to the right
;---------------------------------------------------------------
shiftS2R8: LOAD s0, 8 ; loop count
shiftRightLoop: SR0 s2
SUB s0, 0001
JUMP nz, shiftRightLoop
RETURN
;===============================================================
; End of instruction memory
;===============================================================
ADDRESS 3FF
endOfMemory: JUMP endOfMemory

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{
beamer.pas
The beamer controller polls the UART to get commands and provides the
corresponding replies.
}
program BeamerControl;
{==============================================================================}
{ Constants }
{==============================================================================}
const
clockFrequency = 66E6;
gpioBaseAddress = $0000;
gpioDataOffset = $0000;
gpioEnableOffset = $0001;
uartBaseAddress = $0010;
uartBaudOffset = $0002;
uartStatusOffset = $0001;
uartDataReady = $0001;
uartSending = $0002;
uartBaudRate = 1E6;
uartBaudCount = clockFrequency / uartBaudRate;
uartpollDelay = uartBaudCount / 2;
commandHeader = $AA;
commandNack = $00;
commandWriteMem = $03;
commandReadMem = $04;
commandWriteLength = 4;
commandReadLength = 2;
beamerBaseAddress = $0020;
beamerCtlOffset = $0000;
beamerSpeedOffset = $0001;
beamerCtlInit = $0401;
beamerSpeedInit = $0004;
{==============================================================================}
{ Variables }
{==============================================================================}
var
packetId, commandId, errorId: uint8;
memoryAddress, memoryData: word;
{==============================================================================}
{ Procedures and functions }
{==============================================================================}
{============================================================================}
{ Register-level accesses }
{============================================================================}
{----------------------------------------------------------------------------}
{ Registers initializations }
{----------------------------------------------------------------------------}
procedure initRegisters;
begin
{ initialize GPIO }
mem[gpioBaseAddress+gpioDataOffset] := $AA;
mem[gpioBaseAddress+gpioEnableOffset] := $0F;
{ initialize UART }
mem[uartBaseAddress+uartBaudOffset] := uartBaudCount;
{ initialize beamer peripheral }
mem[beamerBaseAddress+beamerCtlOffset] := beamerCtlInit;
mem[beamerBaseAddress+beamerSpeedOffset] := beamerSpeedInit;
end;
{----------------------------------------------------------------------------}
{ Get byte from serial port }
{----------------------------------------------------------------------------}
procedure getSerialPortByte : uint8;
var
uartByte: uint8;
begin
{ poll until data byte available }
uartByte := 0;
while uartByte = 0 do
begin
{ spend time in order not to overcharge the AHB bus }
for index := 1 to uartpollDelay do
noOperation;
{ read status register }
uartByte := mem[uartBaseAddress+uartStatusOffset] and uartDataReady;
end;
{ read data register and return it }
getSerialPortByte := mem[uartBaseAddress];
end;
{----------------------------------------------------------------------------}
{ Send byte to serial port }
{----------------------------------------------------------------------------}
procedure sendSerialPort(uartByte : uint8);
var
statusByte: uint8;
begin
{ poll until ready to send }
statusByte := mem[uartBaseAddress+uartStatusOffset] and uartSending;
while statusByte = 0 do
begin
{ spend time in order not to overcharge the AHB bus }
for index := 1 to uartpollDelay do
noOperation;
{ read status register }
statusByte := mem[uartBaseAddress+uartStatusOffset] and uartSending;
end;
{ write data register }
mem[uartBaseAddress] := uartByte;
end;
{============================================================================}
{ Communication protocol }
{============================================================================}
{----------------------------------------------------------------------------}
{ Get command }
{----------------------------------------------------------------------------}
function getCommand(
var packetId, commandId, commandLength : uint8;
var memoryAddress, memoryData : word
) : uint8;
var
uartData: uint8;
checksum: word;
begin
{ wait for new command header }
uartData := 0;
while uartData <> commandHeader do
uartData := getSerialPortByte;
checksum := uartData;
{ get packet id }
packetId := getSerialPortByte;
checksum := checksum + packetId;
{ get command }
commandId := getSerialPortByte;
checksum := checksum + commandId;
{ process known commands }
if (commandId = commandWriteMem) or (commandId = commandReadMem) then
begin
{ get command length }
commandLength := getSerialPortByte;
checksum := checksum + commandLength;
{ check command lengths }
if (commandId = commandWriteMem) and (commandLength <> commandWriteLength) then
getCommand := 1;
else if (commandId = commandReadMem) and (commandLength <> commandReadLength) then
getCommand := 1;
else
begin
{ get address }
memoryAddress := getSerialPortByte;
checksum := checksum + memoryAddress;
memoryAddress := (memoryAddress shl 8) + getSerialPortByte;
checksum := checksum + memoryAddress;
{ get data }
if commandId = commandReadMem then
begin
memoryData := getSerialPortByte;
checksum := checksum + memoryData;
memoryData := (memoryData shl 8) + getSerialPortByte;
checksum := checksum + memoryData;
end;
{ get and verify checksum}
if getSerialPortByte = (checksum and $00FF) then
getCommand := 0;
else
getCommand := 1;
end;
end;
else
getCommand := 1;
end;
{----------------------------------------------------------------------------}
{ Send NACK }
{----------------------------------------------------------------------------}
function sendNegativeAcknowledge(packetId : uint8);
var
uartData: uint8;
checksum: word;
begin
{ send packet header }
uartData := $AA;
sendSerialPort(uartData);
checksum := uartData;
{ send packet id }
uartData := packetId;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send command id }
uartData := commandNack;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send packet length }
uartData := 0;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send checksum }
uartData := checksum and $00FF;
sendSerialPort(uartData);
end;
{----------------------------------------------------------------------------}
{ Send ACK }
{----------------------------------------------------------------------------}
function sendAcknowledge(packetId, commandId : uint8);
var
uartData: uint8;
checksum: word;
begin
{ send packet header }
uartData := $AA;
sendSerialPort(uartData);
checksum := uartData;
{ send packet id }
uartData := packetId;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send command id }
uartData := commandId;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send packet length }
uartData := 0;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send checksum }
uartData := checksum and $00FF;
sendSerialPort(uartData);
end;
{----------------------------------------------------------------------------}
{ Send READ_MEM reply }
{----------------------------------------------------------------------------}
function sendReadAnswer(packetId : uint8; memoryData: word);
var
uartData: uint8;
checksum: word;
begin
{ send packet header }
uartData := $AA;
sendSerialPort(uartData);
checksum := uartData;
{ send packet id }
uartData := packetId;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send command id }
uartData := commandReadMem;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send packet length }
uartData := 2;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send data low }
uartData := memoryData and $00FF;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send data high }
uartData := memoryData shr 8;
sendSerialPort(uartData);
checksum := checksum + uartData;
{ send checksum }
uartData := checksum and $00FF;
sendSerialPort(uartData);
end;
{==============================================================================}
{ Main program }
{==============================================================================}
begin
{ initialize SoC registers }
initRegisters;
{ main loop }
while true do begin
{ get a new command }
errorId := getCommand(packetId, commandId, memoryAddress, memoryData);
{ process command }
if errorId = 0 then
begin
{ process write command }
if commandId = commandWriteMem then
begin
mem[memoryAddress] := memoryData;
sendAcknowledge(packetId, commandId);
end;
{ process read command }
else if commandId = commandReadMem then
begin
memoryData := mem[memoryAddress];
sendReadAnswer(packetId, memoryData);
end;
{ reply to unknown command }
else
sendNegativeAcknowledge(packetId);
end;
{ negative acknowledge on reception error }
else
sendNegativeAcknowledge(packetId);
end;
end.
{
;---------------------------------------------------------------
; register definitions
; s0, s1: used for INPUT and OUTPUT operations
; S2: returns UART data byte
; S3: uart protocol checksum
; S4: uart protocol packet id
; S5: uart protocol command id
; S6: uart protocol address
; S7: uart protocol data
; S8: copy of UART data byte for debug
;---------------------------------------------------------------
}

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ARCHITECTURE mapped OF programRom IS
subtype opCodeType is std_ulogic_vector(5 downto 0);
constant opLoadC : opCodeType := "000000";
constant opLoadR : opCodeType := "000001";
constant opInputC : opCodeType := "000100";
constant opInputR : opCodeType := "000101";
constant opFetchC : opCodeType := "000110";
constant opFetchR : opCodeType := "000111";
constant opAndC : opCodeType := "001010";
constant opAndR : opCodeType := "001011";
constant opOrC : opCodeType := "001100";
constant opOrR : opCodeType := "001101";
constant opXorC : opCodeType := "001110";
constant opXorR : opCodeType := "001111";
constant opTestC : opCodeType := "010010";
constant opTestR : opCodeType := "010011";
constant opCompC : opCodeType := "010100";
constant opCompR : opCodeType := "010101";
constant opAddC : opCodeType := "011000";
constant opAddR : opCodeType := "011001";
constant opAddCyC : opCodeType := "011010";
constant opAddCyR : opCodeType := "011011";
constant opSubC : opCodeType := "011100";
constant opSubR : opCodeType := "011101";
constant opSubCyC : opCodeType := "011110";
constant opSubCyR : opCodeType := "011111";
constant opShRot : opCodeType := "100000";
constant opOutputC : opCodeType := "101100";
constant opOutputR : opCodeType := "101101";
constant opStoreC : opCodeType := "101110";
constant opStoreR : opCodeType := "101111";
subtype shRotCinType is std_ulogic_vector(2 downto 0);
constant shRotLdC : shRotCinType := "00-";
constant shRotLdM : shRotCinType := "01-";
constant shRotLdL : shRotCinType := "10-";
constant shRotLd0 : shRotCinType := "110";
constant shRotLd1 : shRotCinType := "111";
constant registerAddressBitNb : positive := 4;
constant shRotPadLength : positive
:= dataOut'length - opCodeType'length - registerAddressBitNb
- 1 - shRotCinType'length;
subtype shRotDirType is std_ulogic_vector(1+shRotPadLength-1 downto 0);
constant shRotL : shRotDirType := (0 => '0', others => '-');
constant shRotR : shRotDirType := (0 => '1', others => '-');
subtype branchCodeType is std_ulogic_vector(4 downto 0);
constant brRet : branchCodeType := "10101";
constant brCall : branchCodeType := "11000";
constant brJump : branchCodeType := "11010";
constant brReti : branchCodeType := "11100";
constant brEni : branchCodeType := "11110";
subtype branchConditionType is std_ulogic_vector(2 downto 0);
constant brDo : branchConditionType := "000";
constant brZ : branchConditionType := "100";
constant brNZ : branchConditionType := "101";
constant brC : branchConditionType := "110";
constant brNC : branchConditionType := "111";
subtype memoryWordType is std_ulogic_vector(dataOut'range);
type memoryArrayType is array (0 to 2**address'length-1) of memoryWordType;
signal memoryArray : memoryArrayType := (
--===============================================================
-- Beamer control
--===============================================================
--
-----------------------------------------------------------------
-- register definitions
-- s0, s1: used for INPUT and OUTPUT operations
-- S2: returns UART data byte
-- S3: uart protocol checksum
-- S4: uart protocol packet id
-- S5: uart protocol command id
-- S6: uart protocol address
-- S7: uart protocol data
-- S8: copy of UART data byte for debug
-----------------------------------------------------------------
--
-----------------------------------------------------------------
-- GPIO definitions
-----------------------------------------------------------------
-----------------------------------------------------------------
-- UART definitions
-----------------------------------------------------------------
-- CONSTANT uartBaudCount, 023D ; 66E6 / 115 200 = 573
-- CONSTANT uartpollDelay, 0100
-----------------------------------------------------------------
-- beamer peripheral definitions
-----------------------------------------------------------------
-- CONSTANT beamerCtlInit, 1001
--
--===============================================================
-- initializations
--===============================================================
--
-----------------------------------------------------------------
-- initialize GPIO
-----------------------------------------------------------------
16#000# => opLoadC & "0000" & "0000000000000000", -- LOAD s0, 0000
16#001# => opAddC & "0000" & "0000000000000000", -- ADD s0, 0000
16#002# => opLoadC & "0001" & "0000000010101010", -- LOAD s1, AA
16#003# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
16#004# => opLoadC & "0000" & "0000000000000000", -- LOAD s0, 0000
16#005# => opAddC & "0000" & "0000000000000001", -- ADD s0, 0001
16#006# => opLoadC & "0001" & "0000000000001111", -- LOAD s1, 0F
16#007# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
-----------------------------------------------------------------
-- initialize UART
-----------------------------------------------------------------
16#008# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010
16#009# => opAddC & "0000" & "0000000000000010", -- ADD s0, 0002
16#00A# => opLoadC & "0001" & "0000000001000010", -- LOAD s1, 0042
16#00B# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
-----------------------------------------------------------------
-- initialize beamer peripheral
-----------------------------------------------------------------
16#00C# => opLoadC & "0000" & "0000000000100000", -- LOAD s0, 0020
16#00D# => opAddC & "0000" & "0000000000000000", -- ADD s0, 0000
16#00E# => opLoadC & "0001" & "0000010000000001", -- LOAD s1, 0401
16#00F# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
16#010# => opLoadC & "0000" & "0000000000100000", -- LOAD s0, 0020
16#011# => opAddC & "0000" & "0000000000000001", -- ADD s0, 0001
16#012# => opLoadC & "0001" & "0000000000000100", -- LOAD s1, 0004
16#013# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
--
--===============================================================
-- Main loop
--===============================================================
--
-----------------------------------------------------------------
-- Process commands from serial port
-----------------------------------------------------------------
-- _main_:
16#014# => brCall & brDo & "--------0000100001",-- CALL 021 ; get command from UART
16#015# => opCompC & "0011" & "0000000000000000", -- COMPARE s3, 0000 ; check function return
16#016# => brJump & brNZ & "--------0000011111",-- JUMP NZ, 01F
16#017# => opCompC & "0101" & "0000000000000011", -- COMPARE s5, 0003 ; check for WRITE_MEM command
16#018# => brJump & brNZ & "--------0000011100",-- JUMP NZ, 01C
16#019# => opOutputR & "0111" & "0110------------", -- OUTPUT s7, (S6) ; write word to memory location
16#01A# => brCall & brDo & "--------0001100000",-- CALL 060 ; send write acknowledge
16#01B# => brJump & brDo & "--------0000010100",-- JUMP 014
-- _commandRead_:
16#01C# => opInputR & "0111" & "0110------------", -- INPUT s7, (S6) ; write word in memory location
16#01D# => brCall & brDo & "--------0001101111",-- CALL 06F ; send back read data
16#01E# => brJump & brDo & "--------0000010100",-- JUMP 014
-- _commandAbort_:
16#01F# => brCall & brDo & "--------0001010001",-- CALL 051
16#020# => brJump & brDo & "--------0000010100",-- JUMP 014
--
--===============================================================
-- Subroutines
--===============================================================
--
-----------------------------------------------------------------
-- Get command from serial port
-----------------------------------------------------------------
-- _uartGetCmd_:
16#021# => brCall & brDo & "--------0010000110",-- CALL 086 ; get command header
16#022# => opCompC & "0010" & "0000000010101010", -- COMPARE s2, 00AA
16#023# => brJump & brNZ & "--------0000100001",-- JUMP NZ, 021 ; loop until byte is AAh
16#024# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#025# => brCall & brDo & "--------0010000110",-- CALL 086 ; get packet id
16#026# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#027# => opLoadR & "0100" & "0010------------", -- LOAD s4, s2 ; store id for reply
16#028# => brCall & brDo & "--------0010000110",-- CALL 086 ; get command
16#029# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#02A# => opCompC & "0010" & "0000000000000011", -- COMPARE s2, 0003 ; check for WRITE_MEM command
16#02B# => brJump & brZ & "--------0000101111",-- JUMP Z, 02F
16#02C# => opCompC & "0010" & "0000000000000100", -- COMPARE s2, 0004 ; check for READ_MEM command
16#02D# => brJump & brZ & "--------0000101111",-- JUMP Z, 02F
16#02E# => brJump & brDo & "--------0001001111",-- JUMP 04F ; no match
-- _commandOk_:
16#02F# => opLoadR & "0101" & "0010------------", -- LOAD s5, s2 ; store command for action
16#030# => brCall & brDo & "--------0010000110",-- CALL 086 ; get data length
16#031# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#032# => opCompC & "0101" & "0000000000000011", -- COMPARE s5, 0003 ; check for WRITE_MEM command
16#033# => brJump & brZ & "--------0000110111",-- JUMP Z, 037 ; go to test write command length
16#034# => opCompC & "0010" & "0000000000000010", -- COMPARE s2, 0002 ; verify READ_MEM length
16#035# => brJump & brNZ & "--------0001001111",-- JUMP NZ, 04F
16#036# => brJump & brDo & "--------0000111001",-- JUMP 039
-- _testWrLength_:
16#037# => opCompC & "0010" & "0000000000000100", -- COMPARE s2, 0004 ; verify WRITE_MEM length
16#038# => brJump & brNZ & "--------0001001111",-- JUMP NZ, 04F
-- _getAddress_:
16#039# => brCall & brDo & "--------0010000110",-- CALL 086 ; get address low
16#03A# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#03B# => opLoadR & "0110" & "0010------------", -- LOAD s6, s2 ; store address low
16#03C# => brCall & brDo & "--------0010000110",-- CALL 086 ; get address high
16#03D# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#03E# => brCall & brDo & "--------0010100000",-- CALL 0A0
16#03F# => opAddR & "0110" & "0010------------", -- ADD s6, s2 ; build address from low and high
16#040# => opCompC & "0101" & "0000000000000100", -- COMPARE s5, 0004 ; check for READ_MEM command
16#041# => brJump & brZ & "--------0001001001",-- JUMP Z, 049 ; skip reading data word
16#042# => brCall & brDo & "--------0010000110",-- CALL 086 ; get data low
16#043# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#044# => opLoadR & "0111" & "0010------------", -- LOAD s7, s2 ; store data low
16#045# => brCall & brDo & "--------0010000110",-- CALL 086 ; get data high
16#046# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#047# => brCall & brDo & "--------0010100000",-- CALL 0A0
16#048# => opAddR & "0111" & "0010------------", -- ADD s7, s2 ; build data from low and high
-- _getChecksum_:
16#049# => brCall & brDo & "--------0010000110",-- CALL 086 ; get checksum
16#04A# => opAndC & "0011" & "0000000011111111", -- AND s3, 00FF ; limit calculated checksum to 8 bit
16#04B# => opCompR & "0011" & "0010------------", -- COMPARE s3, s2 ; test checksum
16#04C# => brJump & brNZ & "--------0001001111",-- JUMP NZ, 04F
16#04D# => opLoadC & "0011" & "0000000000000000", -- LOAD s3, 0000 ; return OK
16#04E# => brRet & brDo & "------------------",-- RETURN
-- _commandKo_:
16#04F# => opLoadC & "0011" & "0000000000000001", -- LOAD s3, 0001 ; return KO
16#050# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- send NACK reply
-----------------------------------------------------------------
-- _sendNAck_:
16#051# => opLoadC & "0010" & "0000000010101010", -- LOAD s2, 00AA ; send header
16#052# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#053# => brCall & brDo & "--------0010010011",-- CALL 093
16#054# => opLoadR & "0010" & "0100------------", -- LOAD s2, s4 ; packet id
16#055# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#056# => brCall & brDo & "--------0010010011",-- CALL 093
16#057# => opLoadC & "0010" & "0000000000000000", -- LOAD s2, 0000 ; negative Acknowledge
16#058# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#059# => brCall & brDo & "--------0010010011",-- CALL 093
16#05A# => opLoadC & "0010" & "0000000000000000", -- LOAD s2, 0000 ; packet length: no data
16#05B# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#05C# => brCall & brDo & "--------0010010011",-- CALL 093
16#05D# => opLoadR & "0010" & "0011------------", -- LOAD s2, s3 ; checksum
16#05E# => brCall & brDo & "--------0010010011",-- CALL 093
16#05F# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- send WRITE_MEM reply
-----------------------------------------------------------------
-- _sendWriteOk_:
16#060# => opLoadC & "0010" & "0000000010101010", -- LOAD s2, 00AA ; send header
16#061# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#062# => brCall & brDo & "--------0010010011",-- CALL 093
16#063# => opLoadR & "0010" & "0100------------", -- LOAD s2, s4 ; packet id
16#064# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#065# => brCall & brDo & "--------0010010011",-- CALL 093
16#066# => opLoadR & "0010" & "0101------------", -- LOAD s2, s5 ; received command
16#067# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#068# => brCall & brDo & "--------0010010011",-- CALL 093
16#069# => opLoadC & "0010" & "0000000000000000", -- LOAD s2, 0000 ; packet length: no data
16#06A# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#06B# => brCall & brDo & "--------0010010011",-- CALL 093
16#06C# => opLoadR & "0010" & "0011------------", -- LOAD s2, s3 ; checksum
16#06D# => brCall & brDo & "--------0010010011",-- CALL 093
16#06E# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- send READ_MEM reply
-----------------------------------------------------------------
-- _sendReadData_:
16#06F# => opLoadC & "0010" & "0000000010101010", -- LOAD s2, 00AA ; send header
16#070# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#071# => brCall & brDo & "--------0010010011",-- CALL 093
16#072# => opLoadR & "0010" & "0100------------", -- LOAD s2, s4 ; packet id
16#073# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#074# => brCall & brDo & "--------0010010011",-- CALL 093
16#075# => opLoadR & "0010" & "0101------------", -- LOAD s2, s5 ; received command
16#076# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#077# => brCall & brDo & "--------0010010011",-- CALL 093
16#078# => opLoadC & "0010" & "0000000000000010", -- LOAD s2, 0002 ; packet length: 2 bytes
16#079# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#07A# => brCall & brDo & "--------0010010011",-- CALL 093
16#07B# => opLoadR & "0010" & "0111------------", -- LOAD s2, s7 ; data low
16#07C# => opAndC & "0010" & "0000000011111111", -- AND s2, 00FF ; keep low byte only
16#07D# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#07E# => brCall & brDo & "--------0010010011",-- CALL 093
16#07F# => opLoadR & "0010" & "0111------------", -- LOAD s2, s7 ; data high
16#080# => brCall & brDo & "--------0010100101",-- CALL 0A5 ; shift MSBs down to LSBs
16#081# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#082# => brCall & brDo & "--------0010010011",-- CALL 093
16#083# => opLoadR & "0010" & "0011------------", -- LOAD s2, s3 ; checksum
16#084# => brCall & brDo & "--------0010010011",-- CALL 093
16#085# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- Get byte from serial port
-----------------------------------------------------------------
-- _uartGetByte_:
16#086# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; read UART satus register
16#087# => opAddC & "0000" & "0000000000000001", -- ADD s0, 01
--load s8, 0100
-- _checkStat_:
16#088# => opLoadC & "0010" & "0000000001000000", -- LOAD s2, 0040 ; add delay between bus reads
-- _delay0_:
16#089# => opSubC & "0010" & "0000000000000001", -- SUB s2, 0001
16#08A# => brJump & brNZ & "--------0010001001",-- JUMP NZ, 089
--sub s8, 0001
--jump nz, continue
--load s2, 0035
--call uartSendByte
--load s8, 0100
-- _continue_:
16#08B# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#08C# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#08D# => opTestC & "0001" & "0000000000000001", -- TEST s1, 0001 ; check "data ready" bit
16#08E# => brJump & brZ & "--------0010001000",-- JUMP Z, 088 ; loop until bit is '1'
16#08F# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; read UART data register
16#090# => opInputR & "0010" & "0000------------", -- INPUT s2, (S0)
16#091# => opInputR & "0010" & "0000------------", -- INPUT s2, (S0)
--LOAD s8, s2
16#092# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- Send byte to serial port
-----------------------------------------------------------------
-- _uartSendByte_:
16#093# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; read UART satus register
16#094# => opAddC & "0000" & "0000000000000001", -- ADD s0, 0001
-- _readStatus_:
16#095# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#096# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#097# => opTestC & "0001" & "0000000000000010", -- TEST s1, 0002 ; check "sending data" bit
16#098# => brJump & brZ & "--------0010011101",-- JUMP Z, 09D ; loop until bit is '1'
16#099# => opLoadC & "0001" & "0000000001000000", -- LOAD s1, 0040 ; add delay between bus reads
-- _delay1_:
16#09A# => opSubC & "0001" & "0000000000000001", -- SUB s1, 0001
16#09B# => brJump & brNZ & "--------0010011010",-- JUMP NZ, 09A
16#09C# => brJump & brDo & "--------0010010101",-- JUMP 095
-- _sendByte_:
16#09D# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; write UART data register
16#09E# => opOutputR & "0010" & "0000------------", -- OUTPUT s2, (S0)
16#09F# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- shift s2 8 bits to the left
-----------------------------------------------------------------
-- _shiftS2L8_:
16#0A0# => opLoadC & "0000" & "0000000000001000", -- LOAD s0, 8 ; loop count
-- _shiftLeftLoop_:
16#0A1# => opShRot & "0010" & shRotL & shRotLd0, -- SL0 s2
16#0A2# => opSubC & "0000" & "0000000000000001", -- SUB s0, 0001
16#0A3# => brJump & brNZ & "--------0010100001",-- JUMP NZ, 0A1
16#0A4# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- shift s2 8 bits to the right
-----------------------------------------------------------------
-- _shiftS2R8_:
16#0A5# => opLoadC & "0000" & "0000000000001000", -- LOAD s0, 8 ; loop count
-- _shiftRightLoop_:
16#0A6# => opShRot & "0010" & shRotR & shRotLd0, -- SR0 s2
16#0A7# => opSubC & "0000" & "0000000000000001", -- SUB s0, 0001
16#0A8# => brJump & brNZ & "--------0010100110",-- JUMP NZ, 0A6
16#0A9# => brRet & brDo & "------------------",-- RETURN
--
--===============================================================
-- End of instruction memory
--===============================================================
-- _endOfMemory_:
16#3FF# => brJump & brDo & "--------1111111111",-- JUMP 3FF
others => (others => '0')
);
BEGIN
process (clock)
begin
if rising_edge(clock) then
if en = '1' then
dataOut <= memoryArray(to_integer(address));
end if;
end if;
end process;
END ARCHITECTURE mapped;

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ARCHITECTURE studentVersion OF blockRAMAddressCounter IS
BEGIN
addr <= (others => '0');
END ARCHITECTURE studentVersion;

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ARCHITECTURE studentVersion OF blockRAMControl IS
BEGIN
cntIncr <= '0';
memWr <= '0';
memEn <= '0';
END ARCHITECTURE studentVersion;

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ARCHITECTURE Spartan2 OF blockRAM IS
subtype register_type is std_ulogic_vector(dataBitNb-1 downto 0);
type memory_type is array (0 to 2**addressBitNb-1) of register_type;
signal memoryArray : memory_type;
BEGIN
portA: process(clock)
begin
if rising_edge(clock) then
if (en = '1') then
if (write = '1') then
memoryArray(to_integer(addr)) <= dataIn;
end if;
if reset = '1' then
dataOut <= (others => '0');
elsif (write = '1') then
dataOut <= dataIn;
else
dataOut <= memoryArray(to_integer(addr));
end if;
end if;
end if;
end process portA;
END ARCHITECTURE Spartan2;

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USE std.textio.all;
ARCHITECTURE Spartan3E OF blockRAM IS
subtype registerType is std_ulogic_vector(dataBitNb-1 downto 0);
type memoryType is array (0 to 2**addressBitNb-1) of registerType;
-- Define function to create initvalue signal
impure function ReadRamContentFromFile(ramContentFileSpec : in string) return memoryType is
FILE ramContentFile : text open read_mode is ramContentFileSpec;
variable ramContentFileLine : line;
variable ramContent : memoryType;
variable ramCurrentWord : bit_vector(registerType'range);
variable index : natural := 0; --241;
begin
for index in ramContent'range loop
-- while not endfile(ramContentFile) loop
readline(ramContentFile, ramContentFileLine);
read(ramContentFileLine, ramCurrentWord);
ramContent(index) := std_ulogic_vector(to_stdlogicvector(ramCurrentWord));
-- index := index + 1;
end loop;
return ramContent;
end function;
shared variable memoryArray: memoryType := ReadRamContentFromFile(initFileSpec);
BEGIN
portA: process(clock)
begin
if rising_edge(clock) then
if (en = '1') then
if (write = '1') then
memoryArray(to_integer(addr)) := dataIn;
dataOut <= dataIn;
else
dataOut <= memoryArray(to_integer(addr));
end if;
end if;
end if;
end process portA;
END ARCHITECTURE Spartan3E;

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ARCHITECTURE studentVersion OF periphAddressDecoder IS
BEGIN
selControl <= '0';
-- selSize <= '0';
selSpeed <= '0';
selX <= '0';
selY <= '0';
selZ <= '0';
END ARCHITECTURE studentVersion;

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ARCHITECTURE studentVersion OF periphControlReg IS
BEGIN
run <= '0';
updatePattern <= '0';
interpolateLinear <= '0';
END ARCHITECTURE studentVersion;

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ARCHITECTURE studentVersion OF periphSizeReg IS
BEGIN
patternSize <= (others => '0');
END ARCHITECTURE studentVersion;

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ARCHITECTURE studentVersion OF periphSpeedController IS
BEGIN
enableOut <= '0';
END ARCHITECTURE studentVersion;

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ARCHITECTURE studentVersion OF periphSpeedReg IS
BEGIN
updatePeriod <= (others => '0');
END ARCHITECTURE studentVersion;

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ARCHITECTURE mapped OF programRom IS
subtype opCodeType is std_ulogic_vector(5 downto 0);
constant opLoadC : opCodeType := "000000";
constant opLoadR : opCodeType := "000001";
constant opInputC : opCodeType := "000100";
constant opInputR : opCodeType := "000101";
constant opFetchC : opCodeType := "000110";
constant opFetchR : opCodeType := "000111";
constant opAndC : opCodeType := "001010";
constant opAndR : opCodeType := "001011";
constant opOrC : opCodeType := "001100";
constant opOrR : opCodeType := "001101";
constant opXorC : opCodeType := "001110";
constant opXorR : opCodeType := "001111";
constant opTestC : opCodeType := "010010";
constant opTestR : opCodeType := "010011";
constant opCompC : opCodeType := "010100";
constant opCompR : opCodeType := "010101";
constant opAddC : opCodeType := "011000";
constant opAddR : opCodeType := "011001";
constant opAddCyC : opCodeType := "011010";
constant opAddCyR : opCodeType := "011011";
constant opSubC : opCodeType := "011100";
constant opSubR : opCodeType := "011101";
constant opSubCyC : opCodeType := "011110";
constant opSubCyR : opCodeType := "011111";
constant opShRot : opCodeType := "100000";
constant opOutputC : opCodeType := "101100";
constant opOutputR : opCodeType := "101101";
constant opStoreC : opCodeType := "101110";
constant opStoreR : opCodeType := "101111";
subtype shRotCinType is std_ulogic_vector(2 downto 0);
constant shRotLdC : shRotCinType := "00-";
constant shRotLdM : shRotCinType := "01-";
constant shRotLdL : shRotCinType := "10-";
constant shRotLd0 : shRotCinType := "110";
constant shRotLd1 : shRotCinType := "111";
constant registerAddressBitNb : positive := 4;
constant shRotPadLength : positive
:= dataOut'length - opCodeType'length - registerAddressBitNb
- 1 - shRotCinType'length;
subtype shRotDirType is std_ulogic_vector(1+shRotPadLength-1 downto 0);
constant shRotL : shRotDirType := (0 => '0', others => '-');
constant shRotR : shRotDirType := (0 => '1', others => '-');
subtype branchCodeType is std_ulogic_vector(4 downto 0);
constant brRet : branchCodeType := "10101";
constant brCall : branchCodeType := "11000";
constant brJump : branchCodeType := "11010";
constant brReti : branchCodeType := "11100";
constant brEni : branchCodeType := "11110";
subtype branchConditionType is std_ulogic_vector(2 downto 0);
constant brDo : branchConditionType := "000";
constant brZ : branchConditionType := "100";
constant brNZ : branchConditionType := "101";
constant brC : branchConditionType := "110";
constant brNC : branchConditionType := "111";
subtype memoryWordType is std_ulogic_vector(dataOut'range);
type memoryArrayType is array (0 to 2**address'length-1) of memoryWordType;
signal memoryArray : memoryArrayType := (
--===============================================================
-- Beamer control
--===============================================================
--
-----------------------------------------------------------------
-- register definitions
-- s0, s1: used for INPUT and OUTPUT operations
-- S2: returns UART data byte
-- S3: uart protocol checksum
-- S4: uart protocol packet id
-- S5: uart protocol command id
-- S6: uart protocol address
-- S7: uart protocol data
-- S8: copy of UART data byte for debug
-----------------------------------------------------------------
--
-----------------------------------------------------------------
-- GPIO definitions
-----------------------------------------------------------------
-----------------------------------------------------------------
-- UART definitions
-----------------------------------------------------------------
-- CONSTANT uartBaudCount, 023D ; 66E6 / 115 200 = 573
-- CONSTANT uartpollDelay, 0100
-----------------------------------------------------------------
-- beamer peripheral definitions
-----------------------------------------------------------------
-- CONSTANT beamerCtlInit, 1001
--
--===============================================================
-- initializations
--===============================================================
--
-----------------------------------------------------------------
-- initialize GPIO
-----------------------------------------------------------------
16#000# => opLoadC & "0000" & "0000000000000000", -- LOAD s0, 0000
16#001# => opAddC & "0000" & "0000000000000000", -- ADD s0, 0000
16#002# => opLoadC & "0001" & "0000000010101010", -- LOAD s1, AA
16#003# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
16#004# => opLoadC & "0000" & "0000000000000000", -- LOAD s0, 0000
16#005# => opAddC & "0000" & "0000000000000001", -- ADD s0, 0001
16#006# => opLoadC & "0001" & "0000000000001111", -- LOAD s1, 0F
16#007# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
-----------------------------------------------------------------
-- initialize UART
-----------------------------------------------------------------
16#008# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010
16#009# => opAddC & "0000" & "0000000000000010", -- ADD s0, 0002
16#00A# => opLoadC & "0001" & "0000000001000010", -- LOAD s1, 0042
16#00B# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
-----------------------------------------------------------------
-- initialize beamer peripheral
-----------------------------------------------------------------
16#00C# => opLoadC & "0000" & "0000000000100000", -- LOAD s0, 0020
16#00D# => opAddC & "0000" & "0000000000000000", -- ADD s0, 0000
16#00E# => opLoadC & "0001" & "0000010000000001", -- LOAD s1, 0401
16#00F# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
16#010# => opLoadC & "0000" & "0000000000100000", -- LOAD s0, 0020
16#011# => opAddC & "0000" & "0000000000000001", -- ADD s0, 0001
16#012# => opLoadC & "0001" & "0000000000000100", -- LOAD s1, 0004
16#013# => opOutputR & "0001" & "0000------------", -- OUTPUT s1, (S0)
--
--===============================================================
-- Main loop
--===============================================================
--
-----------------------------------------------------------------
-- Process commands from serial port
-----------------------------------------------------------------
-- _main_:
16#014# => brCall & brDo & "--------0000100001",-- CALL 021 ; get command from UART
16#015# => opCompC & "0011" & "0000000000000000", -- COMPARE s3, 0000 ; check function return
16#016# => brJump & brNZ & "--------0000011111",-- JUMP NZ, 01F
16#017# => opCompC & "0101" & "0000000000000011", -- COMPARE s5, 0003 ; check for WRITE_MEM command
16#018# => brJump & brNZ & "--------0000011100",-- JUMP NZ, 01C
16#019# => opOutputR & "0111" & "0110------------", -- OUTPUT s7, (S6) ; write word to memory location
16#01A# => brCall & brDo & "--------0001100000",-- CALL 060 ; send write acknowledge
16#01B# => brJump & brDo & "--------0000010100",-- JUMP 014
-- _commandRead_:
16#01C# => opInputR & "0111" & "0110------------", -- INPUT s7, (S6) ; write word in memory location
16#01D# => brCall & brDo & "--------0001101111",-- CALL 06F ; send back read data
16#01E# => brJump & brDo & "--------0000010100",-- JUMP 014
-- _commandAbort_:
16#01F# => brCall & brDo & "--------0001010001",-- CALL 051
16#020# => brJump & brDo & "--------0000010100",-- JUMP 014
--
--===============================================================
-- Subroutines
--===============================================================
--
-----------------------------------------------------------------
-- Get command from serial port
-----------------------------------------------------------------
-- _uartGetCmd_:
16#021# => brCall & brDo & "--------0010000110",-- CALL 086 ; get command header
16#022# => opCompC & "0010" & "0000000010101010", -- COMPARE s2, 00AA
16#023# => brJump & brNZ & "--------0000100001",-- JUMP NZ, 021 ; loop until byte is AAh
16#024# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#025# => brCall & brDo & "--------0010000110",-- CALL 086 ; get packet id
16#026# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#027# => opLoadR & "0100" & "0010------------", -- LOAD s4, s2 ; store id for reply
16#028# => brCall & brDo & "--------0010000110",-- CALL 086 ; get command
16#029# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#02A# => opCompC & "0010" & "0000000000000011", -- COMPARE s2, 0003 ; check for WRITE_MEM command
16#02B# => brJump & brZ & "--------0000101111",-- JUMP Z, 02F
16#02C# => opCompC & "0010" & "0000000000000100", -- COMPARE s2, 0004 ; check for READ_MEM command
16#02D# => brJump & brZ & "--------0000101111",-- JUMP Z, 02F
16#02E# => brJump & brDo & "--------0001001111",-- JUMP 04F ; no match
-- _commandOk_:
16#02F# => opLoadR & "0101" & "0010------------", -- LOAD s5, s2 ; store command for action
16#030# => brCall & brDo & "--------0010000110",-- CALL 086 ; get data length
16#031# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#032# => opCompC & "0101" & "0000000000000011", -- COMPARE s5, 0003 ; check for WRITE_MEM command
16#033# => brJump & brZ & "--------0000110111",-- JUMP Z, 037 ; go to test write command length
16#034# => opCompC & "0010" & "0000000000000010", -- COMPARE s2, 0002 ; verify READ_MEM length
16#035# => brJump & brNZ & "--------0001001111",-- JUMP NZ, 04F
16#036# => brJump & brDo & "--------0000111001",-- JUMP 039
-- _testWrLength_:
16#037# => opCompC & "0010" & "0000000000000100", -- COMPARE s2, 0004 ; verify WRITE_MEM length
16#038# => brJump & brNZ & "--------0001001111",-- JUMP NZ, 04F
-- _getAddress_:
16#039# => brCall & brDo & "--------0010000110",-- CALL 086 ; get address low
16#03A# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#03B# => opLoadR & "0110" & "0010------------", -- LOAD s6, s2 ; store address low
16#03C# => brCall & brDo & "--------0010000110",-- CALL 086 ; get address high
16#03D# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#03E# => brCall & brDo & "--------0010100000",-- CALL 0A0
16#03F# => opAddR & "0110" & "0010------------", -- ADD s6, s2 ; build address from low and high
16#040# => opCompC & "0101" & "0000000000000100", -- COMPARE s5, 0004 ; check for READ_MEM command
16#041# => brJump & brZ & "--------0001001001",-- JUMP Z, 049 ; skip reading data word
16#042# => brCall & brDo & "--------0010000110",-- CALL 086 ; get data low
16#043# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#044# => opLoadR & "0111" & "0010------------", -- LOAD s7, s2 ; store data low
16#045# => brCall & brDo & "--------0010000110",-- CALL 086 ; get data high
16#046# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#047# => brCall & brDo & "--------0010100000",-- CALL 0A0
16#048# => opAddR & "0111" & "0010------------", -- ADD s7, s2 ; build data from low and high
-- _getChecksum_:
16#049# => brCall & brDo & "--------0010000110",-- CALL 086 ; get checksum
16#04A# => opAndC & "0011" & "0000000011111111", -- AND s3, 00FF ; limit calculated checksum to 8 bit
16#04B# => opCompR & "0011" & "0010------------", -- COMPARE s3, s2 ; test checksum
16#04C# => brJump & brNZ & "--------0001001111",-- JUMP NZ, 04F
16#04D# => opLoadC & "0011" & "0000000000000000", -- LOAD s3, 0000 ; return OK
16#04E# => brRet & brDo & "------------------",-- RETURN
-- _commandKo_:
16#04F# => opLoadC & "0011" & "0000000000000001", -- LOAD s3, 0001 ; return KO
16#050# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- send NACK reply
-----------------------------------------------------------------
-- _sendNAck_:
16#051# => opLoadC & "0010" & "0000000010101010", -- LOAD s2, 00AA ; send header
16#052# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#053# => brCall & brDo & "--------0010010011",-- CALL 093
16#054# => opLoadR & "0010" & "0100------------", -- LOAD s2, s4 ; packet id
16#055# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#056# => brCall & brDo & "--------0010010011",-- CALL 093
16#057# => opLoadC & "0010" & "0000000000000000", -- LOAD s2, 0000 ; negative Acknowledge
16#058# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#059# => brCall & brDo & "--------0010010011",-- CALL 093
16#05A# => opLoadC & "0010" & "0000000000000000", -- LOAD s2, 0000 ; packet length: no data
16#05B# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#05C# => brCall & brDo & "--------0010010011",-- CALL 093
16#05D# => opLoadR & "0010" & "0011------------", -- LOAD s2, s3 ; checksum
16#05E# => brCall & brDo & "--------0010010011",-- CALL 093
16#05F# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- send WRITE_MEM reply
-----------------------------------------------------------------
-- _sendWriteOk_:
16#060# => opLoadC & "0010" & "0000000010101010", -- LOAD s2, 00AA ; send header
16#061# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#062# => brCall & brDo & "--------0010010011",-- CALL 093
16#063# => opLoadR & "0010" & "0100------------", -- LOAD s2, s4 ; packet id
16#064# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#065# => brCall & brDo & "--------0010010011",-- CALL 093
16#066# => opLoadR & "0010" & "0101------------", -- LOAD s2, s5 ; received command
16#067# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#068# => brCall & brDo & "--------0010010011",-- CALL 093
16#069# => opLoadC & "0010" & "0000000000000000", -- LOAD s2, 0000 ; packet length: no data
16#06A# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#06B# => brCall & brDo & "--------0010010011",-- CALL 093
16#06C# => opLoadR & "0010" & "0011------------", -- LOAD s2, s3 ; checksum
16#06D# => brCall & brDo & "--------0010010011",-- CALL 093
16#06E# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- send READ_MEM reply
-----------------------------------------------------------------
-- _sendReadData_:
16#06F# => opLoadC & "0010" & "0000000010101010", -- LOAD s2, 00AA ; send header
16#070# => opLoadR & "0011" & "0010------------", -- LOAD s3, s2 ; prepare checksum
16#071# => brCall & brDo & "--------0010010011",-- CALL 093
16#072# => opLoadR & "0010" & "0100------------", -- LOAD s2, s4 ; packet id
16#073# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#074# => brCall & brDo & "--------0010010011",-- CALL 093
16#075# => opLoadR & "0010" & "0101------------", -- LOAD s2, s5 ; received command
16#076# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#077# => brCall & brDo & "--------0010010011",-- CALL 093
16#078# => opLoadC & "0010" & "0000000000000010", -- LOAD s2, 0002 ; packet length: 2 bytes
16#079# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#07A# => brCall & brDo & "--------0010010011",-- CALL 093
16#07B# => opLoadR & "0010" & "0111------------", -- LOAD s2, s7 ; data low
16#07C# => opAndC & "0010" & "0000000011111111", -- AND s2, 00FF ; keep low byte only
16#07D# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#07E# => brCall & brDo & "--------0010010011",-- CALL 093
16#07F# => opLoadR & "0010" & "0111------------", -- LOAD s2, s7 ; data high
16#080# => brCall & brDo & "--------0010100101",-- CALL 0A5 ; shift MSBs down to LSBs
16#081# => opAddR & "0011" & "0010------------", -- ADD s3, s2 ; calculate checksum
16#082# => brCall & brDo & "--------0010010011",-- CALL 093
16#083# => opLoadR & "0010" & "0011------------", -- LOAD s2, s3 ; checksum
16#084# => brCall & brDo & "--------0010010011",-- CALL 093
16#085# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- Get byte from serial port
-----------------------------------------------------------------
-- _uartGetByte_:
16#086# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; read UART satus register
16#087# => opAddC & "0000" & "0000000000000001", -- ADD s0, 01
--load s8, 0100
-- _checkStat_:
16#088# => opLoadC & "0010" & "0000000001000000", -- LOAD s2, 0040 ; add delay between bus reads
-- _delay0_:
16#089# => opSubC & "0010" & "0000000000000001", -- SUB s2, 0001
16#08A# => brJump & brNZ & "--------0010001001",-- JUMP NZ, 089
--sub s8, 0001
--jump nz, continue
--load s2, 0035
--call uartSendByte
--load s8, 0100
-- _continue_:
16#08B# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#08C# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#08D# => opTestC & "0001" & "0000000000000001", -- TEST s1, 0001 ; check "data ready" bit
16#08E# => brJump & brZ & "--------0010001000",-- JUMP Z, 088 ; loop until bit is '1'
16#08F# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; read UART data register
16#090# => opInputR & "0010" & "0000------------", -- INPUT s2, (S0)
16#091# => opInputR & "0010" & "0000------------", -- INPUT s2, (S0)
--LOAD s8, s2
16#092# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- Send byte to serial port
-----------------------------------------------------------------
-- _uartSendByte_:
16#093# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; read UART satus register
16#094# => opAddC & "0000" & "0000000000000001", -- ADD s0, 0001
-- _readStatus_:
16#095# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#096# => opInputR & "0001" & "0000------------", -- INPUT s1, (S0)
16#097# => opTestC & "0001" & "0000000000000010", -- TEST s1, 0002 ; check "sending data" bit
16#098# => brJump & brZ & "--------0010011101",-- JUMP Z, 09D ; loop until bit is '1'
16#099# => opLoadC & "0001" & "0000000001000000", -- LOAD s1, 0040 ; add delay between bus reads
-- _delay1_:
16#09A# => opSubC & "0001" & "0000000000000001", -- SUB s1, 0001
16#09B# => brJump & brNZ & "--------0010011010",-- JUMP NZ, 09A
16#09C# => brJump & brDo & "--------0010010101",-- JUMP 095
-- _sendByte_:
16#09D# => opLoadC & "0000" & "0000000000010000", -- LOAD s0, 0010 ; write UART data register
16#09E# => opOutputR & "0010" & "0000------------", -- OUTPUT s2, (S0)
16#09F# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- shift s2 8 bits to the left
-----------------------------------------------------------------
-- _shiftS2L8_:
16#0A0# => opLoadC & "0000" & "0000000000001000", -- LOAD s0, 8 ; loop count
-- _shiftLeftLoop_:
16#0A1# => opShRot & "0010" & shRotL & shRotLd0, -- SL0 s2
16#0A2# => opSubC & "0000" & "0000000000000001", -- SUB s0, 0001
16#0A3# => brJump & brNZ & "--------0010100001",-- JUMP NZ, 0A1
16#0A4# => brRet & brDo & "------------------",-- RETURN
--
-----------------------------------------------------------------
-- shift s2 8 bits to the right
-----------------------------------------------------------------
-- _shiftS2R8_:
16#0A5# => opLoadC & "0000" & "0000000000001000", -- LOAD s0, 8 ; loop count
-- _shiftRightLoop_:
16#0A6# => opShRot & "0010" & shRotR & shRotLd0, -- SR0 s2
16#0A7# => opSubC & "0000" & "0000000000000001", -- SUB s0, 0001
16#0A8# => brJump & brNZ & "--------0010100110",-- JUMP NZ, 0A6
16#0A9# => brRet & brDo & "------------------",-- RETURN
--
--===============================================================
-- End of instruction memory
--===============================================================
-- _endOfMemory_:
16#3FF# => brJump & brDo & "--------1111111111",-- JUMP 3FF
others => (others => '0')
);
BEGIN
process (clock)
begin
if rising_edge(clock) then
if en = '1' then
dataOut <= memoryArray(to_integer(address));
end if;
end if;
end process;
END ARCHITECTURE mapped;

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ARCHITECTURE studentVersion OF sinCosTable IS
BEGIN
sine <= (others => '0');
cosine <= (others => '0');
END ARCHITECTURE studentVersion;

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DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1 @@
DIALECT atom VHDL_2008

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@@ -0,0 +1,3 @@
DEFAULT_FILE atom ahb@beamer/struct.bd
DEFAULT_ARCHITECTURE atom struct
TOP_MARKER atom 1

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@@ -0,0 +1,2 @@
DEFAULT_FILE atom ahb@beamer@blanking/struct.bd
DEFAULT_ARCHITECTURE atom struct

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@@ -0,0 +1,2 @@
DEFAULT_FILE atom ahb@beamer@operator/struct.bd
DEFAULT_ARCHITECTURE atom struct

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@@ -0,0 +1,2 @@
DEFAULT_FILE atom ahb@beamer@registers/struct.bd
DEFAULT_ARCHITECTURE atom struct

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@@ -0,0 +1,3 @@
DEFAULT_FILE atom beamer@periph/struct.bd
DEFAULT_ARCHITECTURE atom struct
TOP_MARKER atom 1

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom struct
DEFAULT_FILE atom beamer@periph@blanking/struct.bd

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@@ -0,0 +1,3 @@
DEFAULT_FILE atom beamer@periph@operator/struct.bd
DEFAULT_ARCHITECTURE atom struct
TOP_MARKER atom 0

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@@ -0,0 +1,3 @@
DEFAULT_FILE atom beamer@periph@registers/struct.bd
DEFAULT_ARCHITECTURE atom struct
TOP_MARKER atom 0

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@@ -0,0 +1,3 @@
DEFAULT_FILE atom beamer@soc/struct.bd
DEFAULT_ARCHITECTURE atom struct
TOP_MARKER atom 1

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom Spartan3E
DEFAULT_FILE atom blockRAM_Spartan3E.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom blockRAMAddressCounter_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom blockRAMControl_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom periphAddressDecoder_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom periphControlReg_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom periphSizeReg_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom periphSpeedController_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom periphSpeedReg_studentVersion.vhd

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@@ -0,0 +1,2 @@
DEFAULT_FILE atom rom_mapped.vhd
DEFAULT_ARCHITECTURE atom mapped

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@@ -0,0 +1,2 @@
DEFAULT_ARCHITECTURE atom studentVersion
DEFAULT_FILE atom sinCosTable_studentVersion.vhd

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