implement math approch for interpolation
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@ -1280,8 +1280,8 @@ projectPaths [
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"C:\\work\\repo\\edu\\sem\\labo\\solution\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
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@ -1281,6 +1281,7 @@ projectPaths [
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"C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
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"C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
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@ -4149,7 +4150,7 @@ hdsWorkspaceLocation ""
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relativeLibraryRootDir ""
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relativeLibraryRootDir ""
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@ -6217,9 +6218,9 @@ size 180
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displayHierarchy 0
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xPos 0
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xPos 0
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yPos 14
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yPos 4
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width 1936
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width 892
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height 1056
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height 982
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activeSidePanelTab 2
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activeLibraryTab 2
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sidePanelSize 278
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sidePanelSize 278
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@ -1,20 +1,54 @@
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ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS
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ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS
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subtype sample_type is signed(sampleIn'range);
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subtype sample_type is signed(coeffBitNb-1+oversamplingBitNb DOWNTO 0);
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type samples_type is array (1 to 4) of sample_type;
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type order0 is array (0 to 0) of sample_type;
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signal samples: samples_type;
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type order1 is array (0 to 1) of sample_type;
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type order2 is array (0 to 2) of sample_type;
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type order3 is array (0 to 3) of sample_type;
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signal cA: order3;
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signal cB: order2;
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signal cC: order1;
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signal cD: order0;
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BEGIN
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BEGIN
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process(clock, reset) begin
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process(clock, reset) begin
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if reset = '1' then
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if reset = '1' then
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samples <= (others => (others => '0'));
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cA <= (others => (others => '0'));
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cB <= (others => (others => '0'));
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cC <= (others => (others => '0'));
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cD <= (others => (others => '0'));
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elsif rising_edge(clock) then
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elsif rising_edge(clock) then
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if restartPolynom = '1' then
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cA(3) <= (others => '0');
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cA(2) <= (others => '0');
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cA(1) <= (others => '0');
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cA(0) <= resize(a,sample_type'high+1);
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cB(2) <= (others => '0');
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cB(1) <= (others => '0');
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cB(0) <= resize(b,sample_type'high+1);
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cC(1) <= (others => '0');
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cC(0) <= resize(c,sample_type'high+1);
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cD(0) <= resize(d,sample_type'high+1);
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else
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cC(1) <= resize(c,sample_type'high+1) + cC(1);
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cB(2) <= cB(2) + resize(2*cB(1),sample_type'high+1) + b;
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cB(1) <= resize(b,sample_type'high+1) + cB(1);
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cA(3) <= cA(3) + resize(3*cA(2),sample_type'high+1) + resize(3*cA(1),sample_type'high+1) + a;
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cA(2) <= cA(2) + resize(2*cA(1),sample_type'high+1) + a;
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cA(1) <= resize(A,sample_type'high+1) + cA(1);
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end if;
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end if;
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end if;
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end process;
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end process;
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sampleOut <= (others => '0');
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sampleOut <= resize(cA(3)+cB(2)+cC(1)+cD(0),signalBitNb);
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END ARCHITECTURE studentVersion;
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END ARCHITECTURE studentVersion;
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@ -1,6 +0,0 @@
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EDIT_LOCK
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remi.heredero
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UNKNOWN
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WE2330808
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17492
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08.03.2024-12:51:15.116000
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