implement math approch for interpolation

02-SplineInterpolator/Prefs/hds_user/v2019.2/hds_user_prefs

@@ -1280,8 +1280,8 @@ projectPaths [
 "C:\\work\\repo\\edu\\sem\\labo\\solution\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
 "C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
 "C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
-"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
 "C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
+"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
 ]
 libMappingsRootDir ""
 teamLibMappingsRootDir ""

02-SplineInterpolator/Prefs/hds_user/v2019.2/hds_user_prefs.bak

@@ -1281,6 +1281,7 @@ projectPaths [
 "C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
 "C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
 "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
+"C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
 ]
 libMappingsRootDir ""
 teamLibMappingsRootDir ""
@@ -4149,7 +4150,7 @@ hdsWorkspaceLocation ""
 relativeLibraryRootDir ""
 vmLabelLatestDontAskAgain 0
 vmLabelWorkspaceDontAskAgain 0
-logWindowGeometry "600x573+405+95"
+logWindowGeometry "600x573+406+95"
 diagramBrowserTabNo 0
 showInsertPortHint 0
 showContentFirstTime 0
@@ -6217,9 +6218,9 @@ size 180
 ]
 displayHierarchy 0
 xPos 0
-yPos 14
-width 1936
-height 1056
+yPos 4
+width 892
+height 982
 activeSidePanelTab 2
 activeLibraryTab 2
 sidePanelSize 278

02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCalculatePolynom_studentVersion.vhd

@@ -1,20 +1,54 @@
 ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS
 
-subtype sample_type is signed(sampleIn'range);
-type samples_type is array (1 to 4) of sample_type;
-signal samples: samples_type;
+subtype sample_type is signed(coeffBitNb-1+oversamplingBitNb DOWNTO 0);
+type order0 is array (0 to 0) of sample_type;
+type order1 is array (0 to 1) of sample_type;
+type order2 is array (0 to 2) of sample_type;
+type order3 is array (0 to 3) of sample_type;
+signal cA: order3;
+signal cB: order2;
+signal cC: order1;
+signal cD: order0;
 
 BEGIN
 
   process(clock, reset) begin
     if reset = '1' then
-      samples <= (others => (others => '0'));
+      cA <= (others => (others => '0'));
+      cB <= (others => (others => '0'));
+      cC <= (others => (others => '0'));
+      cD <= (others => (others => '0'));
     elsif rising_edge(clock) then
 
+      if restartPolynom = '1' then
+        cA(3) <= (others => '0');
+        cA(2) <= (others => '0');
+        cA(1) <= (others => '0');
+        cA(0) <= resize(a,sample_type'high+1);
         
+        cB(2) <= (others => '0');
+        cB(1) <= (others => '0');
+        cB(0) <= resize(b,sample_type'high+1);
         
+        cC(1) <= (others => '0');
+        cC(0) <= resize(c,sample_type'high+1);
+
+        cD(0) <= resize(d,sample_type'high+1);
+        
+      else
+
+        cC(1) <= resize(c,sample_type'high+1) + cC(1);
+
+        cB(2) <= cB(2) + resize(2*cB(1),sample_type'high+1) + b;
+        cB(1) <= resize(b,sample_type'high+1) + cB(1);
+
+        cA(3) <= cA(3) + resize(3*cA(2),sample_type'high+1) + resize(3*cA(1),sample_type'high+1) + a;
+        cA(2) <= cA(2) + resize(2*cA(1),sample_type'high+1) + a;
+        cA(1) <= resize(A,sample_type'high+1) + cA(1);
+
+      end if;
     end if;
   end process;
 
-  sampleOut <= (others => '0');
+  sampleOut <= resize(cA(3)+cB(2)+cC(1)+cD(0),signalBitNb);
 END ARCHITECTURE studentVersion;

02-SplineInterpolator/SplineInterpolator/hds/sine@gen/struct.bd.lck

@@ -1,6 +0,0 @@
-EDIT_LOCK
-remi.heredero
-UNKNOWN
-WE2330808
-17492
-08.03.2024-12:51:15.116000