Default Branch

e60bfd4b43 · Enhance Verilog support by adding Vivado BRAM interface handling and updating documentation · Updated 2026-10-25 09:28:17 +00:00

Branches

9ab454045e · extracted cetz import for easier updating · Updated 2025-04-20 10:12:05 +00:00    purpl3F0x

36
11
Compare

b7dd2cb718 · Merge branch 'dev' into comp/electrical · Updated 2025-03-31 11:05:43 +00:00    purpl3F0x

36
6
Compare