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HEL 66ac91af7b added stub name offset parameter
2024-05-17 23:52:43 +02:00
doc
added doc for gates + minor changes
2024-05-17 22:24:38 +02:00
gallery
added stub name offset parameter
2024-05-17 23:52:43 +02:00
src
added stub name offset parameter
2024-05-17 23:52:43 +02:00
LICENSE
Initial commit
2024-05-16 21:34:50 +00:00
manual.pdf
added stub name offset parameter
2024-05-17 23:52:43 +02:00
manual.typ
improved doc + made it fancier
2024-05-17 23:07:17 +02:00
README.md
Initial commit
2024-05-16 21:34:50 +00:00
typst.toml
added logic gates
2024-05-17 21:19:40 +02:00

README.md

circuiteria

Drawing block circuits with Typst made easy, using CeTZ

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Description
Drawing block circuits with Typst made easy, using CeTZ
Readme Apache-2.0
4.6 MiB
Languages
Typst 98.1%
Verilog 1.7%
Just 0.2%