13 Commits

34 changed files with 459 additions and 75 deletions

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# circuiteria
Drawing block circuits with Typst made easy, using CeTZ
Circuiteria is a [Typst](https://typst.app) package for drawing block circuit diagrams using the [CeTZ](https://typst.app/universe/package/cetz) package.
<p align="center">
<img src="./gallery/platypus.png" alt="Perry the platypus">
</p>
## Examples
<table>
<tr>
<td colspan="2">
<a href="./gallery/test.typ">
<img src="./gallery/test.png" width="500px">
</a>
</td>
</tr>
<tr>
<td colspan="2">A bit of eveything</td>
</tr>
<tr>
<td colspan="2">
<a href="./gallery/test5.typ">
<img src="./gallery/test5.png" width="500px">
</a>
</td>
</tr>
<tr>
<td colspan="2">Wires everywhere</td>
</tr>
<tr>
<td>
<a href="./gallery/test4.typ">
<img src="./gallery/test4.png" width="250px">
</a>
</td>
<td>
<a href="./gallery/test6.typ">
<img src="./gallery/test6.png" width="250px">
</a>
</td>
</tr>
<tr>
<td>Groups</td>
<td>Rotated</td>
</tr>
</table>
> **Note**\
> These circuit layouts were copied from a digital design course given by prof. S. Zahno and recreated using this package
*Click on the example image to jump to the code.*
## Usage
For more information, see the [manual](manual.pdf)
To use this package, simply import [circuiteria](https://typst.app/universe/package/circuiteria) and call the `circuit` function:
```typ
#import "@preview/circuiteria:0.1.0"
#circuiteria.circuit({
import circuiteria: *
...
})
```

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@ -140,4 +140,11 @@ element.block(id: "b3", w: 2, h: 3,
wire.wire("w1", ("b1-port-out", "b3-port-in1"))
wire.wire("w2", ("b2-port-out", "b3-port-in2"),
style: "zigzag")
```)
#let intersection = example(```
wire.wire("w1", ((0, 0), (1, 1)), style: "zigzag")
wire.wire("w2", ((0, 0), (1, -.5)),
style: "zigzag", zigzag-ratio: 80%)
wire.intersection("w1.zig")
```)

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#!/bin/bash
PDFS=false
while getopts "p" flag
do
case "${flag}" in
p) PDFS=true;;
esac
done
echo "Generating gallery images"
set -- ./gallery/*.typ
cnt="$#"
i=1
for f
do
f2="${f/typ/png}"
echo "($i/$cnt) $f -> $f2"
typst c --root ./ "$f" "$f2"
i=$((i+1))
done
if [ "$PDFS" = true ]
then
echo
echo "Generating gallery PDFs"
set -- ./gallery/*.typ
cnt="$#"
i=1
for f
do
f2="${f/typ/pdf}"
echo "($i/$cnt) $f -> $f2"
typst c --root ./ "$f" "$f2"
i=$((i+1))
done
fi

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#import "../src/lib.typ": *
#set page(width: auto, height: auto, margin: .5cm)
#let teal = rgb(37, 155, 166)
#let orange = rgb(254, 160, 93)
#let brown = rgb(97, 54, 60)
#circuit({
element.group(id: "platypus", name: "A platypus", {
element.block(
x: 0, y: 0, w: 2, h: 3, id: "body",
fill: teal,
ports: (
east: (
(id: "out"),
)
),
ports-margins: (
east: (50%, 10%)
)
)
element.block(
x: 2.5, y: 1.5, w: 1.5, h: 1, id: "beak",
fill: orange,
ports: (
south: (
(id: "in"),
)
)
)
wire.wire("w1", ("body-port-out", "beak-port-in"), style: "zigzag", zigzag-ratio: 100%)
})
let O = (rel: (2, 0), to: "platypus.south-east")
element.group(id: "perry", name: "Perry the platypus", {
element.block(
x: (rel: 0, to: O), y: 0, w: 2, h: 3, id: "body",
fill: teal,
ports: (
east: (
(id: "out"),
)
),
ports-margins: (
east: (50%, 10%)
)
)
element.block(
x: (rel: 2.5, to: O), y: 1.5, w: 1.5, h: 1, id: "beak",
fill: orange,
ports: (
south: (
(id: "in"),
)
)
)
element.block(
x: (rel: 0.25, to: O), y: 3.2, w: 1.5, h: 0.5, id: "hat",
fill: brown
)
wire.wire("w2", ("body-port-out", "beak-port-in"), style: "zigzag", zigzag-ratio: 100%)
})
wire.wire(
"w3",
("platypus.east", (horizontal: "perry.west", vertical: ())),
directed: true,
bus: true
)
})

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#import "../src/lib.typ": circuit, element, util, wire
#set page(flipped: true)
#set page(width: auto, height: auto, margin: .5cm)
#circuit({
element.block(
@ -294,6 +294,6 @@
bus: true
)
wire.intersection("wResMP-RegFile.dodge-end")
wire.intersection("wResMP-AdrSrc.dodge-end")
wire.intersection("wResMP-RegFile.dodge-end", radius: .2)
wire.intersection("wResMP-AdrSrc.dodge-end", radius: .2)
})

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#import "../src/lib.typ": circuit, element, util, wire
#set page(flipped: true)
#set page(width: auto, height: auto, margin: .5cm)
#circuit({
element.block(
@ -307,6 +307,6 @@
bus: true
)
wire.intersection("wResMP-RegFile.dodge-end")
wire.intersection("wResMP-AdrSrc.dodge-end")
wire.intersection("wResMP-RegFile.dodge-end", radius: .2)
wire.intersection("wResMP-AdrSrc.dodge-end", radius: .2)
})

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#import "@preview/cetz:0.2.2": draw
#import "../src/lib.typ": circuit, element, util, wire
#set page(flipped: true)
#let debug = false
#set page(width: auto, height: auto, margin: .5cm)
#circuit({
element.block(
@ -14,18 +13,14 @@
(id: "out1"),
(id: "out2"),
)
),
debug: (
ports: debug
)
)
element.gate-and(
x: 4, y: 0, w: 2, h: 2, id: "and1", debug: (ports: debug),
x: 4, y: 0, w: 2, h: 2, id: "and1",
inverted: ("in1")
)
element.gate-or(
x: 7, y: 0, w: 2, h: 2, id: "or1", debug: (ports: debug),
x: 7, y: 0, w: 2, h: 2, id: "or1",
inverted: ("in0", "out")
)
@ -47,7 +42,7 @@
)
element.gate-and(
x: 11, y: 0, w: 2, h: 2, id: "and2", inputs: 3, debug: (ports: debug),
x: 11, y: 0, w: 2, h: 2, id: "and2", inputs: 3,
inverted: ("in0", "in2")
)
for i in range(3) {
@ -55,35 +50,35 @@
}
element.gate-xor(
x: 14, y: 0, w: 2, h: 2, id: "xor", debug: (ports: debug),
x: 14, y: 0, w: 2, h: 2, id: "xor",
inverted: ("in1")
)
element.gate-buf(
x: 0, y: -3, w: 2, h: 2, id: "buf", debug: (ports: debug)
x: 0, y: -3, w: 2, h: 2, id: "buf"
)
element.gate-not(
x: 0, y: -6, w: 2, h: 2, id: "not", debug: (ports: debug)
x: 0, y: -6, w: 2, h: 2, id: "not"
)
element.gate-and(
x: 3, y: -3, w: 2, h: 2, id: "and", debug: (ports: debug)
x: 3, y: -3, w: 2, h: 2, id: "and"
)
element.gate-nand(
x: 3, y: -6, w: 2, h: 2, id: "nand", debug: (ports: debug)
x: 3, y: -6, w: 2, h: 2, id: "nand"
)
element.gate-or(
x: 6, y: -3, w: 2, h: 2, id: "or", debug: (ports: debug)
x: 6, y: -3, w: 2, h: 2, id: "or"
)
element.gate-nor(
x: 6, y: -6, w: 2, h: 2, id: "nor", debug: (ports: debug)
x: 6, y: -6, w: 2, h: 2, id: "nor"
)
element.gate-xor(
x: 9, y: -3, w: 2, h: 2, id: "xor", debug: (ports: debug)
x: 9, y: -3, w: 2, h: 2, id: "xor"
)
element.gate-xnor(
x: 9, y: -6, w: 2, h: 2, id: "xnor", debug: (ports: debug)
x: 9, y: -6, w: 2, h: 2, id: "xnor"
)
})

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#import "@preview/cetz:0.2.2": draw
#import "../src/lib.typ": *
#set page(flipped: true)
#set page(width: auto, height: auto, margin: .5cm)
#circuit({
element.group(id: "toplvl", name: "Toplevel", {
@ -18,7 +18,7 @@
name: "Datapath",
ports: (
north: (
(id: "clk", clock: true),
(id: "clk", clock: true, small: true),
(id: "Zero"),
(id: "Regsrc"),
(id: "PCSrc"),
@ -104,7 +104,7 @@
name: "Data\n Memory",
ports: (
north: (
(id: "clk", clock: true),
(id: "clk", clock: true, small: true),
(id: "WE", name: "WE")
),
west: (
@ -200,18 +200,22 @@
draw.content("dmem.south-west", [*External Memories*], anchor: "north", padding: 10pt)
})
wire.wire(
"w-dp-clk",
("dp-port-clk", (-1, 4.2)),
style: "zigzag",
zigzag-dir: "horizontal",
zigzag-ratio: 100%
draw.line(name: "w-dp-clk",
"dp-port-clk",
(rel: (0, .5), to: ()),
(
rel: (-.5, 0),
to: (horizontal: "toplvl.west", vertical: ())
)
)
draw.content("w-dp-clk.end", "clk", anchor: "east", padding: 3pt)
wire.wire(
"w-dp-rst",
("dp-port-rst", (horizontal: (-1, 0), vertical: ()))
draw.line(name: "w-dp-rst",
"dp-port-rst",
(
rel: (-.5, 0),
to: (horizontal: "toplvl.west", vertical: ())
)
)
draw.content("w-dp-rst.end", "rst", anchor: "east", padding: 3pt)
})

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#import "@preview/cetz:0.2.2": draw
#import "../src/lib.typ": *
#set page(flipped: true, paper: "a3")
#set page(width: auto, height: auto, margin: .5cm)
#circuit({
element.multiplexer(
@ -202,8 +202,8 @@
style: "zigzag",
zigzag-ratio: 1
)
wire.intersection("wPC2.zig", radius: 2pt)
wire.intersection("wPC2.zag", radius: 2pt)
wire.intersection("wPC2.zig")
wire.intersection("wPC2.zag")
wire.stub("PCAdd-port-in2", "west", name: "4", length: 1.5)
wire.wire(
"wPC+4", ("PCAdd-port-out", "PCMux-port-in0"),
@ -278,11 +278,11 @@
reverse: true,
slice: (31, 7)
)
wire.intersection("wF3.end", radius: 2pt)
wire.intersection("wF7.end", radius: 2pt)
wire.intersection("wA1.end", radius: 2pt)
wire.intersection("wA2.end", radius: 2pt)
wire.intersection("wA3.end", radius: 2pt)
wire.intersection("wF3.end")
wire.intersection("wF7.end")
wire.intersection("wA1.end")
wire.intersection("wA2.end")
wire.intersection("wA3.end")
wire.stub("RegFile-port-clk", "north", name: "clk", length: 0.25)
wire.wire("wRD2", ("RegFile-port-RD2", "SrcBMux-port-in0"))
@ -293,7 +293,7 @@
name: "WriteData",
name-pos: "end"
)
wire.intersection("wWD.zig", radius: 2pt)
wire.intersection("wWD.zig")
wire.wire(
"wImmALU", ("Ext-port-out", "SrcBMux-port-in1"),
@ -305,7 +305,7 @@
wire.wire(
"wImmJump", ("Ext-port-out", "JumpAdd-port-in2")
)
wire.intersection("wImmALU.zig", radius: 2pt)
wire.intersection("wImmALU.zig")
wire.wire(
"wJumpPC", ("JumpAdd-port-out", "PCMux-port-in1"),
style: "dodge",
@ -351,7 +351,7 @@
dodge-y: 2,
dodge-margins: (3, 2)
)
wire.intersection("wALURes2.start2", radius: 2pt)
wire.intersection("wALURes2.start2")
wire.stub("DMem-port-clk", "north", name: "clk", length: 0.25)
wire.wire(

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#import "@preview/cetz:0.2.2": draw, vector
#import "../src/lib.typ": *
#set page(width: auto, height: auto, margin: .5cm)
#circuit({
element.multiplexer(
x: 10, y: 0, w: 1, h: 6, id: "ResMux",
entries: ("000", "001", "010", "011", "101"),
h-ratio: 90%,
fill: util.colors.blue
)
element.extender(
x: (rel: -3, to: "ResMux.west"),
y: (from: "ResMux-port-in4", to: "out"),
w: 2, h: 1, id: "Ext",
name: "Zero Ext",
name-anchor: "south",
fill: util.colors.green
)
gates.gate-or(
x: (rel: -2, to: "ResMux.west"),
y: (from: "ResMux-port-in3", to: "out"),
w: 1, h: 1, id: "Or"
)
gates.gate-and(
x: (rel: -2, to: "ResMux.west"),
y: (from: "ResMux-port-in2", to: "out"),
w: 1, h: 1, id: "And"
)
element.alu(
x: (rel: -2.5, to: "Ext.west"),
y: (from: "ResMux-port-in0", to: "out"),
w: 1.5, h: 3, id: "Add",
name: text("+", size: 1.5em),
name-anchor: "name",
fill: util.colors.pink
)
element.multiplexer(
x: (rel: -1.5, to: "Add.west"),
y: (from: "Add-port-in1", to: "out"),
w: 0.5, h: 1.5, id: "NotMux",
h-ratio: 80%,
fill: util.colors.blue
)
gates.gate-not(
x: (rel: -2, to: "NotMux.west"),
y: (from: "NotMux-port-in1", to: "out"),
w: 1, h: 1, id: "Not"
)
draw.hide(
draw.line(name: "l1",
"Not-port-in0",
(rel: (-2, 0), to: ()),
(horizontal: (), vertical: "NotMux-port-in0")
)
)
let b = "l1.end"
draw.hide(
draw.line(name: "l2",
b,
(horizontal: (), vertical: "Add-port-in2")
)
)
let a = "l2.end"
wire.wire("wB0", (b, "NotMux-port-in0"), bus: true)
wire.wire(
"wB1", (b, "Not-port-in0"),
style: "zigzag",
zigzag-ratio: 1.5,
bus: true
)
wire.wire(
"wB2", (b, "And-port-in0"),
style: "zigzag",
zigzag-ratio: 1,
bus: true
)
wire.wire(
"wB3", (b, "Or-port-in0"),
style: "zigzag",
zigzag-ratio: 1,
bus: true
)
wire.intersection("wB1.zig")
wire.intersection("wB2.zig")
wire.intersection("wB2.zag")
wire.wire("wNot", ("Not-port-out", "NotMux-port-in1"), bus: true)
wire.wire("wAddA", ("NotMux-port-out", "Add-port-in1"), bus: true)
wire.wire("wA0", (a, "Add-port-in2"), bus: true)
wire.wire(
"wA1", (a, "And-port-in1"),
style: "zigzag",
zigzag-ratio: 0.5,
bus: true
)
wire.wire(
"wA2", (a, "Or-port-in1"),
style: "zigzag",
zigzag-ratio: 0.5,
bus: true
)
wire.intersection("wA1.zig")
wire.intersection("wA1.zag")
wire.wire("wMux0", ("Add-port-out", "ResMux-port-in0"), bus: true)
wire.wire(
"wMux1", ("Add-port-out", "ResMux-port-in1"),
style: "zigzag",
zigzag-ratio: 2,
bus: true
)
wire.wire("wMux2", ("And-port-out", "ResMux-port-in2"), bus: true)
wire.wire("wMux3", ("Or-port-out", "ResMux-port-in3"), bus: true)
wire.wire("wMux4", ("Ext-port-out", "ResMux-port-in4"), bus: true)
wire.wire(
"wAdd", ("Add-port-out", "Ext-port-in"),
style: "zigzag",
zigzag-ratio: 0.5,
bus: true
)
wire.intersection("wMux1.zig")
wire.intersection("wAdd.zig")
let c = (rel: (0, 2), to: "ResMux.north")
wire.wire("wResCtrl", (c, "ResMux.north"), bus: true)
wire.wire(
"wAddCtrl", (c, "Add.north"),
style: "zigzag",
zigzag-dir: "horizontal"
)
let d = (rel: (1, 0), to: "ResMux-port-out")
wire.wire("wRes", ("ResMux-port-out", d), bus: true)
draw.content(
"wAddCtrl.zag",
[ALUControl#sub("[1]")],
anchor: "south-west",
padding: 3pt
)
wire.wire(
"wCout", ("Add.south", (horizontal: (), vertical: "Ext.north-east"))
)
draw.content(
"wCout.end",
[C#sub("out")],
angle: 90deg,
anchor: "east",
padding: 3pt
)
draw.content(
a,
[A],
angle: 90deg,
anchor: "south",
padding: 3pt
)
draw.content(
b,
[B],
angle: 90deg,
anchor: "south",
padding: 3pt
)
draw.content(
c,
[ALUControl#sub("[2:0]")],
angle: 90deg,
anchor: "west",
padding: 3pt
)
draw.content(
d,
[Result],
angle: 90deg,
anchor: "north",
padding: 3pt
)
draw.content(
("wAdd.zig", 0.2, "wAdd.zag"),
text("[N-1]", size: 0.8em),
angle: 90deg,
anchor: "north-east",
padding: 3pt
)
})

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@ -86,6 +86,7 @@
ports-y: (
in1: (h) => {h * 0.225},
in2: (h) => {h * 0.775},
out: (h) => {h * 0.5}
),
debug: debug
)

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@ -52,13 +52,13 @@
h: none,
name: none,
name-anchor: "center",
ports: (),
ports-margins: (),
ports: (:),
ports-margins: (:),
fill: none,
stroke: black + 1pt,
id: "",
auto-ports: true,
ports-y: (),
ports-y: (:),
debug: (
ports: false
)

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@ -71,7 +71,7 @@
let out-pct = if align-out {h-ratio / 2} else {50%}
let ports-y = (
"in": (h) => {h - h * (h-ratio / 200%)},
"out": (h) => {h * (out-pct / 100%)}
"out": (h) => {h - h * (out-pct / 100%)}
)
element.elmt(

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@ -5,8 +5,8 @@
let (x, y) = bl
let (width, height) = (tr.at(0) - x, tr.at(1) - y)
let t = (x + width / 4, y + height)
let b = (x + width / 4, y)
let t = (x + width / 2, y + height)
let b = (x + width / 2, y)
let f = draw.group(name: id, {
draw.merge-path(
@ -16,7 +16,7 @@
name: id + "-path",
close: true, {
draw.line(bl, tl, t)
draw.bezier((), b, tr, br)
draw.arc-through((), (tr , 50%, br), b)
draw.line((), b)
}
)

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@ -33,7 +33,7 @@
y: none,
w: none,
h: none,
inputs: 2,
inputs: 1,
fill: none,
stroke: black + 1pt,
id: "",
@ -65,7 +65,7 @@
y: none,
w: none,
h: none,
inputs: 2,
inputs: 1,
fill: none,
stroke: black + 1pt,
id: "",

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@ -33,7 +33,7 @@
stroke: black + 1pt,
id: "",
inverted: (),
inverted-radius: 0.2,
inverted-radius: 0.1,
debug: (
ports: false
)
@ -58,19 +58,16 @@
if (type(y) == dictionary) {
let from = y.from
let to = y.to
let (to-side, i) = find-port(ports, to)
let margins = (0%, 0%)
if to-side in ports-margins {
margins = ports-margins.at(to-side)
}
let used-pct = 100% - margins.at(0) - margins.at(1)
let used-height = height * used-pct / 100%
let top-margin = height * margins.at(0) / 100%
let dy = used-height * (i + 1) / (ports.at(to-side).len() + 1)
let dy
if to == "out" {
dy = height / 2
} else {
dy = height * (i + 0.5) / inputs
}
let (ctx, from-pos) = coordinate.resolve(ctx, from)
y = from-pos.at(1) + dy - height + top-margin
y = from-pos.at(1) + dy - height
}
let tl = (x, y + height)

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@ -1,4 +1,4 @@
#let version = version((0,0,2))
#let version = version(0, 1, 0)
#import "circuit.typ": circuit
#import "element.typ"

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@ -7,7 +7,12 @@
#let signal-width = 1pt
#let bus-width = 1.5pt
#let intersection(pt, radius: .2, fill: black) = {
/// Draws a wire intersection at the given anchor
/// #examples.intersection
/// - pt (point): A CeTZ compatible point / anchor
/// - radius (number): The radius of the intersection
/// - fill (color): The fill color
#let intersection(pt, radius: .1, fill: black) = {
draw.circle(pt, radius: radius, stroke: none, fill: fill)
}
@ -192,15 +197,18 @@
let second-pos = points.at(1)
if reverse {
(first-pt, last-pt) = (last-pt, first-pt)
(first-pos, second-pos) = (second-pos, first-pos)
}
let angle = 0deg
if rotate-name {
(ctx, first-pos) = coordinate.resolve(ctx, first-pos)
(ctx, second-pos) = coordinate.resolve(ctx, second-pos)
let (x1, y1, _) = first-pos
let (x2, y2, _) = second-pos
if reverse {
(first-pos, second-pos) = (second-pos, first-pos)
}
let (x1, y1, ..) = first-pos
let (x2, y2, ..) = second-pos
angle = calc.atan2(x2 - x1, y2 - y1)
}

View File

@ -1,6 +1,6 @@
[package]
name = "circuiteria"
version = "0.0.2"
version = "0.1.0"
compiler = "0.11.0"
repository = "https://git.kb28.ch/HEL/circuiteria"
entrypoint = "src/lib.typ"
@ -11,4 +11,4 @@ categories = [ "visualization" ]
license = "Apache-2.0"
description = "Drawing block circuits with Typst made easy, using CeTZ"
keywords = [ "circuit", "block", "draw" ]
exclude = [ "/gallery/*" ]
exclude = [ "gallery", "gallery.bash", "doc" ]